blob: 4c1a0da7088a73fdf1c304619728441c0dd3588c [file] [log] [blame]
Patrick Georgi0588d192009-08-12 15:00:51 +00001##
Stefan Reinauer16f515a2010-01-20 18:44:30 +00002## This file is part of the coreboot project.
Patrick Georgi0588d192009-08-12 15:00:51 +00003##
Alexandru Gagniuc70c660f2012-08-23 02:32:58 -05004## Copyright (C) 2012 Alexandru Gagniuc <mr.nuke.me@gmail.com>
Stefan Reinauer16f515a2010-01-20 18:44:30 +00005## Copyright (C) 2009-2010 coresystems GmbH
Patrick Georgi0588d192009-08-12 15:00:51 +00006##
Stefan Reinauer16f515a2010-01-20 18:44:30 +00007## This program is free software; you can redistribute it and/or modify
8## it under the terms of the GNU General Public License as published by
9## the Free Software Foundation; version 2 of the License.
10##
11## This program is distributed in the hope that it will be useful,
12## but WITHOUT ANY WARRANTY; without even the implied warranty of
13## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14## GNU General Public License for more details.
15##
Patrick Georgi0588d192009-08-12 15:00:51 +000016
Uwe Hermannad8c95f2012-04-12 22:00:03 +020017mainmenu "coreboot configuration"
Patrick Georgi0588d192009-08-12 15:00:51 +000018
Uwe Hermannc04be932009-10-05 13:55:28 +000019menu "General setup"
20
Lee Leahybb70c402017-04-03 07:38:20 -070021config COREBOOT_BUILD
22 bool
23 default y
24
Uwe Hermannc04be932009-10-05 13:55:28 +000025config LOCALVERSION
Uwe Hermann168b11b2009-10-07 16:15:40 +000026 string "Local version string"
Uwe Hermannc04be932009-10-05 13:55:28 +000027 help
28 Append an extra string to the end of the coreboot version.
29
Uwe Hermann168b11b2009-10-07 16:15:40 +000030 This can be useful if, for instance, you want to append the
31 respective board's hostname or some other identifying string to
32 the coreboot version number, so that you can easily distinguish
33 boot logs of different boards from each other.
34
Patrick Georgi4b8a2412010-02-09 19:35:16 +000035config CBFS_PREFIX
36 string "CBFS prefix to use"
37 default "fallback"
38 help
39 Select the prefix to all files put into the image. It's "fallback"
40 by default, "normal" is a common alternative.
41
Patrick Georgi23d89cc2010-03-16 01:17:19 +000042choice
Uwe Hermannad8c95f2012-04-12 22:00:03 +020043 prompt "Compiler to use"
Patrick Georgi23d89cc2010-03-16 01:17:19 +000044 default COMPILER_GCC
45 help
46 This option allows you to select the compiler used for building
47 coreboot.
Martin Rotha5a628e82016-01-19 12:01:09 -070048 You must build the coreboot crosscompiler for the board that you
49 have selected.
50
51 To build all the GCC crosscompilers (takes a LONG time), run:
52 make crossgcc
53
54 For help on individual architectures, run the command:
55 make help_toolchain
Patrick Georgi23d89cc2010-03-16 01:17:19 +000056
57config COMPILER_GCC
58 bool "GCC"
Uwe Hermannad8c95f2012-04-12 22:00:03 +020059 help
60 Use the GNU Compiler Collection (GCC) to build coreboot.
61
62 For details see http://gcc.gnu.org.
63
Patrick Georgi23d89cc2010-03-16 01:17:19 +000064config COMPILER_LLVM_CLANG
Martin Rotha5a628e82016-01-19 12:01:09 -070065 bool "LLVM/clang (TESTING ONLY - Not currently working)"
Uwe Hermannad8c95f2012-04-12 22:00:03 +020066 help
Martin Rotha5a628e82016-01-19 12:01:09 -070067 Use LLVM/clang to build coreboot. To use this, you must build the
68 coreboot version of the clang compiler. Run the command
69 make clang
70 Note that this option is not currently working correctly and should
71 really only be selected if you're trying to work on getting clang
72 operational.
Uwe Hermannad8c95f2012-04-12 22:00:03 +020073
74 For details see http://clang.llvm.org.
75
Patrick Georgi23d89cc2010-03-16 01:17:19 +000076endchoice
77
Patrick Georgi9b0de712013-12-29 18:45:23 +010078config ANY_TOOLCHAIN
79 bool "Allow building with any toolchain"
80 default n
Patrick Georgi9b0de712013-12-29 18:45:23 +010081 help
82 Many toolchains break when building coreboot since it uses quite
83 unusual linker features. Unless developers explicitely request it,
84 we'll have to assume that they use their distro compiler by mistake.
85 Make sure that using patched compilers is a conscious decision.
86
Patrick Georgi516a2a72010-03-25 21:45:25 +000087config CCACHE
Uwe Hermannad8c95f2012-04-12 22:00:03 +020088 bool "Use ccache to speed up (re)compilation"
Patrick Georgi516a2a72010-03-25 21:45:25 +000089 default n
90 help
91 Enables the use of ccache for faster builds.
Uwe Hermannad8c95f2012-04-12 22:00:03 +020092
93 Requires the ccache utility in your system $PATH.
94
95 For details see https://ccache.samba.org.
Patrick Georgi516a2a72010-03-25 21:45:25 +000096
Sol Boucher69b88bf2015-02-26 11:47:19 -080097config FMD_GENPARSER
98 bool "Generate flashmap descriptor parser using flex and bison"
99 default n
Sol Boucher69b88bf2015-02-26 11:47:19 -0800100 help
101 Enable this option if you are working on the flashmap descriptor
102 parser and made changes to fmd_scanner.l or fmd_parser.y.
103
104 Otherwise, say N to use the provided pregenerated scanner/parser.
105
Martin Rothf411b702017-04-09 19:12:42 -0600106config UTIL_GENPARSER
Denis 'GNUtoo' Carikli780e9312018-01-10 14:35:55 +0100107 bool "Generate SCONFIG & BINCFG parser using flex and bison"
Stefan Reinauer9bf78102010-08-09 13:28:18 +0000108 default n
Stefan Reinauer9bf78102010-08-09 13:28:18 +0000109 help
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200110 Enable this option if you are working on the sconfig device tree
Denis 'GNUtoo' Carikli780e9312018-01-10 14:35:55 +0100111 parser or bincfg and made changes to the .l or .y files.
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200112
Sol Boucher69b88bf2015-02-26 11:47:19 -0800113 Otherwise, say N to use the provided pregenerated scanner/parser.
Stefan Reinauer9bf78102010-08-09 13:28:18 +0000114
Joe Korty6d772522010-05-19 18:41:15 +0000115config USE_OPTION_TABLE
116 bool "Use CMOS for configuration values"
Edwin Beasanteb50c7d2010-07-06 21:05:04 +0000117 depends on HAVE_OPTION_TABLE
Joe Korty6d772522010-05-19 18:41:15 +0000118 help
119 Enable this option if coreboot shall read options from the "CMOS"
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200120 NVRAM instead of using hard-coded values.
Joe Korty6d772522010-05-19 18:41:15 +0000121
Timothy Pearsonf20c6e82015-02-14 16:15:31 -0600122config STATIC_OPTION_TABLE
123 bool "Load default configuration values into CMOS on each boot"
Timothy Pearsonf20c6e82015-02-14 16:15:31 -0600124 depends on USE_OPTION_TABLE
125 help
126 Enable this option to reset "CMOS" NVRAM values to default on
127 every boot. Use this if you want the NVRAM configuration to
128 never be modified from its default values.
129
Sven Schnelle8eee19d2011-05-02 19:53:04 +0000130config COMPRESS_RAMSTAGE
131 bool "Compress ramstage with LZMA"
Martin Roth75e5cb72016-12-15 15:05:37 -0700132 # Default value set at the end of the file
Sven Schnelle8eee19d2011-05-02 19:53:04 +0000133 help
134 Compress ramstage to save memory in the flash image. Note
135 that decompression might slow down booting if the boot flash
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200136 is connected through a slow link (i.e. SPI).
Sven Schnelle8eee19d2011-05-02 19:53:04 +0000137
Julius Werner09f29212015-09-29 13:51:35 -0700138config COMPRESS_PRERAM_STAGES
139 bool "Compress romstage and verstage with LZ4"
Martin Rothf2e04612016-03-09 15:50:23 -0700140 depends on !ARCH_X86
Martin Roth75e5cb72016-12-15 15:05:37 -0700141 # Default value set at the end of the file
Julius Werner09f29212015-09-29 13:51:35 -0700142 help
143 Compress romstage and (if it exists) verstage with LZ4 to save flash
144 space and speed up boot, since the time for reading the image from SPI
145 (and in the vboot case verifying it) is usually much greater than the
146 time spent decompressing. Doesn't work for XIP stages (assume all
147 ARCH_X86 for now) for obvious reasons.
148
Julius Werner99f46832018-05-16 14:14:04 -0700149config COMPRESS_BOOTBLOCK
150 bool
151 help
152 This option can be used to compress the bootblock with LZ4 and attach
153 a small self-decompression stub to its front. This can drastically
154 reduce boot time on platforms where the bootblock is loaded over a
155 very slow connection and bootblock size trumps all other factors for
156 speed. Since this using this option usually requires changes to the
157 SoC memlayout and possibly extra support code, it should not be
158 user-selectable. (There's no real point in offering this to the user
159 anyway... if it works and saves boot time, you would always want it.)
160
Cristian Măgherușan-Stanciud367b002011-06-19 03:03:28 +0200161config INCLUDE_CONFIG_FILE
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200162 bool "Include the coreboot .config file into the ROM image"
Martin Roth75e5cb72016-12-15 15:05:37 -0700163 # Default value set at the end of the file
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200164 help
165 Include the .config file that was used to compile coreboot
166 in the (CBFS) ROM image. This is useful if you want to know which
167 options were used to build a specific coreboot.rom image.
168
Daniele Forsi53847a22014-07-22 18:00:56 +0200169 Saying Y here will increase the image size by 2-3KB.
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200170
171 You can use the following command to easily list the options:
172
173 grep -a CONFIG_ coreboot.rom
174
175 Alternatively, you can also use cbfstool to print the image
176 contents (including the raw 'config' item we're looking for).
177
178 Example:
179
180 $ cbfstool coreboot.rom print
181 coreboot.rom: 4096 kB, bootblocksize 1008, romsize 4194304,
182 offset 0x0
183 Alignment: 64 bytes
Steve Goodrichf0269122012-05-18 11:18:47 -0600184
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200185 Name Offset Type Size
186 cmos_layout.bin 0x0 cmos layout 1159
187 fallback/romstage 0x4c0 stage 339756
Daniele Forsi53847a22014-07-22 18:00:56 +0200188 fallback/ramstage 0x53440 stage 186664
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200189 fallback/payload 0x80dc0 payload 51526
190 config 0x8d740 raw 3324
191 (empty) 0x8e480 null 3610440
Cristian Măgherușan-Stanciud367b002011-06-19 03:03:28 +0200192
Vadim Bendebury9202473d2011-09-21 14:46:43 -0700193config COLLECT_TIMESTAMPS
194 bool "Create a table of timestamps collected during boot"
Paul Menzel4e4a7632015-10-11 11:57:44 +0200195 default y if ARCH_X86
Vadim Bendebury9202473d2011-09-21 14:46:43 -0700196 help
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200197 Make coreboot create a table of timer-ID/timer-value pairs to
198 allow measuring time spent at different phases of the boot process.
199
Martin Rothb22bbe22018-03-07 15:32:16 -0700200config TIMESTAMPS_ON_CONSOLE
201 bool "Print the timestamp values on the console"
202 default n
203 depends on COLLECT_TIMESTAMPS
204 help
205 Print the timestamps to the debug console if enabled at level spew.
206
Patrick Georgi7e9b9d82012-04-30 21:06:10 +0200207config USE_BLOBS
208 bool "Allow use of binary-only repository"
Patrick Georgi7e9b9d82012-04-30 21:06:10 +0200209 help
210 This draws in the blobs repository, which contains binary files that
211 might be required for some chipsets or boards.
212 This flag ensures that a "Free" option remains available for users.
213
Stefan Reinauerd37ab452012-12-18 16:23:28 -0800214config COVERAGE
215 bool "Code coverage support"
216 depends on COMPILER_GCC
Stefan Reinauerd37ab452012-12-18 16:23:28 -0800217 help
218 Add code coverage support for coreboot. This will store code
219 coverage information in CBMEM for extraction from user space.
220 If unsure, say N.
221
Ryan Salsamendiab37e9a2017-06-11 21:07:31 -0700222config UBSAN
223 bool "Undefined behavior sanitizer support"
224 default n
225 help
226 Instrument the code with checks for undefined behavior. If unsure,
227 say N because it adds a small performance penalty and may abort
228 on code that happens to work in spite of the UB.
229
Stefan Reinauer58470e32014-10-17 13:08:36 +0200230config RELOCATABLE_RAMSTAGE
Vladimir Serbinenko633352c2015-05-30 22:21:37 +0200231 depends on EARLY_CBMEM_INIT
Stefan Reinauer58470e32014-10-17 13:08:36 +0200232 bool "Build the ramstage to be relocatable in 32-bit address space."
Vladimir Serbinenko633352c2015-05-30 22:21:37 +0200233 select RELOCATABLE_MODULES
Stefan Reinauer58470e32014-10-17 13:08:36 +0200234 help
235 The reloctable ramstage support allows for the ramstage to be built
236 as a relocatable module. The stage loader can identify a place
237 out of the OS way so that copying memory is unnecessary during an S3
238 wake. When selecting this option the romstage is responsible for
239 determing a stack location to use for loading the ramstage.
240
241config CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM
242 depends on RELOCATABLE_RAMSTAGE
Arthur Heymans410f2562017-01-25 15:27:52 +0100243 bool
Stefan Reinauer58470e32014-10-17 13:08:36 +0200244 help
245 The relocated ramstage is saved in an area specified by the
246 by the board and/or chipset.
247
Stefan Reinauer58470e32014-10-17 13:08:36 +0200248config UPDATE_IMAGE
249 bool "Update existing coreboot.rom image"
Stefan Reinauer58470e32014-10-17 13:08:36 +0200250 help
251 If this option is enabled, no new coreboot.rom file
252 is created. Instead it is expected that there already
253 is a suitable file for further processing.
254 The bootblock will not be modified.
255
Martin Roth5942e062016-01-20 14:59:21 -0700256 If unsure, select 'N'
257
Konstantin Aladyshev6544cb32015-01-24 18:52:10 +0400258config BOOTSPLASH_IMAGE
259 bool "Add a bootsplash image"
260 help
261 Select this option if you have a bootsplash image that you would
262 like to add to your ROM.
263
264 This will only add the image to the ROM. To actually run it check
265 options under 'Display' section.
266
267config BOOTSPLASH_FILE
268 string "Bootsplash path and filename"
269 depends on BOOTSPLASH_IMAGE
Martin Roth75e5cb72016-12-15 15:05:37 -0700270 # Default value set at the end of the file
Konstantin Aladyshev6544cb32015-01-24 18:52:10 +0400271 help
272 The path and filename of the file to use as graphical bootsplash
273 screen. The file format has to be jpg.
274
Uwe Hermannc04be932009-10-05 13:55:28 +0000275endmenu
276
Martin Roth026e4dc2015-06-19 23:17:15 -0600277menu "Mainboard"
278
Stefan Reinauera48ca842015-04-04 01:58:28 +0200279source "src/mainboard/Kconfig"
Stefan Reinauer8aedcbc2010-12-16 23:37:17 +0000280
Marshall Dawsone9375132016-09-04 08:38:33 -0600281config DEVICETREE
282 string
283 default "devicetree.cb"
284 help
285 This symbol allows mainboards to select a different file under their
286 mainboard directory for the devicetree.cb file. This allows the board
287 variants that need different devicetrees to be in the same directory.
288
289 Examples: "devicetree.variant.cb"
290 "variant/devicetree.cb"
291
Martin Roth026e4dc2015-06-19 23:17:15 -0600292config CBFS_SIZE
293 hex "Size of CBFS filesystem in ROM"
Martin Roth75e5cb72016-12-15 15:05:37 -0700294 # Default value set at the end of the file
Martin Roth026e4dc2015-06-19 23:17:15 -0600295 help
296 This is the part of the ROM actually managed by CBFS, located at the
297 end of the ROM (passed through cbfstool -o) on x86 and at at the start
298 of the ROM (passed through cbfstool -s) everywhere else. It defaults
299 to span the whole ROM on all but Intel systems that use an Intel Firmware
300 Descriptor. It can be overridden to make coreboot live alongside other
301 components like ChromeOS's vboot/FMAP or Intel's IFD / ME / TXE
302 binaries.
303
Patrick Georgi8a3592e2015-09-16 18:10:52 +0200304config FMDFILE
305 string "fmap description file in fmd format"
Patrick Georgi5d7ab392015-12-12 00:23:15 +0100306 default "src/mainboard/$(CONFIG_MAINBOARD_DIR)/chromeos.fmd" if CHROMEOS
Patrick Georgi8a3592e2015-09-16 18:10:52 +0200307 default ""
308 help
309 The build system creates a default FMAP from ROM_SIZE and CBFS_SIZE,
310 but in some cases more complex setups are required.
311 When an fmd is specified, it overrides the default format.
312
Martin Rothda1ca202015-12-26 16:51:16 -0700313endmenu
314
Martin Rothb09a5692016-01-24 19:38:33 -0700315# load site-local kconfig to allow user specific defaults and overrides
316source "site-local/Kconfig"
317
Vladimir Serbinenkoa9db82f2014-10-16 13:21:47 +0200318config SYSTEM_TYPE_LAPTOP
Martin Roth595e7772015-04-26 18:53:26 -0600319 default n
320 bool
Vladimir Serbinenkoa9db82f2014-10-16 13:21:47 +0200321
Werner Zehc0fb3612016-01-14 15:08:36 +0100322config CBFS_AUTOGEN_ATTRIBUTES
323 default n
324 bool
325 help
326 If this option is selected, every file in cbfs which has a constraint
327 regarding position or alignment will get an additional file attribute
328 which describes this constraint.
329
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000330menu "Chipset"
331
Duncan Lauried2119762015-06-08 18:11:56 -0700332comment "SoC"
Chris Chingaa8e5d32017-10-20 10:43:39 -0600333source "src/soc/*/Kconfig"
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000334comment "CPU"
Stefan Reinauera48ca842015-04-04 01:58:28 +0200335source "src/cpu/Kconfig"
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000336comment "Northbridge"
Stefan Reinauera48ca842015-04-04 01:58:28 +0200337source "src/northbridge/*/*/Kconfig"
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000338comment "Southbridge"
Stefan Reinauera48ca842015-04-04 01:58:28 +0200339source "src/southbridge/*/*/Kconfig"
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000340comment "Super I/O"
Omar Pakker57603e22016-07-29 23:31:45 +0200341source "src/superio/*/*/Kconfig"
Sven Schnelle7592e8b2011-01-27 11:43:03 +0000342comment "Embedded Controllers"
Stefan Reinauera48ca842015-04-04 01:58:28 +0200343source "src/ec/acpi/Kconfig"
344source "src/ec/*/*/Kconfig"
Stefan Reinauer86ddd732016-03-11 20:22:28 -0800345# FIXME move to vendorcode
Marc Jones78687972015-04-22 23:16:31 -0600346source "src/drivers/intel/fsp1_0/Kconfig"
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000347
Martin Roth59aa2b12015-06-20 16:17:12 -0600348source "src/southbridge/intel/common/firmware/Kconfig"
Martin Rothe1523ec2015-06-19 22:30:43 -0600349source "src/vendorcode/*/Kconfig"
Martin Roth59aa2b12015-06-20 16:17:12 -0600350
Martin Rothe1523ec2015-06-19 22:30:43 -0600351source "src/arch/*/Kconfig"
352
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000353endmenu
Patrick Georgi0588d192009-08-12 15:00:51 +0000354
Stefan Reinauera48ca842015-04-04 01:58:28 +0200355source "src/device/Kconfig"
Stefan Reinauer95a63962012-11-13 17:00:01 -0800356
Rudolf Marekd9c25492010-05-16 15:31:53 +0000357menu "Generic Drivers"
Stefan Reinauera48ca842015-04-04 01:58:28 +0200358source "src/drivers/*/Kconfig"
Stefan Reinauer86ddd732016-03-11 20:22:28 -0800359source "src/drivers/*/*/Kconfig"
Lee Leahy48dbc662017-05-08 16:56:03 -0700360source "src/commonlib/storage/Kconfig"
Rudolf Marekd9c25492010-05-16 15:31:53 +0000361endmenu
362
Philipp Deppenwiese1899fbe2017-10-16 17:09:33 +0200363menu "Security"
364
365source "src/security/Kconfig"
366
367endmenu
368
Martin Roth09210a12016-05-17 11:28:23 -0600369source "src/acpi/Kconfig"
370
Aaron Durbin4a36c4e2016-08-11 11:02:26 -0500371# This option is for the current boards/chipsets where SPI flash
372# is not the boot device. Currently nearly all boards/chipsets assume
373# SPI flash is the boot device.
374config BOOT_DEVICE_NOT_SPI_FLASH
375 bool
376 default n
377
378config BOOT_DEVICE_SPI_FLASH
379 bool
380 default y if !BOOT_DEVICE_NOT_SPI_FLASH
381 default n
382
Aaron Durbin16c173f2016-08-11 14:04:10 -0500383config BOOT_DEVICE_MEMORY_MAPPED
384 bool
385 default y if ARCH_X86 && BOOT_DEVICE_SPI_FLASH
386 default n
387 help
388 Inform system if SPI is memory-mapped or not.
389
Aaron Durbine8e118d2016-08-12 15:00:10 -0500390config BOOT_DEVICE_SUPPORTS_WRITES
391 bool
392 default n
393 help
394 Indicate that the platform has writable boot device
395 support.
396
Patrick Georgi0770f252015-04-22 13:28:21 +0200397config RTC
398 bool
399 default n
400
Patrick Georgi0588d192009-08-12 15:00:51 +0000401config HEAP_SIZE
402 hex
Myles Watson04000f42009-10-16 19:12:49 +0000403 default 0x4000
Patrick Georgi0588d192009-08-12 15:00:51 +0000404
Julius Wernerc3e7c4e2014-09-19 13:18:16 -0700405config STACK_SIZE
406 hex
Julius Werner66a476a2015-10-12 16:45:21 -0700407 default 0x1000 if ARCH_X86
408 default 0x0
Julius Wernerc3e7c4e2014-09-19 13:18:16 -0700409
Patrick Georgi0588d192009-08-12 15:00:51 +0000410config MAX_CPUS
411 int
412 default 1
413
Stefan Reinauera48ca842015-04-04 01:58:28 +0200414source "src/console/Kconfig"
Patrick Georgi0588d192009-08-12 15:00:51 +0000415
416config HAVE_ACPI_RESUME
417 bool
418 default n
419
Kyösti Mälkki9d6f3652016-06-28 07:38:46 +0300420config ACPI_HUGE_LOWMEM_BACKUP
421 bool
Kyösti Mälkki43e9c932016-11-10 11:50:21 +0200422 default n
Kyösti Mälkki9d6f3652016-06-28 07:38:46 +0300423 help
424 On S3 resume path, backup low memory from RAMBASE..RAMTOP in CBMEM.
425
Aaron Durbin87c9fae2016-01-22 15:26:04 -0600426config RESUME_PATH_SAME_AS_BOOT
427 bool
428 default y if ARCH_X86
429 depends on HAVE_ACPI_RESUME
430 help
431 This option indicates that when a system resumes it takes the
432 same path as a regular boot. e.g. an x86 system runs from the
433 reset vector at 0xfffffff0 on both resume and warm/cold boot.
434
Patrick Georgi0588d192009-08-12 15:00:51 +0000435config HAVE_HARD_RESET
436 bool
Uwe Hermann748475b2009-10-09 11:47:21 +0000437 default n
Patrick Georgi37bdb872010-02-27 08:39:04 +0000438 help
439 This variable specifies whether a given board has a hard_reset
440 function, no matter if it's provided by board code or chipset code.
441
Timothy Pearson44d53422015-05-18 16:04:10 -0500442config HAVE_ROMSTAGE_CONSOLE_SPINLOCK
443 bool
Kyösti Mälkkib5664de2016-07-08 13:33:00 +0300444 depends on EARLY_CBMEM_INIT
Timothy Pearson44d53422015-05-18 16:04:10 -0500445 default n
446
Timothy Pearson7b22d842015-08-28 19:52:05 -0500447config HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK
448 bool
Kyösti Mälkkib5664de2016-07-08 13:33:00 +0300449 depends on EARLY_CBMEM_INIT
Timothy Pearson7b22d842015-08-28 19:52:05 -0500450 default n
451 help
452 This should be enabled on certain plaforms, such as the AMD
453 SR565x, that cannot handle concurrent CBFS accesses from
454 multiple APs during early startup.
455
Timothy Pearsonc764c742015-08-28 20:48:17 -0500456config HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK
457 bool
Kyösti Mälkkib5664de2016-07-08 13:33:00 +0300458 depends on EARLY_CBMEM_INIT
Timothy Pearsonc764c742015-08-28 20:48:17 -0500459 default n
460
Aaron Durbina4217912013-04-29 22:31:51 -0500461config HAVE_MONOTONIC_TIMER
462 def_bool n
463 help
464 The board/chipset provides a monotonic timer.
465
Aaron Durbine5e36302014-09-25 10:05:15 -0500466config GENERIC_UDELAY
467 def_bool n
468 depends on HAVE_MONOTONIC_TIMER
469 help
470 The board/chipset uses a generic udelay function utilizing the
471 monotonic timer.
472
Aaron Durbin340ca912013-04-30 09:58:12 -0500473config TIMER_QUEUE
474 def_bool n
475 depends on HAVE_MONOTONIC_TIMER
476 help
Kyösti Mälkkiecd84242013-09-13 07:57:49 +0300477 Provide a timer queue for performing time-based callbacks.
Aaron Durbin340ca912013-04-30 09:58:12 -0500478
Aaron Durbin4409a5e2013-05-06 12:20:52 -0500479config COOP_MULTITASKING
480 def_bool n
Aaron Durbin38c326d2013-05-06 12:22:23 -0500481 depends on TIMER_QUEUE && ARCH_X86
Aaron Durbin4409a5e2013-05-06 12:20:52 -0500482 help
483 Cooperative multitasking allows callbacks to be multiplexed on the
484 main thread of ramstage. With this enabled it allows for multiple
485 execution paths to take place when they have udelay() calls within
486 their code.
487
488config NUM_THREADS
489 int
490 default 4
491 depends on COOP_MULTITASKING
492 help
493 How many execution threads to cooperatively multitask with.
494
Patrick Georgi0588d192009-08-12 15:00:51 +0000495config HAVE_OPTION_TABLE
496 bool
Edwin Beasanteb50c7d2010-07-06 21:05:04 +0000497 default n
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000498 help
499 This variable specifies whether a given board has a cmos.layout
500 file containing NVRAM/CMOS bit definitions.
Edwin Beasanteb50c7d2010-07-06 21:05:04 +0000501 It defaults to 'n' but can be selected in mainboard/*/Kconfig.
Patrick Georgi0588d192009-08-12 15:00:51 +0000502
Patrick Georgi0588d192009-08-12 15:00:51 +0000503config PIRQ_ROUTE
504 bool
505 default n
506
507config HAVE_SMI_HANDLER
508 bool
509 default n
510
511config PCI_IO_CFG_EXT
512 bool
513 default n
514
515config IOAPIC
516 bool
517 default n
518
Myles Watson45bb25f2009-09-22 18:49:08 +0000519config USE_WATCHDOG_ON_BOOT
520 bool
521 default n
522
Myles Watson45bb25f2009-09-22 18:49:08 +0000523config GFXUMA
524 bool
Myles Watsond73c1b52009-10-26 15:14:07 +0000525 default n
Myles Watson45bb25f2009-09-22 18:49:08 +0000526 help
527 Enable Unified Memory Architecture for graphics.
528
Myles Watsonb8e20272009-10-15 13:35:47 +0000529config HAVE_ACPI_TABLES
530 bool
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000531 help
532 This variable specifies whether a given board has ACPI table support.
533 It is usually set in mainboard/*/Kconfig.
Myles Watsonb8e20272009-10-15 13:35:47 +0000534
535config HAVE_MP_TABLE
536 bool
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000537 help
538 This variable specifies whether a given board has MP table support.
539 It is usually set in mainboard/*/Kconfig.
540 Whether or not the MP table is actually generated by coreboot
541 is configurable by the user via GENERATE_MP_TABLE.
Myles Watsonb8e20272009-10-15 13:35:47 +0000542
543config HAVE_PIRQ_TABLE
544 bool
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000545 help
546 This variable specifies whether a given board has PIRQ table support.
547 It is usually set in mainboard/*/Kconfig.
548 Whether or not the PIRQ table is actually generated by coreboot
549 is configurable by the user via GENERATE_PIRQ_TABLE.
Myles Watsonb8e20272009-10-15 13:35:47 +0000550
Alexandru Gagniuc70c660f2012-08-23 02:32:58 -0500551config MAX_PIRQ_LINKS
552 int
553 default 4
554 help
555 This variable specifies the number of PIRQ interrupt links which are
556 routable. On most chipsets, this is 4, INTA through INTD. Some
557 chipsets offer more than four links, commonly up to INTH. They may
558 also have a separate link for ATA or IOAPIC interrupts. When the PIRQ
559 table specifies links greater than 4, pirq_route_irqs will not
560 function properly, unless this variable is correctly set.
561
Vladimir Serbinenkoc21e0732014-10-16 12:48:19 +0200562config COMMON_FADT
563 bool
564 default n
565
Aaron Durbin9420a522015-11-17 16:31:00 -0600566config ACPI_NHLT
567 bool
568 default n
569 help
570 Build support for NHLT (non HD Audio) ACPI table generation.
571
Myles Watsond73c1b52009-10-26 15:14:07 +0000572#These Options are here to avoid "undefined" warnings.
573#The actual selection and help texts are in the following menu.
574
Uwe Hermann168b11b2009-10-07 16:15:40 +0000575menu "System tables"
Myles Watson45bb25f2009-09-22 18:49:08 +0000576
Myles Watsonb8e20272009-10-15 13:35:47 +0000577config GENERATE_MP_TABLE
Stefan Reinauer56cd70b2012-11-13 17:33:08 -0800578 prompt "Generate an MP table" if HAVE_MP_TABLE || DRIVERS_GENERIC_IOAPIC
579 bool
580 default HAVE_MP_TABLE || DRIVERS_GENERIC_IOAPIC
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000581 help
582 Generate an MP table (conforming to the Intel MultiProcessor
583 specification 1.4) for this board.
584
585 If unsure, say Y.
Myles Watson45bb25f2009-09-22 18:49:08 +0000586
Myles Watsonb8e20272009-10-15 13:35:47 +0000587config GENERATE_PIRQ_TABLE
Stefan Reinauer56cd70b2012-11-13 17:33:08 -0800588 prompt "Generate a PIRQ table" if HAVE_PIRQ_TABLE
589 bool
590 default HAVE_PIRQ_TABLE
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000591 help
592 Generate a PIRQ table for this board.
593
594 If unsure, say Y.
Myles Watson45bb25f2009-09-22 18:49:08 +0000595
Sven Schnelle164bcfd2011-08-14 20:56:34 +0200596config GENERATE_SMBIOS_TABLES
597 depends on ARCH_X86
598 bool "Generate SMBIOS tables"
599 default y
600 help
601 Generate SMBIOS tables for this board.
602
603 If unsure, say Y.
604
Vladimir Serbinenko0afdec42015-05-30 23:08:26 +0200605config SMBIOS_PROVIDED_BY_MOBO
606 bool
607 default n
608
Stefan Reinauer6023ca42014-10-17 13:28:15 +0200609config MAINBOARD_SERIAL_NUMBER
610 string "SMBIOS Serial Number"
611 depends on GENERATE_SMBIOS_TABLES
Vladimir Serbinenko0afdec42015-05-30 23:08:26 +0200612 depends on !SMBIOS_PROVIDED_BY_MOBO
Stefan Reinauer6023ca42014-10-17 13:28:15 +0200613 default "123456789"
Martin Roth595e7772015-04-26 18:53:26 -0600614 help
Stefan Reinauer6023ca42014-10-17 13:28:15 +0200615 The Serial Number to store in SMBIOS structures.
616
617config MAINBOARD_VERSION
618 string "SMBIOS Version Number"
619 depends on GENERATE_SMBIOS_TABLES
Vladimir Serbinenko0afdec42015-05-30 23:08:26 +0200620 depends on !SMBIOS_PROVIDED_BY_MOBO
Stefan Reinauer6023ca42014-10-17 13:28:15 +0200621 default "1.0"
622 help
623 The Version Number to store in SMBIOS structures.
624
625config MAINBOARD_SMBIOS_MANUFACTURER
626 string "SMBIOS Manufacturer"
627 depends on GENERATE_SMBIOS_TABLES
Vladimir Serbinenko0afdec42015-05-30 23:08:26 +0200628 depends on !SMBIOS_PROVIDED_BY_MOBO
Stefan Reinauer6023ca42014-10-17 13:28:15 +0200629 default MAINBOARD_VENDOR
630 help
631 Override the default Manufacturer stored in SMBIOS structures.
632
633config MAINBOARD_SMBIOS_PRODUCT_NAME
634 string "SMBIOS Product name"
635 depends on GENERATE_SMBIOS_TABLES
Vladimir Serbinenko0afdec42015-05-30 23:08:26 +0200636 depends on !SMBIOS_PROVIDED_BY_MOBO
Stefan Reinauer6023ca42014-10-17 13:28:15 +0200637 default MAINBOARD_PART_NUMBER
638 help
639 Override the default Product name stored in SMBIOS structures.
640
Julien Viard de Galbert9d231a92018-02-28 13:39:55 +0100641config SMBIOS_ENCLOSURE_TYPE
642 hex
643 depends on GENERATE_SMBIOS_TABLES
644 default 0x09 if SYSTEM_TYPE_LAPTOP
645 default 0x03
646 help
647 System Enclosure or Chassis Types as defined in SMBIOS specification.
648 The default value is SMBIOS_ENCLOSURE_DESKTOP (0x03) or
649 SMBIOS_ENCLOSURE_LAPTOP (0x09) if SYSTEM_TYPE_LAPTOP is set.
650
Myles Watson45bb25f2009-09-22 18:49:08 +0000651endmenu
652
Martin Roth21c06502016-02-04 19:52:27 -0700653source "payloads/Kconfig"
Peter Stugea758ca22009-09-17 16:21:31 +0000654
Uwe Hermann168b11b2009-10-07 16:15:40 +0000655menu "Debugging"
656
657# TODO: Better help text and detailed instructions.
Patrick Georgi0588d192009-08-12 15:00:51 +0000658config GDB_STUB
Uwe Hermann5ec2c2b2009-08-25 00:53:22 +0000659 bool "GDB debugging support"
Rudolf Marek65888022012-03-25 20:51:16 +0200660 default n
Denis 'GNUtoo' Carikli3747ba12015-12-10 22:04:56 +0100661 depends on CONSOLE_SERIAL
Patrick Georgi0588d192009-08-12 15:00:51 +0000662 help
Uwe Hermann5ec2c2b2009-08-25 00:53:22 +0000663 If enabled, you will be able to set breakpoints for gdb debugging.
Stefan Reinauer8677a232010-12-11 20:33:41 +0000664 See src/arch/x86/lib/c_start.S for details.
Patrick Georgi0588d192009-08-12 15:00:51 +0000665
Denis 'GNUtoo' Cariklie4cece02012-06-22 15:56:37 +0200666config GDB_WAIT
Denis 'GNUtoo' Carikli7d234f22015-12-10 21:58:52 +0100667 bool "Wait for a GDB connection in the ramstage"
Denis 'GNUtoo' Cariklie4cece02012-06-22 15:56:37 +0200668 default n
669 depends on GDB_STUB
670 help
Denis 'GNUtoo' Carikli7d234f22015-12-10 21:58:52 +0100671 If enabled, coreboot will wait for a GDB connection in the ramstage.
672
Denis 'GNUtoo' Cariklie4cece02012-06-22 15:56:37 +0200673
Julius Wernerd82e0cf2015-02-17 17:27:23 -0800674config FATAL_ASSERTS
675 bool "Halt when hitting a BUG() or assertion error"
676 default n
677 help
678 If enabled, coreboot will call hlt() on a BUG() or failed ASSERT().
679
Stefan Reinauerfe422182012-05-02 16:33:18 -0700680config DEBUG_CBFS
681 bool "Output verbose CBFS debug messages"
682 default n
Stefan Reinauerfe422182012-05-02 16:33:18 -0700683 help
684 This option enables additional CBFS related debug messages.
685
Jens Rottmann0d11f2d2010-08-26 12:46:02 +0000686config HAVE_DEBUG_RAM_SETUP
687 def_bool n
688
Uwe Hermann01ce6012010-03-05 10:03:50 +0000689config DEBUG_RAM_SETUP
690 bool "Output verbose RAM init debug messages"
691 default n
Jens Rottmann0d11f2d2010-08-26 12:46:02 +0000692 depends on HAVE_DEBUG_RAM_SETUP
Uwe Hermann01ce6012010-03-05 10:03:50 +0000693 help
694 This option enables additional RAM init related debug messages.
695 It is recommended to enable this when debugging issues on your
696 board which might be RAM init related.
697
698 Note: This option will increase the size of the coreboot image.
699
700 If unsure, say N.
701
Patrick Georgie82618d2010-10-01 14:50:12 +0000702config HAVE_DEBUG_CAR
703 def_bool n
704
Peter Stuge5015f792010-11-10 02:00:32 +0000705config DEBUG_CAR
706 def_bool n
707 depends on HAVE_DEBUG_CAR
708
709if DEFAULT_CONSOLE_LOGLEVEL_7 || DEFAULT_CONSOLE_LOGLEVEL_8
Uwe Hermanna953f372010-11-10 00:14:32 +0000710# Only visible if debug level is DEBUG (7) or SPEW (8) as it does additional
711# printk(BIOS_DEBUG, ...) calls.
Patrick Georgie82618d2010-10-01 14:50:12 +0000712config DEBUG_CAR
713 bool "Output verbose Cache-as-RAM debug messages"
714 default n
Peter Stuge5015f792010-11-10 02:00:32 +0000715 depends on HAVE_DEBUG_CAR
Patrick Georgie82618d2010-10-01 14:50:12 +0000716 help
717 This option enables additional CAR related debug messages.
Peter Stuge5015f792010-11-10 02:00:32 +0000718endif
Patrick Georgie82618d2010-10-01 14:50:12 +0000719
Myles Watson80e914ff2010-06-01 19:25:31 +0000720config DEBUG_PIRQ
721 bool "Check PIRQ table consistency"
722 default n
723 depends on GENERATE_PIRQ_TABLE
724 help
725 If unsure, say N.
726
Jens Rottmann0d11f2d2010-08-26 12:46:02 +0000727config HAVE_DEBUG_SMBUS
728 def_bool n
729
Uwe Hermann01ce6012010-03-05 10:03:50 +0000730config DEBUG_SMBUS
731 bool "Output verbose SMBus debug messages"
732 default n
Jens Rottmann0d11f2d2010-08-26 12:46:02 +0000733 depends on HAVE_DEBUG_SMBUS
Uwe Hermann01ce6012010-03-05 10:03:50 +0000734 help
735 This option enables additional SMBus (and SPD) debug messages.
736
737 Note: This option will increase the size of the coreboot image.
738
739 If unsure, say N.
740
741config DEBUG_SMI
742 bool "Output verbose SMI debug messages"
743 default n
744 depends on HAVE_SMI_HANDLER
Martin Roth3a543182015-09-28 15:27:24 -0600745 select SPI_FLASH_SMM if SPI_CONSOLE
Uwe Hermann01ce6012010-03-05 10:03:50 +0000746 help
747 This option enables additional SMI related debug messages.
748
749 Note: This option will increase the size of the coreboot image.
750
751 If unsure, say N.
752
Stefan Reinauerbc0f7a62010-08-01 15:41:14 +0000753config DEBUG_SMM_RELOCATION
754 bool "Debug SMM relocation code"
755 default n
756 depends on HAVE_SMI_HANDLER
757 help
758 This option enables additional SMM handler relocation related
759 debug messages.
760
761 Note: This option will increase the size of the coreboot image.
762
763 If unsure, say N.
764
Uwe Hermanna953f372010-11-10 00:14:32 +0000765# Only visible if debug level is DEBUG (7) or SPEW (8) as it does additional
766# printk(BIOS_DEBUG, ...) calls.
767config DEBUG_MALLOC
Stefan Reinauer95a63962012-11-13 17:00:01 -0800768 prompt "Output verbose malloc debug messages" if DEFAULT_CONSOLE_LOGLEVEL_7 || DEFAULT_CONSOLE_LOGLEVEL_8
769 bool
Uwe Hermanna953f372010-11-10 00:14:32 +0000770 default n
Uwe Hermanna953f372010-11-10 00:14:32 +0000771 help
772 This option enables additional malloc related debug messages.
773
774 Note: This option will increase the size of the coreboot image.
775
776 If unsure, say N.
Cristian Măgherușan-Stanciu9f52ea42011-07-02 00:44:39 +0300777
778# Only visible if debug level is DEBUG (7) or SPEW (8) as it does additional
779# printk(BIOS_DEBUG, ...) calls.
Cristian Măgherușan-Stanciu9f52ea42011-07-02 00:44:39 +0300780config DEBUG_ACPI
Stefan Reinauer95a63962012-11-13 17:00:01 -0800781 prompt "Output verbose ACPI debug messages" if DEFAULT_CONSOLE_LOGLEVEL_7 || DEFAULT_CONSOLE_LOGLEVEL_8
782 bool
Cristian Măgherușan-Stanciu9f52ea42011-07-02 00:44:39 +0300783 default n
784 help
785 This option enables additional ACPI related debug messages.
786
787 Note: This option will slightly increase the size of the coreboot image.
788
789 If unsure, say N.
Cristian Măgherușan-Stanciu9f52ea42011-07-02 00:44:39 +0300790
Uwe Hermanna953f372010-11-10 00:14:32 +0000791# Only visible if debug level is DEBUG (7) or SPEW (8) as it does additional
792# printk(BIOS_DEBUG, ...) calls.
Myles Watson6c9bc012010-09-07 22:30:15 +0000793config REALMODE_DEBUG
Stefan Reinauer95a63962012-11-13 17:00:01 -0800794 prompt "Enable debug messages for option ROM execution" if DEFAULT_CONSOLE_LOGLEVEL_7 || DEFAULT_CONSOLE_LOGLEVEL_8
795 bool
Myles Watson6c9bc012010-09-07 22:30:15 +0000796 default n
Peter Stuge5015f792010-11-10 02:00:32 +0000797 depends on PCI_OPTION_ROM_RUN_REALMODE
Myles Watson6c9bc012010-09-07 22:30:15 +0000798 help
799 This option enables additional x86emu related debug messages.
800
801 Note: This option will increase the time to emulate a ROM.
802
803 If unsure, say N.
804
Uwe Hermann01ce6012010-03-05 10:03:50 +0000805config X86EMU_DEBUG
806 bool "Output verbose x86emu debug messages"
807 default n
808 depends on PCI_OPTION_ROM_RUN_YABEL
809 help
810 This option enables additional x86emu related debug messages.
811
812 Note: This option will increase the size of the coreboot image.
813
814 If unsure, say N.
815
816config X86EMU_DEBUG_JMP
817 bool "Trace JMP/RETF"
818 default n
819 depends on X86EMU_DEBUG
820 help
821 Print information about JMP and RETF opcodes from x86emu.
822
823 Note: This option will increase the size of the coreboot image.
824
825 If unsure, say N.
826
827config X86EMU_DEBUG_TRACE
828 bool "Trace all opcodes"
829 default n
830 depends on X86EMU_DEBUG
831 help
832 Print _all_ opcodes that are executed by x86emu.
Stefan Reinauer14e22772010-04-27 06:56:47 +0000833
Uwe Hermann01ce6012010-03-05 10:03:50 +0000834 WARNING: This will produce a LOT of output and take a long time.
835
836 Note: This option will increase the size of the coreboot image.
837
838 If unsure, say N.
839
840config X86EMU_DEBUG_PNP
841 bool "Log Plug&Play accesses"
842 default n
843 depends on X86EMU_DEBUG
844 help
845 Print Plug And Play accesses made by option ROMs.
846
847 Note: This option will increase the size of the coreboot image.
848
849 If unsure, say N.
850
851config X86EMU_DEBUG_DISK
852 bool "Log Disk I/O"
853 default n
854 depends on X86EMU_DEBUG
855 help
856 Print Disk I/O related messages.
857
858 Note: This option will increase the size of the coreboot image.
859
860 If unsure, say N.
861
862config X86EMU_DEBUG_PMM
863 bool "Log PMM"
864 default n
865 depends on X86EMU_DEBUG
866 help
867 Print messages related to POST Memory Manager (PMM).
868
869 Note: This option will increase the size of the coreboot image.
870
871 If unsure, say N.
872
873
874config X86EMU_DEBUG_VBE
875 bool "Debug VESA BIOS Extensions"
876 default n
877 depends on X86EMU_DEBUG
878 help
879 Print messages related to VESA BIOS Extension (VBE) functions.
880
881 Note: This option will increase the size of the coreboot image.
882
883 If unsure, say N.
884
885config X86EMU_DEBUG_INT10
886 bool "Redirect INT10 output to console"
887 default n
888 depends on X86EMU_DEBUG
889 help
890 Let INT10 (i.e. character output) calls print messages to debug output.
891
892 Note: This option will increase the size of the coreboot image.
893
894 If unsure, say N.
895
896config X86EMU_DEBUG_INTERRUPTS
897 bool "Log intXX calls"
898 default n
899 depends on X86EMU_DEBUG
900 help
901 Print messages related to interrupt handling.
902
903 Note: This option will increase the size of the coreboot image.
904
905 If unsure, say N.
906
907config X86EMU_DEBUG_CHECK_VMEM_ACCESS
908 bool "Log special memory accesses"
909 default n
910 depends on X86EMU_DEBUG
911 help
912 Print messages related to accesses to certain areas of the virtual
913 memory (e.g. BDA (BIOS Data Area) or interrupt vectors)
914
915 Note: This option will increase the size of the coreboot image.
916
917 If unsure, say N.
918
919config X86EMU_DEBUG_MEM
920 bool "Log all memory accesses"
921 default n
922 depends on X86EMU_DEBUG
923 help
924 Print memory accesses made by option ROM.
925 Note: This also includes accesses to fetch instructions.
926
927 Note: This option will increase the size of the coreboot image.
928
929 If unsure, say N.
930
931config X86EMU_DEBUG_IO
932 bool "Log IO accesses"
933 default n
934 depends on X86EMU_DEBUG
935 help
936 Print I/O accesses made by option ROM.
937
938 Note: This option will increase the size of the coreboot image.
939
940 If unsure, say N.
941
Denis 'GNUtoo' Carikli4cdc5d62013-05-15 00:19:49 +0200942config X86EMU_DEBUG_TIMINGS
943 bool "Output timing information"
944 default n
945 depends on X86EMU_DEBUG && UDELAY_LAPIC && HAVE_MONOTONIC_TIMER
946 help
947 Print timing information needed by i915tool.
948
949 If unsure, say N.
950
Stefan Reinauer1c56d9b2012-05-10 11:27:32 -0700951config DEBUG_SPI_FLASH
952 bool "Output verbose SPI flash debug messages"
953 default n
954 depends on SPI_FLASH
955 help
956 This option enables additional SPI flash related debug messages.
957
Kyösti Mälkki3be80cc2013-06-06 10:46:37 +0300958config DEBUG_USBDEBUG
959 bool "Output verbose USB 2.0 EHCI debug dongle messages"
960 default n
961 depends on USBDEBUG
962 help
963 This option enables additional USB 2.0 debug dongle related messages.
964
965 Select this to debug the connection of usbdebug dongle. Note that
966 you need some other working console to receive the messages.
967
Stefan Reinauer8e073822012-04-04 00:07:22 +0200968if SOUTHBRIDGE_INTEL_BD82X6X && DEFAULT_CONSOLE_LOGLEVEL_8
969# Only visible with the right southbridge and loglevel.
970config DEBUG_INTEL_ME
971 bool "Verbose logging for Intel Management Engine"
972 default n
973 help
974 Enable verbose logging for Intel Management Engine driver that
975 is present on Intel 6-series chipsets.
976endif
977
Rudolf Marek7f0e9302011-09-02 23:23:41 +0200978config TRACE
979 bool "Trace function calls"
980 default n
981 help
982 If enabled, every function will print information to console once
983 the function is entered. The syntax is ~0xaaaabbbb(0xccccdddd)
984 the 0xaaaabbbb is the actual function and 0xccccdddd is EIP
Ben Gardner8420ad42015-11-18 10:46:53 -0600985 of calling function. Please note some printk related functions
Rudolf Marek7f0e9302011-09-02 23:23:41 +0200986 are omitted from trace to have good looking console dumps.
Stefan Reinauerd37ab452012-12-18 16:23:28 -0800987
988config DEBUG_COVERAGE
989 bool "Debug code coverage"
990 default n
991 depends on COVERAGE
992 help
993 If enabled, the code coverage hooks in coreboot will output some
994 information about the coverage data that is dumped.
995
Jonathan Neuschäferfc04f9b2016-06-29 21:59:32 +0200996config DEBUG_BOOT_STATE
997 bool "Debug boot state machine"
998 default n
999 help
1000 Control debugging of the boot state machine. When selected displays
1001 the state boundaries in ramstage.
1002
Nico Hubere84e62542016-10-05 17:43:56 +02001003config DEBUG_ADA_CODE
1004 bool "Compile debug code in Ada sources"
1005 default n
1006 help
1007 Add the compiler switch `-gnata` to compile code guarded by
1008 `pragma Debug`.
1009
Uwe Hermann168b11b2009-10-07 16:15:40 +00001010endmenu
1011
Martin Roth8e4aafb2016-12-15 15:25:15 -07001012
1013###############################################################################
1014# Set variables with no prompt - these can be set anywhere, and putting at
1015# the end of this file gives the most flexibility.
Nico Huber3db76532017-05-18 18:07:34 +02001016
1017source "src/lib/Kconfig"
1018
Myles Watsond73c1b52009-10-26 15:14:07 +00001019config ENABLE_APIC_EXT_ID
1020 bool
1021 default n
Myles Watson2e672732009-11-12 16:38:03 +00001022
1023config WARNINGS_ARE_ERRORS
1024 bool
Edward O'Callaghan63f6dc72014-11-18 03:17:54 +11001025 default y
Patrick Georgi436f99b2009-11-27 16:55:13 +00001026
Peter Stuge51eafde2010-10-13 06:23:02 +00001027# The four POWER_BUTTON_DEFAULT_ENABLE, POWER_BUTTON_DEFAULT_DISABLE,
1028# POWER_BUTTON_FORCE_ENABLE and POWER_BUTTON_FORCE_DISABLE options are
1029# mutually exclusive. One of these options must be selected in the
1030# mainboard Kconfig if the chipset supports enabling and disabling of
1031# the power button. Chipset code uses the ENABLE_POWER_BUTTON option set
1032# in mainboard/Kconfig to know if the button should be enabled or not.
1033
1034config POWER_BUTTON_DEFAULT_ENABLE
1035 def_bool n
1036 help
1037 Select when the board has a power button which can optionally be
1038 disabled by the user.
1039
1040config POWER_BUTTON_DEFAULT_DISABLE
1041 def_bool n
1042 help
1043 Select when the board has a power button which can optionally be
1044 enabled by the user, e.g. when the board ships with a jumper over
1045 the power switch contacts.
1046
1047config POWER_BUTTON_FORCE_ENABLE
1048 def_bool n
1049 help
1050 Select when the board requires that the power button is always
1051 enabled.
1052
1053config POWER_BUTTON_FORCE_DISABLE
1054 def_bool n
1055 help
1056 Select when the board requires that the power button is always
1057 disabled, e.g. when it has been hardwired to ground.
1058
1059config POWER_BUTTON_IS_OPTIONAL
1060 bool
1061 default y if POWER_BUTTON_DEFAULT_ENABLE || POWER_BUTTON_DEFAULT_DISABLE
1062 default n if !(POWER_BUTTON_DEFAULT_ENABLE || POWER_BUTTON_DEFAULT_DISABLE)
1063 help
1064 Internal option that controls ENABLE_POWER_BUTTON visibility.
Duncan Laurie72748002013-10-31 08:26:23 -07001065
1066config REG_SCRIPT
1067 bool
Duncan Laurie72748002013-10-31 08:26:23 -07001068 default n
1069 help
1070 Internal option that controls whether we compile in register scripts.
Furquan Shaikh99ac98f2014-04-23 10:18:48 -07001071
Furquan Shaikh99ac98f2014-04-23 10:18:48 -07001072config MAX_REBOOT_CNT
1073 int
1074 default 3
Timothy Pearson17ada2e2015-03-18 01:31:34 -05001075 help
1076 Internal option that sets the maximum number of bootblock executions allowed
1077 with the normal image enabled before assuming the normal image is defective
Vadim Bendebury9c9c3362014-07-23 09:40:02 -07001078 and switching to the fallback image.
Martin Roth59ff3402016-02-09 09:06:46 -07001079
Lee Leahyfc3741f2016-05-26 17:12:17 -07001080config CREATE_BOARD_CHECKLIST
1081 bool
1082 default n
1083 help
1084 When selected, creates a webpage showing the implementation status for
1085 the board. Routines highlighted in green are complete, yellow are
1086 optional and red are required and must be implemented. A table is
1087 produced for each stage of the boot process except the bootblock. The
1088 red items may be used as an implementation checklist for the board.
1089
1090config MAKE_CHECKLIST_PUBLIC
1091 bool
1092 default n
1093 help
1094 When selected, build/$(CONFIG_MAINBOARD_PART_NUMBER)_checklist.html
1095 is copied into the Documentation/$(CONFIG_MAINBOARD_VENDOR)/Board
1096 directory.
1097
1098config CHECKLIST_DATA_FILE_LOCATION
1099 string
1100 help
1101 Location of the <stage>_complete.dat and <stage>_optional.dat files
1102 that are consumed during checklist processing. <stage>_complete.dat
1103 contains the symbols that are expected to be in the resulting image.
1104 <stage>_optional.dat is a subset of <stage>_complete.dat and contains
1105 a list of weak symbols which the resulting image may consume. Other
1106 symbols contained only in <stage>_complete.dat will be flagged as
1107 required and not implemented if a weak implementation is found in the
1108 resulting image.
Nico Hubere0ed9022016-10-07 12:58:17 +02001109
Martin Roth8e4aafb2016-12-15 15:25:15 -07001110config UNCOMPRESSED_RAMSTAGE
1111 bool
1112
1113config NO_XIP_EARLY_STAGES
1114 bool
1115 default n if ARCH_X86
1116 default y
1117 help
1118 Identify if early stages are eXecute-In-Place(XIP).
1119
1120config EARLY_CBMEM_INIT
1121 def_bool !LATE_CBMEM_INIT
1122
1123config EARLY_CBMEM_LIST
1124 bool
1125 default n
1126 help
1127 Enable display of CBMEM during romstage and postcar.
1128
1129config RELOCATABLE_MODULES
1130 bool
1131 help
1132 If RELOCATABLE_MODULES is selected then support is enabled for
1133 building relocatable modules in the RAM stage. Those modules can be
1134 loaded anywhere and all the relocations are handled automatically.
1135
1136config NO_STAGE_CACHE
1137 bool
1138 help
1139 Do not save any component in stage cache for resume path. On resume,
1140 all components would be read back from CBFS again.
1141
1142config GENERIC_GPIO_LIB
1143 bool
1144 help
1145 If enabled, compile the generic GPIO library. A "generic" GPIO
1146 implies configurability usually found on SoCs, particularly the
1147 ability to control internal pull resistors.
1148
1149config GENERIC_SPD_BIN
1150 bool
1151 help
1152 If enabled, add support for adding spd.hex files in cbfs as spd.bin
1153 and locating it runtime to load SPD. Additionally provide provision to
1154 fetch SPD over SMBus.
1155
1156config DIMM_MAX
1157 int
1158 default 4
1159 depends on GENERIC_SPD_BIN
1160 help
1161 Total number of memory DIMM slots available on motherboard.
1162 It is multiplication of number of channel to number of DIMMs per
1163 channel
1164
1165config DIMM_SPD_SIZE
1166 int
1167 default 256
Martin Roth8e4aafb2016-12-15 15:25:15 -07001168 help
1169 Total SPD size that will be used for DIMM.
1170 Ex: DDR3 256, DDR4 512.
1171
Kane Chen66f1f382017-10-16 19:40:18 +08001172config SPD_READ_BY_WORD
1173 bool
1174
Martin Roth8e4aafb2016-12-15 15:25:15 -07001175config BOOTBLOCK_CUSTOM
1176 # To be selected by arch, SoC or mainboard if it does not want use the normal
1177 # src/lib/bootblock.c#main() C entry point.
1178 bool
1179
1180config C_ENVIRONMENT_BOOTBLOCK
1181 # To be selected by arch or platform if a C environment is available during the
1182 # bootblock. Normally this signifies availability of RW memory (e.g. SRAM).
1183 bool
1184
Martin Roth75e5cb72016-12-15 15:05:37 -07001185###############################################################################
1186# Set default values for symbols created before mainboards. This allows the
1187# option to be displayed in the general menu, but the default to be loaded in
1188# the mainboard if desired.
1189config COMPRESS_RAMSTAGE
1190 default y if !UNCOMPRESSED_RAMSTAGE
1191
1192config COMPRESS_PRERAM_STAGES
1193 depends on !ARCH_X86
1194 default y
1195
1196config INCLUDE_CONFIG_FILE
1197 default y
1198
Martin Roth75e5cb72016-12-15 15:05:37 -07001199config BOOTSPLASH_FILE
1200 depends on BOOTSPLASH_IMAGE
1201 default "bootsplash.jpg"
1202
1203config CBFS_SIZE
1204 default ROM_SIZE