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Patrick Georgi0588d192009-08-12 15:00:51 +00001##
Stefan Reinauer16f515a2010-01-20 18:44:30 +00002## This file is part of the coreboot project.
Patrick Georgi0588d192009-08-12 15:00:51 +00003##
Stefan Reinauer16f515a2010-01-20 18:44:30 +00004## Copyright (C) 2009-2010 coresystems GmbH
Patrick Georgi0588d192009-08-12 15:00:51 +00005##
Stefan Reinauer16f515a2010-01-20 18:44:30 +00006## This program is free software; you can redistribute it and/or modify
7## it under the terms of the GNU General Public License as published by
8## the Free Software Foundation; version 2 of the License.
9##
10## This program is distributed in the hope that it will be useful,
11## but WITHOUT ANY WARRANTY; without even the implied warranty of
12## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13## GNU General Public License for more details.
14##
15## You should have received a copy of the GNU General Public License
16## along with this program; if not, write to the Free Software
17## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Patrick Georgi0588d192009-08-12 15:00:51 +000018##
19
20mainmenu "Coreboot Configuration"
21
Uwe Hermannc04be932009-10-05 13:55:28 +000022menu "General setup"
23
Uwe Hermanna29ad5c2009-10-18 18:35:50 +000024config EXPERT
25 bool "Expert mode"
26 help
27 This allows you to select certain advanced configuration options.
28
29 Warning: Only enable this option if you really know what you are
30 doing! You have been warned!
31
Uwe Hermannc04be932009-10-05 13:55:28 +000032config LOCALVERSION
Uwe Hermann168b11b2009-10-07 16:15:40 +000033 string "Local version string"
Uwe Hermannc04be932009-10-05 13:55:28 +000034 help
35 Append an extra string to the end of the coreboot version.
36
Uwe Hermann168b11b2009-10-07 16:15:40 +000037 This can be useful if, for instance, you want to append the
38 respective board's hostname or some other identifying string to
39 the coreboot version number, so that you can easily distinguish
40 boot logs of different boards from each other.
41
Patrick Georgi4b8a2412010-02-09 19:35:16 +000042config CBFS_PREFIX
43 string "CBFS prefix to use"
44 default "fallback"
45 help
46 Select the prefix to all files put into the image. It's "fallback"
47 by default, "normal" is a common alternative.
48
Patrick Georgi23d89cc2010-03-16 01:17:19 +000049choice
50 prompt "Compiler"
51 default COMPILER_GCC
52 help
53 This option allows you to select the compiler used for building
54 coreboot.
55
56config COMPILER_GCC
57 bool "GCC"
58config COMPILER_LLVM_CLANG
59 bool "LLVM/clang"
60endchoice
61
Patrick Georgi020f51f2010-03-14 21:25:03 +000062config SCANBUILD_ENABLE
Patrick Georgi23d89cc2010-03-16 01:17:19 +000063 bool "Build with scan-build for static analysis"
Patrick Georgi020f51f2010-03-14 21:25:03 +000064 default n
65 help
66 Changes the build process to scan-build is used.
67 Requires scan-build in path.
68
69config SCANBUILD_REPORT_LOCATION
Patrick Georgi23d89cc2010-03-16 01:17:19 +000070 string "Directory to put scan-build report in"
Patrick Georgi020f51f2010-03-14 21:25:03 +000071 default ""
72 depends on SCANBUILD_ENABLE
73 help
74 Where the scan-build report should be stored
75
Patrick Georgi516a2a72010-03-25 21:45:25 +000076config CCACHE
77 bool "ccache"
78 default n
79 help
80 Enables the use of ccache for faster builds.
81 Requires ccache in path.
82
Joe Korty6d772522010-05-19 18:41:15 +000083config USE_OPTION_TABLE
84 bool "Use CMOS for configuration values"
85 default n
Edwin Beasanteb50c7d2010-07-06 21:05:04 +000086 depends on HAVE_OPTION_TABLE
Joe Korty6d772522010-05-19 18:41:15 +000087 help
88 Enable this option if coreboot shall read options from the "CMOS"
89 NVRAM instead of using hard coded values.
90
Uwe Hermannc04be932009-10-05 13:55:28 +000091endmenu
92
Patrick Georgi0588d192009-08-12 15:00:51 +000093source src/mainboard/Kconfig
94source src/arch/i386/Kconfig
Uwe Hermann63a8f2a2009-10-26 21:42:13 +000095
96menu "Chipset"
97
98comment "CPU"
Patrick Georgi0588d192009-08-12 15:00:51 +000099source src/cpu/Kconfig
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000100comment "Northbridge"
101source src/northbridge/Kconfig
102comment "Southbridge"
103source src/southbridge/Kconfig
104comment "Super I/O"
105source src/superio/Kconfig
106comment "Devices"
107source src/devices/Kconfig
108
109endmenu
Patrick Georgi0588d192009-08-12 15:00:51 +0000110
Rudolf Marekd9c25492010-05-16 15:31:53 +0000111menu "Generic Drivers"
112source src/drivers/Kconfig
113endmenu
114
Patrick Georgi0588d192009-08-12 15:00:51 +0000115config PCI_BUS_SEGN_BITS
Myles Watson74fb8f22009-09-24 15:09:11 +0000116 int
117 default 0
Patrick Georgi892b0912009-09-24 09:03:06 +0000118
Patrick Georgi0588d192009-08-12 15:00:51 +0000119config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
Uwe Hermann5ec2c2b2009-08-25 00:53:22 +0000120 hex
Uwe Hermann748475b2009-10-09 11:47:21 +0000121 default 0x0
Patrick Georgi0588d192009-08-12 15:00:51 +0000122
123config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
Uwe Hermann5ec2c2b2009-08-25 00:53:22 +0000124 hex
Uwe Hermann748475b2009-10-09 11:47:21 +0000125 default 0x0
Patrick Georgi0588d192009-08-12 15:00:51 +0000126
127config CPU_ADDR_BITS
128 int
129 default 36
130
Patrick Georgi0588d192009-08-12 15:00:51 +0000131config LOGICAL_CPUS
Myles Watson45bb25f2009-09-22 18:49:08 +0000132 bool
133 default y
Patrick Georgi0588d192009-08-12 15:00:51 +0000134
135config PCI_ROM_RUN
Patrick Georgi698c0e0e2009-08-25 17:38:24 +0000136 bool
137 default n
Patrick Georgi0588d192009-08-12 15:00:51 +0000138
Patrick Georgi0588d192009-08-12 15:00:51 +0000139config HEAP_SIZE
140 hex
Myles Watson04000f42009-10-16 19:12:49 +0000141 default 0x4000
Patrick Georgi0588d192009-08-12 15:00:51 +0000142
Patrick Georgi0588d192009-08-12 15:00:51 +0000143config USE_PRINTK_IN_CAR
144 bool
145 default n
146
Patrick Georgi0588d192009-08-12 15:00:51 +0000147config MAX_CPUS
148 int
149 default 1
150
151config MMCONF_SUPPORT_DEFAULT
152 bool
153 default n
154
155config MMCONF_SUPPORT
156 bool
157 default n
158
Patrick Georgi91ff0df2009-10-09 12:32:52 +0000159config ATI_RAGE_XL
160 bool
Patrick Georgi91ff0df2009-10-09 12:32:52 +0000161
Patrick Georgi0588d192009-08-12 15:00:51 +0000162source src/console/Kconfig
163
164config HAVE_ACPI_RESUME
165 bool
166 default n
167
Stefan Reinauerc4f1a772010-06-05 10:03:08 +0000168config HAVE_ACPI_SLIC
169 bool
170 default n
171
Patrick Georgi0588d192009-08-12 15:00:51 +0000172config ACPI_SSDTX_NUM
173 int
174 default 0
175
Patrick Georgi0588d192009-08-12 15:00:51 +0000176config HAVE_HARD_RESET
177 bool
Patrick Georgi37bdb872010-02-27 08:39:04 +0000178 default y if BOARD_HAS_HARD_RESET
Uwe Hermann748475b2009-10-09 11:47:21 +0000179 default n
Patrick Georgi37bdb872010-02-27 08:39:04 +0000180 help
181 This variable specifies whether a given board has a hard_reset
182 function, no matter if it's provided by board code or chipset code.
183
Patrick Georgi0588d192009-08-12 15:00:51 +0000184config HAVE_INIT_TIMER
185 bool
Patrick Georgi1f807fd2010-01-04 20:09:27 +0000186 default n if UDELAY_IO
Myles Watsond73c1b52009-10-26 15:14:07 +0000187 default y
Patrick Georgi0588d192009-08-12 15:00:51 +0000188
189config HAVE_MAINBOARD_RESOURCES
190 bool
191 default n
192
Edwin Beasanteb50c7d2010-07-06 21:05:04 +0000193config USE_OPTION_TABLE
194 bool
195 default n
196
Patrick Georgi0588d192009-08-12 15:00:51 +0000197config HAVE_OPTION_TABLE
198 bool
Edwin Beasanteb50c7d2010-07-06 21:05:04 +0000199 default n
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000200 help
201 This variable specifies whether a given board has a cmos.layout
202 file containing NVRAM/CMOS bit definitions.
Edwin Beasanteb50c7d2010-07-06 21:05:04 +0000203 It defaults to 'n' but can be selected in mainboard/*/Kconfig.
Patrick Georgi0588d192009-08-12 15:00:51 +0000204
Patrick Georgi0588d192009-08-12 15:00:51 +0000205config PIRQ_ROUTE
206 bool
207 default n
208
209config HAVE_SMI_HANDLER
210 bool
211 default n
212
213config PCI_IO_CFG_EXT
214 bool
215 default n
216
217config IOAPIC
218 bool
219 default n
220
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000221# TODO: Can probably be removed once all chipsets have kconfig options for it.
Uwe Hermann70b0cf22009-10-04 17:15:39 +0000222config VIDEO_MB
223 int
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000224 default 0
Uwe Hermann70b0cf22009-10-04 17:15:39 +0000225
Myles Watson45bb25f2009-09-22 18:49:08 +0000226config USE_WATCHDOG_ON_BOOT
227 bool
228 default n
229
230config VGA
231 bool
232 default n
233 help
234 Build board-specific VGA code.
235
236config GFXUMA
237 bool
Myles Watsond73c1b52009-10-26 15:14:07 +0000238 default n
Myles Watson45bb25f2009-09-22 18:49:08 +0000239 help
240 Enable Unified Memory Architecture for graphics.
241
Uwe Hermann5ec2c2b2009-08-25 00:53:22 +0000242# TODO
243# menu "Drivers"
Uwe Hermann168b11b2009-10-07 16:15:40 +0000244#
Uwe Hermann5ec2c2b2009-08-25 00:53:22 +0000245# endmenu
Patrick Georgi0588d192009-08-12 15:00:51 +0000246
Myles Watsond73c1b52009-10-26 15:14:07 +0000247#TODO Remove this option or make it useful.
248config HAVE_LOW_TABLES
249 bool
250 default y
251 help
252 This Option is unused in the code. Since two boards try to set it to
253 'n', they may be broken. We either need to make the option useful or
254 get rid of it. The broken boards are:
255 asus/m2v-mx_se
256 supermicro/h8dme
257
258config HAVE_HIGH_TABLES
259 bool
Stefan Reinauer13f2bb02010-02-25 13:45:08 +0000260 default y
Myles Watsond73c1b52009-10-26 15:14:07 +0000261 help
262 This variable specifies whether a given northbridge has high table
263 support.
264 It is set in northbridge/*/Kconfig.
265 Whether or not the high tables are actually written by coreboot is
266 configurable by the user via WRITE_HIGH_TABLES.
267
Myles Watsonb8e20272009-10-15 13:35:47 +0000268config HAVE_ACPI_TABLES
269 bool
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000270 help
271 This variable specifies whether a given board has ACPI table support.
272 It is usually set in mainboard/*/Kconfig.
273 Whether or not the ACPI tables are actually generated by coreboot
274 is configurable by the user via GENERATE_ACPI_TABLES.
Myles Watsonb8e20272009-10-15 13:35:47 +0000275
276config HAVE_MP_TABLE
277 bool
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000278 help
279 This variable specifies whether a given board has MP table support.
280 It is usually set in mainboard/*/Kconfig.
281 Whether or not the MP table is actually generated by coreboot
282 is configurable by the user via GENERATE_MP_TABLE.
Myles Watsonb8e20272009-10-15 13:35:47 +0000283
284config HAVE_PIRQ_TABLE
285 bool
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000286 help
287 This variable specifies whether a given board has PIRQ table support.
288 It is usually set in mainboard/*/Kconfig.
289 Whether or not the PIRQ table is actually generated by coreboot
290 is configurable by the user via GENERATE_PIRQ_TABLE.
Myles Watsonb8e20272009-10-15 13:35:47 +0000291
Myles Watsond73c1b52009-10-26 15:14:07 +0000292#These Options are here to avoid "undefined" warnings.
293#The actual selection and help texts are in the following menu.
294
295config GENERATE_ACPI_TABLES
Myles Watsonb8e20272009-10-15 13:35:47 +0000296 bool
Myles Watsond73c1b52009-10-26 15:14:07 +0000297 default HAVE_ACPI_TABLES
298
299config GENERATE_MP_TABLE
300 bool
301 default HAVE_MP_TABLE
302
303config GENERATE_PIRQ_TABLE
304 bool
305 default HAVE_PIRQ_TABLE
306
307config WRITE_HIGH_TABLES
308 bool
309 default HAVE_HIGH_TABLES
Myles Watsonb8e20272009-10-15 13:35:47 +0000310
Uwe Hermann168b11b2009-10-07 16:15:40 +0000311menu "System tables"
Myles Watson45bb25f2009-09-22 18:49:08 +0000312
Myles Watsonb8e20272009-10-15 13:35:47 +0000313config WRITE_HIGH_TABLES
Myles Watson45bb25f2009-09-22 18:49:08 +0000314 bool "Write 'high' tables to avoid being overwritten in F segment"
Myles Watsonb8e20272009-10-15 13:35:47 +0000315 depends on HAVE_HIGH_TABLES
Myles Watson45bb25f2009-09-22 18:49:08 +0000316 default y
317
318config MULTIBOOT
Uwe Hermann168b11b2009-10-07 16:15:40 +0000319 bool "Generate Multiboot tables (for GRUB2)"
Ronald G. Minnich7f91d922009-11-09 17:56:47 +0000320 default y
Myles Watson45bb25f2009-09-22 18:49:08 +0000321
Myles Watsonb8e20272009-10-15 13:35:47 +0000322config GENERATE_ACPI_TABLES
323 depends on HAVE_ACPI_TABLES
Myles Watson45bb25f2009-09-22 18:49:08 +0000324 bool "Generate ACPI tables"
Myles Watsonb8e20272009-10-15 13:35:47 +0000325 default y
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000326 help
327 Generate ACPI tables for this board.
328
329 If unsure, say Y.
Myles Watson45bb25f2009-09-22 18:49:08 +0000330
Myles Watsonb8e20272009-10-15 13:35:47 +0000331config GENERATE_MP_TABLE
332 depends on HAVE_MP_TABLE
Myles Watson45bb25f2009-09-22 18:49:08 +0000333 bool "Generate an MP table"
Myles Watsonb8e20272009-10-15 13:35:47 +0000334 default y
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000335 help
336 Generate an MP table (conforming to the Intel MultiProcessor
337 specification 1.4) for this board.
338
339 If unsure, say Y.
Myles Watson45bb25f2009-09-22 18:49:08 +0000340
Myles Watsonb8e20272009-10-15 13:35:47 +0000341config GENERATE_PIRQ_TABLE
342 depends on HAVE_PIRQ_TABLE
Myles Watson45bb25f2009-09-22 18:49:08 +0000343 bool "Generate a PIRQ table"
Myles Watsonb8e20272009-10-15 13:35:47 +0000344 default y
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000345 help
346 Generate a PIRQ table for this board.
347
348 If unsure, say Y.
Myles Watson45bb25f2009-09-22 18:49:08 +0000349
350endmenu
351
Patrick Georgi0588d192009-08-12 15:00:51 +0000352menu "Payload"
353
Patrick Georgi0588d192009-08-12 15:00:51 +0000354choice
Uwe Hermann168b11b2009-10-07 16:15:40 +0000355 prompt "Add a payload"
Patrick Georgi0588d192009-08-12 15:00:51 +0000356 default PAYLOAD_NONE
357
Uwe Hermann168b11b2009-10-07 16:15:40 +0000358config PAYLOAD_NONE
359 bool "None"
360 help
361 Select this option if you want to create an "empty" coreboot
362 ROM image for a certain mainboard, i.e. a coreboot ROM image
363 which does not yet contain a payload.
364
365 For such an image to be useful, you have to use 'cbfstool'
366 to add a payload to the ROM image later.
367
Patrick Georgi0588d192009-08-12 15:00:51 +0000368config PAYLOAD_ELF
Uwe Hermann168b11b2009-10-07 16:15:40 +0000369 bool "An ELF executable payload"
Patrick Georgi0588d192009-08-12 15:00:51 +0000370 help
371 Select this option if you have a payload image (an ELF file)
372 which coreboot should run as soon as the basic hardware
373 initialization is completed.
374
375 You will be able to specify the location and file name of the
376 payload image later.
Patrick Georgi0588d192009-08-12 15:00:51 +0000377
378endchoice
379
Patrick Georgi0588d192009-08-12 15:00:51 +0000380config FALLBACK_PAYLOAD_FILE
Cristi Magherusanb5034d42009-08-17 14:47:32 +0000381 string "Payload path and filename"
Patrick Georgi0588d192009-08-12 15:00:51 +0000382 depends on PAYLOAD_ELF
383 default "payload.elf"
384 help
Uwe Hermann5ec2c2b2009-08-25 00:53:22 +0000385 The path and filename of the ELF executable file to use as payload.
Patrick Georgi0588d192009-08-12 15:00:51 +0000386
Uwe Hermann168b11b2009-10-07 16:15:40 +0000387# TODO: Defined if no payload? Breaks build?
388config COMPRESSED_PAYLOAD_LZMA
389 bool "Use LZMA compression for payloads"
390 default y
391 depends on PAYLOAD_ELF
392 help
393 In order to reduce the size payloads take up in the ROM chip
394 coreboot can compress them using the LZMA algorithm.
395
Myles Watson04000f42009-10-16 19:12:49 +0000396config COMPRESSED_PAYLOAD_NRV2B
Peter Stuged7b37b02009-10-17 03:00:04 +0000397 bool
Myles Watson04000f42009-10-16 19:12:49 +0000398 default n
399
Peter Stugea758ca22009-09-17 16:21:31 +0000400endmenu
401
402menu "VGA BIOS"
403
404config VGA_BIOS
405 bool "Add a VGA BIOS image"
406 help
407 Select this option if you have a VGA BIOS image that you would
408 like to add to your ROM.
409
410 You will be able to specify the location and file name of the
411 image later.
412
Cristi Magherusan488c36c2009-08-17 14:46:13 +0000413config FALLBACK_VGA_BIOS_FILE
414 string "VGA BIOS path and filename"
415 depends on VGA_BIOS
416 default "vgabios.bin"
417 help
418 The path and filename of the file to use as VGA BIOS.
419
420config FALLBACK_VGA_BIOS_ID
Uwe Hermann81b3c0a2009-10-30 12:56:59 +0000421 string "VGA device PCI IDs"
Cristi Magherusan488c36c2009-08-17 14:46:13 +0000422 depends on VGA_BIOS
423 default "1106,3230"
424 help
Uwe Hermann168b11b2009-10-07 16:15:40 +0000425 The comma-separated PCI vendor and device ID that would associate
426 your VGA BIOS to your video card.
427
428 Example: 1106,3230
429
430 In the above example 1106 is the PCI vendor ID (in hex, but without
431 the "0x" prefix) and 3230 specifies the PCI device ID of the
432 video card (also in hex, without "0x" prefix).
Cristi Magherusan488c36c2009-08-17 14:46:13 +0000433
Stefan Reinauer800379f2010-03-01 08:34:19 +0000434config INTEL_MBI
435 bool "Add an MBI image"
436 depends on NORTHBRIDGE_INTEL_I82830
437 help
438 Select this option if you have an Intel MBI image that you would
439 like to add to your ROM.
440
441 You will be able to specify the location and file name of the
442 image later.
443
444config FALLBACK_MBI_FILE
445 string "Intel MBI path and filename"
446 depends on INTEL_MBI
447 default "mbi.bin"
448 help
449 The path and filename of the file to use as VGA BIOS.
450
451endmenu
452
453menu "Bootsplash"
454 depends on PCI_OPTION_ROM_RUN_YABEL
455
456config BOOTSPLASH
457 prompt "Show graphical bootsplash"
458 bool
459 depends on PCI_OPTION_ROM_RUN_YABEL
460 help
461 This option shows a graphical bootsplash screen. The grapics are
462 loaded from the CBFS file bootsplash.jpg.
463
464config FALLBACK_BOOTSPLASH_FILE
465 string "Bootsplash path and filename"
466 depends on BOOTSPLASH
467 default "bootsplash.jpg"
468 help
Stefan Reinauer14e22772010-04-27 06:56:47 +0000469 The path and filename of the file to use as graphical bootsplash
470 screen. The file format has to be jpg.
Stefan Reinauer800379f2010-03-01 08:34:19 +0000471
472# TODO: Turn this into a "choice".
473config FRAMEBUFFER_VESA_MODE
474 prompt "VESA framebuffer video mode"
475 hex
476 default 0x117
477 depends on BOOTSPLASH
478 help
479 This option sets the resolution used for the coreboot framebuffer and
480 bootsplash screen. Set to 0x117 for 1024x768x16. A diligent soul will
481 some day make this a "choice".
482
483config COREBOOT_KEEP_FRAMEBUFFER
484 prompt "Keep VESA framebuffer"
485 bool
486 depends on BOOTSPLASH
487 help
488 This option keeps the framebuffer mode set after coreboot finishes
489 execution. If this option is enabled, coreboot will pass a
490 framebuffer entry in its coreboot table and the payload will need a
491 framebuffer driver. If this option is disabled, coreboot will switch
492 back to text mode before handing control to a payload.
493
Patrick Georgi0588d192009-08-12 15:00:51 +0000494endmenu
495
Uwe Hermann168b11b2009-10-07 16:15:40 +0000496menu "Debugging"
497
498# TODO: Better help text and detailed instructions.
Patrick Georgi0588d192009-08-12 15:00:51 +0000499config GDB_STUB
Uwe Hermann5ec2c2b2009-08-25 00:53:22 +0000500 bool "GDB debugging support"
Patrick Georgi0588d192009-08-12 15:00:51 +0000501 default y
502 help
Uwe Hermann5ec2c2b2009-08-25 00:53:22 +0000503 If enabled, you will be able to set breakpoints for gdb debugging.
504 See src/arch/i386/lib/c_start.S for details.
Patrick Georgi0588d192009-08-12 15:00:51 +0000505
Uwe Hermann01ce6012010-03-05 10:03:50 +0000506config DEBUG_RAM_SETUP
507 bool "Output verbose RAM init debug messages"
508 default n
509 depends on (NORTHBRIDGE_AMD_AMDFAM10 \
510 || NORTHBRIDGE_AMD_AMDK8 \
511 || NORTHBRIDGE_VIA_CN700 \
512 || NORTHBRIDGE_VIA_CX700 \
513 || NORTHBRIDGE_VIA_VX800 \
514 || NORTHBRIDGE_INTEL_E7501 \
515 || NORTHBRIDGE_INTEL_I440BX \
516 || NORTHBRIDGE_INTEL_I82810 \
517 || NORTHBRIDGE_INTEL_I82830 \
518 || NORTHBRIDGE_INTEL_I945)
519 help
520 This option enables additional RAM init related debug messages.
521 It is recommended to enable this when debugging issues on your
522 board which might be RAM init related.
523
524 Note: This option will increase the size of the coreboot image.
525
526 If unsure, say N.
527
Myles Watson80e914ff2010-06-01 19:25:31 +0000528config DEBUG_PIRQ
529 bool "Check PIRQ table consistency"
530 default n
531 depends on GENERATE_PIRQ_TABLE
532 help
533 If unsure, say N.
534
Uwe Hermann01ce6012010-03-05 10:03:50 +0000535config DEBUG_SMBUS
536 bool "Output verbose SMBus debug messages"
537 default n
538 depends on (SOUTHBRIDGE_VIA_VT8237R \
539 || NORTHBRIDGE_VIA_VX800 \
540 || NORTHBRIDGE_VIA_CX700 \
Stefan Reinauer8f2c6162010-04-06 21:50:21 +0000541 || NORTHBRIDGE_AMD_AMDK8 \
Stefan Reinauer8a9268452010-04-07 03:40:37 +0000542 || NORTHBRIDGE_AMD_AMDFAM10 \
Myles Watson80e914ff2010-06-01 19:25:31 +0000543 || BOARD_LIPPERT_SPACERUNNER_LX \
Stefan Reinauer8a9268452010-04-07 03:40:37 +0000544 || SOUTHBRIDGE_VIA_VT8231)
Uwe Hermann01ce6012010-03-05 10:03:50 +0000545 help
546 This option enables additional SMBus (and SPD) debug messages.
547
548 Note: This option will increase the size of the coreboot image.
549
550 If unsure, say N.
551
552config DEBUG_SMI
553 bool "Output verbose SMI debug messages"
554 default n
555 depends on HAVE_SMI_HANDLER
556 help
557 This option enables additional SMI related debug messages.
558
559 Note: This option will increase the size of the coreboot image.
560
561 If unsure, say N.
562
563config X86EMU_DEBUG
564 bool "Output verbose x86emu debug messages"
565 default n
566 depends on PCI_OPTION_ROM_RUN_YABEL
567 help
568 This option enables additional x86emu related debug messages.
569
570 Note: This option will increase the size of the coreboot image.
571
572 If unsure, say N.
573
574config X86EMU_DEBUG_JMP
575 bool "Trace JMP/RETF"
576 default n
577 depends on X86EMU_DEBUG
578 help
579 Print information about JMP and RETF opcodes from x86emu.
580
581 Note: This option will increase the size of the coreboot image.
582
583 If unsure, say N.
584
585config X86EMU_DEBUG_TRACE
586 bool "Trace all opcodes"
587 default n
588 depends on X86EMU_DEBUG
589 help
590 Print _all_ opcodes that are executed by x86emu.
Stefan Reinauer14e22772010-04-27 06:56:47 +0000591
Uwe Hermann01ce6012010-03-05 10:03:50 +0000592 WARNING: This will produce a LOT of output and take a long time.
593
594 Note: This option will increase the size of the coreboot image.
595
596 If unsure, say N.
597
598config X86EMU_DEBUG_PNP
599 bool "Log Plug&Play accesses"
600 default n
601 depends on X86EMU_DEBUG
602 help
603 Print Plug And Play accesses made by option ROMs.
604
605 Note: This option will increase the size of the coreboot image.
606
607 If unsure, say N.
608
609config X86EMU_DEBUG_DISK
610 bool "Log Disk I/O"
611 default n
612 depends on X86EMU_DEBUG
613 help
614 Print Disk I/O related messages.
615
616 Note: This option will increase the size of the coreboot image.
617
618 If unsure, say N.
619
620config X86EMU_DEBUG_PMM
621 bool "Log PMM"
622 default n
623 depends on X86EMU_DEBUG
624 help
625 Print messages related to POST Memory Manager (PMM).
626
627 Note: This option will increase the size of the coreboot image.
628
629 If unsure, say N.
630
631
632config X86EMU_DEBUG_VBE
633 bool "Debug VESA BIOS Extensions"
634 default n
635 depends on X86EMU_DEBUG
636 help
637 Print messages related to VESA BIOS Extension (VBE) functions.
638
639 Note: This option will increase the size of the coreboot image.
640
641 If unsure, say N.
642
643config X86EMU_DEBUG_INT10
644 bool "Redirect INT10 output to console"
645 default n
646 depends on X86EMU_DEBUG
647 help
648 Let INT10 (i.e. character output) calls print messages to debug output.
649
650 Note: This option will increase the size of the coreboot image.
651
652 If unsure, say N.
653
654config X86EMU_DEBUG_INTERRUPTS
655 bool "Log intXX calls"
656 default n
657 depends on X86EMU_DEBUG
658 help
659 Print messages related to interrupt handling.
660
661 Note: This option will increase the size of the coreboot image.
662
663 If unsure, say N.
664
665config X86EMU_DEBUG_CHECK_VMEM_ACCESS
666 bool "Log special memory accesses"
667 default n
668 depends on X86EMU_DEBUG
669 help
670 Print messages related to accesses to certain areas of the virtual
671 memory (e.g. BDA (BIOS Data Area) or interrupt vectors)
672
673 Note: This option will increase the size of the coreboot image.
674
675 If unsure, say N.
676
677config X86EMU_DEBUG_MEM
678 bool "Log all memory accesses"
679 default n
680 depends on X86EMU_DEBUG
681 help
682 Print memory accesses made by option ROM.
683 Note: This also includes accesses to fetch instructions.
684
685 Note: This option will increase the size of the coreboot image.
686
687 If unsure, say N.
688
689config X86EMU_DEBUG_IO
690 bool "Log IO accesses"
691 default n
692 depends on X86EMU_DEBUG
693 help
694 Print I/O accesses made by option ROM.
695
696 Note: This option will increase the size of the coreboot image.
697
698 If unsure, say N.
699
Stefan Reinauer5c503922010-03-13 22:07:15 +0000700config LLSHELL
701 bool "Built-in low-level shell"
702 default n
703 help
704 If enabled, you will have a low level shell to examine your machine.
705 Put llshell() in your (romstage) code to start the shell.
706 See src/arch/i386/llshell/llshell.inc for details.
707
Uwe Hermann168b11b2009-10-07 16:15:40 +0000708endmenu
709
Myles Watson8f74c582009-10-20 16:10:04 +0000710config LIFT_BSP_APIC_ID
711 bool
712 default n
Myles Watsond73c1b52009-10-26 15:14:07 +0000713
714# These probably belong somewhere else, but they are needed somewhere.
715config AP_CODE_IN_CAR
716 bool
717 default n
718
Myles Watsond73c1b52009-10-26 15:14:07 +0000719config ENABLE_APIC_EXT_ID
720 bool
721 default n
Myles Watson2e672732009-11-12 16:38:03 +0000722
723config WARNINGS_ARE_ERRORS
724 bool
725 default n
Patrick Georgi436f99b2009-11-27 16:55:13 +0000726
727config ID_SECTION_OFFSET
728 hex
729 default 0x10
Patrick Georgicc669262010-03-14 21:31:05 +0000730
731source src/Kconfig.deprecated_options