pirq_routing: Allow routing with more than 4 PIRQ links

pirq_routing_irqs assumed that only four links are available for PIRQ
routing, INTA to INTD. Some chipsets provide more, up to INTH.
When pirq_routing_irqs found a link number greater than 4 in the pirq table,
it would not assign that IRQ. This is a shame, as it limits the flexibility
of routing IRQs.
Make the maximum number of links a Kconfig variable, and modify the code to
respect it. This works beatifully on the VX900, which provides 8 routable
While we're at it, also refactor pirq_routing_irqs, and add some much
needed comments.
Rename pirq_routing_irqs to pirq_route_irqs to demistify the role of this
The copyrights added were determined from git log filename.

Change-Id: I4b565315404c65b871406f616474e2cc9e6e013e
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/1482
Tested-by: build bot (Jenkins)
diff --git a/src/Kconfig b/src/Kconfig
index 469266d..e0062dd 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -1,6 +1,7 @@
 ## This file is part of the coreboot project.
+## Copyright (C) 2012 Alexandru Gagniuc <mr.nuke.me@gmail.com>
 ## Copyright (C) 2009-2010 coresystems GmbH
 ## This program is free software; you can redistribute it and/or modify
@@ -374,6 +375,17 @@
 	  Whether or not the PIRQ table is actually generated by coreboot
 	  is configurable by the user via GENERATE_PIRQ_TABLE.
+	int
+	default 4
+	help
+	  This variable specifies the number of PIRQ interrupt links which are
+	  routable. On most chipsets, this is 4, INTA through INTD. Some
+	  chipsets offer more than four links, commonly up to INTH. They may
+	  also have a separate link for ATA or IOAPIC interrupts. When the PIRQ
+	  table specifies links greater than 4, pirq_route_irqs will not
+	  function properly, unless this variable is correctly set.
 #These Options are here to avoid "undefined" warnings.
 #The actual selection and help texts are in the following menu.