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Patrick Georgi0588d192009-08-12 15:00:51 +00001##
Stefan Reinauer16f515a2010-01-20 18:44:30 +00002## This file is part of the coreboot project.
Patrick Georgi0588d192009-08-12 15:00:51 +00003##
Alexandru Gagniuc70c660f2012-08-23 02:32:58 -05004## Copyright (C) 2012 Alexandru Gagniuc <mr.nuke.me@gmail.com>
Stefan Reinauer16f515a2010-01-20 18:44:30 +00005## Copyright (C) 2009-2010 coresystems GmbH
Patrick Georgi0588d192009-08-12 15:00:51 +00006##
Stefan Reinauer16f515a2010-01-20 18:44:30 +00007## This program is free software; you can redistribute it and/or modify
8## it under the terms of the GNU General Public License as published by
9## the Free Software Foundation; version 2 of the License.
10##
11## This program is distributed in the hope that it will be useful,
12## but WITHOUT ANY WARRANTY; without even the implied warranty of
13## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14## GNU General Public License for more details.
15##
16## You should have received a copy of the GNU General Public License
17## along with this program; if not, write to the Free Software
Paul Menzela46a7122013-02-23 18:37:27 +010018## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Patrick Georgi0588d192009-08-12 15:00:51 +000019##
20
Uwe Hermannad8c95f2012-04-12 22:00:03 +020021mainmenu "coreboot configuration"
Patrick Georgi0588d192009-08-12 15:00:51 +000022
Uwe Hermannc04be932009-10-05 13:55:28 +000023menu "General setup"
24
Uwe Hermanna29ad5c2009-10-18 18:35:50 +000025config EXPERT
26 bool "Expert mode"
27 help
28 This allows you to select certain advanced configuration options.
29
30 Warning: Only enable this option if you really know what you are
31 doing! You have been warned!
32
Uwe Hermannc04be932009-10-05 13:55:28 +000033config LOCALVERSION
Uwe Hermann168b11b2009-10-07 16:15:40 +000034 string "Local version string"
Uwe Hermannc04be932009-10-05 13:55:28 +000035 help
36 Append an extra string to the end of the coreboot version.
37
Uwe Hermann168b11b2009-10-07 16:15:40 +000038 This can be useful if, for instance, you want to append the
39 respective board's hostname or some other identifying string to
40 the coreboot version number, so that you can easily distinguish
41 boot logs of different boards from each other.
42
Patrick Georgi4b8a2412010-02-09 19:35:16 +000043config CBFS_PREFIX
44 string "CBFS prefix to use"
45 default "fallback"
46 help
47 Select the prefix to all files put into the image. It's "fallback"
48 by default, "normal" is a common alternative.
49
Patrick Georgi23d89cc2010-03-16 01:17:19 +000050choice
Uwe Hermannad8c95f2012-04-12 22:00:03 +020051 prompt "Compiler to use"
Patrick Georgi23d89cc2010-03-16 01:17:19 +000052 default COMPILER_GCC
53 help
54 This option allows you to select the compiler used for building
55 coreboot.
56
57config COMPILER_GCC
58 bool "GCC"
Uwe Hermannad8c95f2012-04-12 22:00:03 +020059 help
60 Use the GNU Compiler Collection (GCC) to build coreboot.
61
62 For details see http://gcc.gnu.org.
63
Patrick Georgi23d89cc2010-03-16 01:17:19 +000064config COMPILER_LLVM_CLANG
65 bool "LLVM/clang"
Uwe Hermannad8c95f2012-04-12 22:00:03 +020066 help
67 Use LLVM/clang to build coreboot.
68
69 For details see http://clang.llvm.org.
70
Patrick Georgi23d89cc2010-03-16 01:17:19 +000071endchoice
72
Patrick Georgi9b0de712013-12-29 18:45:23 +010073config ANY_TOOLCHAIN
74 bool "Allow building with any toolchain"
75 default n
76 depends on COMPILER_GCC
77 help
78 Many toolchains break when building coreboot since it uses quite
79 unusual linker features. Unless developers explicitely request it,
80 we'll have to assume that they use their distro compiler by mistake.
81 Make sure that using patched compilers is a conscious decision.
82
Patrick Georgi020f51f2010-03-14 21:25:03 +000083config SCANBUILD_ENABLE
Uwe Hermannad8c95f2012-04-12 22:00:03 +020084 bool "Build with scan-build for static code analysis"
Patrick Georgi020f51f2010-03-14 21:25:03 +000085 default n
86 help
Uwe Hermannad8c95f2012-04-12 22:00:03 +020087 Changes the build process to use scan-build (a utility for
88 running the clang static code analyzer from the command line).
89
90 Requires the scan-build utility in your system $PATH.
91
92 For details see http://clang-analyzer.llvm.org/scan-build.html.
Patrick Georgi020f51f2010-03-14 21:25:03 +000093
94config SCANBUILD_REPORT_LOCATION
Uwe Hermannad8c95f2012-04-12 22:00:03 +020095 string "Directory for the scan-build report(s)"
Patrick Georgi020f51f2010-03-14 21:25:03 +000096 default ""
97 depends on SCANBUILD_ENABLE
98 help
Uwe Hermannad8c95f2012-04-12 22:00:03 +020099 Directory where the scan-build reports should be stored in. The
100 reports are stored in subdirectories of the form 'yyyy-mm-dd-*'
101 in the specified directory.
102
103 If this setting is left empty, the coreboot top-level directory
104 will be used to store the report subdirectories.
Patrick Georgi020f51f2010-03-14 21:25:03 +0000105
Patrick Georgi516a2a72010-03-25 21:45:25 +0000106config CCACHE
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200107 bool "Use ccache to speed up (re)compilation"
Patrick Georgi516a2a72010-03-25 21:45:25 +0000108 default n
109 help
110 Enables the use of ccache for faster builds.
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200111
112 Requires the ccache utility in your system $PATH.
113
114 For details see https://ccache.samba.org.
Patrick Georgi516a2a72010-03-25 21:45:25 +0000115
Stefan Reinauer9bf78102010-08-09 13:28:18 +0000116config SCONFIG_GENPARSER
117 bool "Generate SCONFIG parser using flex and bison"
118 default n
119 depends on EXPERT
120 help
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200121 Enable this option if you are working on the sconfig device tree
122 parser and made changes to sconfig.l and sconfig.y.
123
Stefan Reinauer9bf78102010-08-09 13:28:18 +0000124 Otherwise, say N.
125
Joe Korty6d772522010-05-19 18:41:15 +0000126config USE_OPTION_TABLE
127 bool "Use CMOS for configuration values"
128 default n
Edwin Beasanteb50c7d2010-07-06 21:05:04 +0000129 depends on HAVE_OPTION_TABLE
Joe Korty6d772522010-05-19 18:41:15 +0000130 help
131 Enable this option if coreboot shall read options from the "CMOS"
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200132 NVRAM instead of using hard-coded values.
Joe Korty6d772522010-05-19 18:41:15 +0000133
Sven Schnelle8eee19d2011-05-02 19:53:04 +0000134config COMPRESS_RAMSTAGE
135 bool "Compress ramstage with LZMA"
136 default y
137 help
138 Compress ramstage to save memory in the flash image. Note
139 that decompression might slow down booting if the boot flash
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200140 is connected through a slow link (i.e. SPI).
Sven Schnelle8eee19d2011-05-02 19:53:04 +0000141
Cristian Măgherușan-Stanciud367b002011-06-19 03:03:28 +0200142config INCLUDE_CONFIG_FILE
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200143 bool "Include the coreboot .config file into the ROM image"
Cristian Măgherușan-Stanciud367b002011-06-19 03:03:28 +0200144 default y
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200145 help
146 Include the .config file that was used to compile coreboot
147 in the (CBFS) ROM image. This is useful if you want to know which
148 options were used to build a specific coreboot.rom image.
149
150 Saying Y here will increase the image size by 2-3kB.
151
152 You can use the following command to easily list the options:
153
154 grep -a CONFIG_ coreboot.rom
155
156 Alternatively, you can also use cbfstool to print the image
157 contents (including the raw 'config' item we're looking for).
158
159 Example:
160
161 $ cbfstool coreboot.rom print
162 coreboot.rom: 4096 kB, bootblocksize 1008, romsize 4194304,
163 offset 0x0
164 Alignment: 64 bytes
Steve Goodrichf0269122012-05-18 11:18:47 -0600165
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200166 Name Offset Type Size
167 cmos_layout.bin 0x0 cmos layout 1159
168 fallback/romstage 0x4c0 stage 339756
169 fallback/coreboot_ram 0x53440 stage 186664
170 fallback/payload 0x80dc0 payload 51526
171 config 0x8d740 raw 3324
172 (empty) 0x8e480 null 3610440
Cristian Măgherușan-Stanciud367b002011-06-19 03:03:28 +0200173
Kyösti Mälkkif8bf5a12013-10-11 22:08:02 +0300174config EARLY_CBMEM_INIT
175 bool
176 default n
177 help
178 Make coreboot initialize the CBMEM structures while running in ROM
179 stage. This is useful when the ROM stage wants to communicate
180 some, for instance, execution timestamps. It needs support in
181 romstage.c and should be enabled by the board's Kconfig.
182
Kyösti Mälkkideb2cb22014-03-28 23:46:45 +0200183config BROKEN_CAR_MIGRATE
184 bool
185 default y if !EARLY_CBMEM_INIT && HAVE_ACPI_RESUME
186 default n
187 help
188 Many boards use CAR_GLOBAL but have no EARLY_CBMEM_INIT and
189 manage CAR migration on S3 resume path only. Couple boards use
190 CAR_GLOBAL and never do CAR migration.
191
Aaron Durbindf3a1092013-03-13 12:41:44 -0500192config DYNAMIC_CBMEM
193 bool "The CBMEM space is dynamically grown."
194 default n
Kyösti Mälkkif8bf5a12013-10-11 22:08:02 +0300195 select EARLY_CBMEM_INIT
Aaron Durbindf3a1092013-03-13 12:41:44 -0500196 help
197 Instead of reserving a static amount of CBMEM space the CBMEM
198 area grows dynamically. CBMEM can be used both in romstage (after
199 memory initialization) and ramstage.
200
Vadim Bendebury9202473d2011-09-21 14:46:43 -0700201config COLLECT_TIMESTAMPS
202 bool "Create a table of timestamps collected during boot"
Kyösti Mälkki26447932013-10-11 21:14:59 +0300203 default n
Vadim Bendebury9202473d2011-09-21 14:46:43 -0700204 help
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200205 Make coreboot create a table of timer-ID/timer-value pairs to
206 allow measuring time spent at different phases of the boot process.
207
Patrick Georgi7e9b9d82012-04-30 21:06:10 +0200208config USE_BLOBS
209 bool "Allow use of binary-only repository"
210 default n
211 help
212 This draws in the blobs repository, which contains binary files that
213 might be required for some chipsets or boards.
214 This flag ensures that a "Free" option remains available for users.
215
Stefan Reinauerd37ab452012-12-18 16:23:28 -0800216config COVERAGE
217 bool "Code coverage support"
218 depends on COMPILER_GCC
219 default n
220 help
221 Add code coverage support for coreboot. This will store code
222 coverage information in CBMEM for extraction from user space.
223 If unsure, say N.
224
Uwe Hermannc04be932009-10-05 13:55:28 +0000225endmenu
226
Patrick Georgi0588d192009-08-12 15:00:51 +0000227source src/mainboard/Kconfig
Stefan Reinauer8aedcbc2010-12-16 23:37:17 +0000228
229# This option is used to set the architecture of a mainboard to X86.
230# It is usually set in mainboard/*/Kconfig.
231config ARCH_X86
232 bool
233 default n
Ronald G. Minnich78a16672012-11-29 16:28:21 -0800234 select PCI
235
David Hendricks5367e472012-11-28 20:16:28 -0800236config ARCH_ARMV7
237 bool
238 default n
239
Ronald G. Minnich6e3728b2012-11-27 10:36:06 -0800240# Warning: The file is included whether or not the if is here.
241# but the if controls how the evaluation occurs.
Stefan Reinauer8aedcbc2010-12-16 23:37:17 +0000242if ARCH_X86
Stefan Reinauer8677a232010-12-11 20:33:41 +0000243source src/arch/x86/Kconfig
Stefan Reinauer8aedcbc2010-12-16 23:37:17 +0000244endif
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000245
David Hendricks5367e472012-11-28 20:16:28 -0800246if ARCH_ARMV7
247source src/arch/armv7/Kconfig
248endif
249
Gabe Black5fbfc912013-07-07 13:52:37 -0700250config HAVE_ARCH_MEMSET
251 bool
252 default n
253
254config HAVE_ARCH_MEMCPY
255 bool
256 default n
257
Gabe Black545c0ca2013-07-07 14:04:26 -0700258config HAVE_ARCH_MEMMOVE
259 bool
260 default n
261
Peter Stuge4d77ed92014-02-07 03:58:24 +0100262source src/vendorcode/Kconfig
263
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000264menu "Chipset"
265
266comment "CPU"
Patrick Georgi0588d192009-08-12 15:00:51 +0000267source src/cpu/Kconfig
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000268comment "Northbridge"
269source src/northbridge/Kconfig
270comment "Southbridge"
271source src/southbridge/Kconfig
272comment "Super I/O"
273source src/superio/Kconfig
Sven Schnelle7592e8b2011-01-27 11:43:03 +0000274comment "Embedded Controllers"
275source src/ec/Kconfig
Aaron Durbin9a7d7bc2013-09-07 00:41:48 -0500276comment "SoC"
277source src/soc/Kconfig
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000278
279endmenu
Patrick Georgi0588d192009-08-12 15:00:51 +0000280
Stefan Reinauer8d711552012-11-30 12:34:04 -0800281source src/device/Kconfig
Stefan Reinauer95a63962012-11-13 17:00:01 -0800282
Rudolf Marekd9c25492010-05-16 15:31:53 +0000283menu "Generic Drivers"
284source src/drivers/Kconfig
285endmenu
286
Patrick Georgi0588d192009-08-12 15:00:51 +0000287config HEAP_SIZE
288 hex
Myles Watson04000f42009-10-16 19:12:49 +0000289 default 0x4000
Patrick Georgi0588d192009-08-12 15:00:51 +0000290
Patrick Georgi0588d192009-08-12 15:00:51 +0000291config MAX_CPUS
292 int
293 default 1
294
295config MMCONF_SUPPORT_DEFAULT
296 bool
297 default n
298
299config MMCONF_SUPPORT
300 bool
301 default n
302
Patrick Georgi0588d192009-08-12 15:00:51 +0000303source src/console/Kconfig
304
305config HAVE_ACPI_RESUME
306 bool
307 default n
308
Stefan Reinauerc4f1a772010-06-05 10:03:08 +0000309config HAVE_ACPI_SLIC
310 bool
311 default n
312
Patrick Georgi0588d192009-08-12 15:00:51 +0000313config ACPI_SSDTX_NUM
314 int
315 default 0
316
Patrick Georgi0588d192009-08-12 15:00:51 +0000317config HAVE_HARD_RESET
318 bool
Uwe Hermann748475b2009-10-09 11:47:21 +0000319 default n
Patrick Georgi37bdb872010-02-27 08:39:04 +0000320 help
321 This variable specifies whether a given board has a hard_reset
322 function, no matter if it's provided by board code or chipset code.
323
Patrick Georgi0588d192009-08-12 15:00:51 +0000324config HAVE_INIT_TIMER
325 bool
Patrick Georgi1f807fd2010-01-04 20:09:27 +0000326 default n if UDELAY_IO
Myles Watsond73c1b52009-10-26 15:14:07 +0000327 default y
Patrick Georgi0588d192009-08-12 15:00:51 +0000328
Aaron Durbina4217912013-04-29 22:31:51 -0500329config HAVE_MONOTONIC_TIMER
330 def_bool n
331 help
332 The board/chipset provides a monotonic timer.
333
Aaron Durbin340ca912013-04-30 09:58:12 -0500334config TIMER_QUEUE
335 def_bool n
336 depends on HAVE_MONOTONIC_TIMER
337 help
Kyösti Mälkkiecd84242013-09-13 07:57:49 +0300338 Provide a timer queue for performing time-based callbacks.
Aaron Durbin340ca912013-04-30 09:58:12 -0500339
Aaron Durbin4409a5e2013-05-06 12:20:52 -0500340config COOP_MULTITASKING
341 def_bool n
Aaron Durbin38c326d2013-05-06 12:22:23 -0500342 depends on TIMER_QUEUE && ARCH_X86
Aaron Durbin4409a5e2013-05-06 12:20:52 -0500343 help
344 Cooperative multitasking allows callbacks to be multiplexed on the
345 main thread of ramstage. With this enabled it allows for multiple
346 execution paths to take place when they have udelay() calls within
347 their code.
348
349config NUM_THREADS
350 int
351 default 4
352 depends on COOP_MULTITASKING
353 help
354 How many execution threads to cooperatively multitask with.
355
zbaof7223732012-04-13 13:42:15 +0800356config HIGH_SCRATCH_MEMORY_SIZE
357 hex
358 default 0x0
359
Patrick Georgi0588d192009-08-12 15:00:51 +0000360config HAVE_OPTION_TABLE
361 bool
Edwin Beasanteb50c7d2010-07-06 21:05:04 +0000362 default n
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000363 help
364 This variable specifies whether a given board has a cmos.layout
365 file containing NVRAM/CMOS bit definitions.
Edwin Beasanteb50c7d2010-07-06 21:05:04 +0000366 It defaults to 'n' but can be selected in mainboard/*/Kconfig.
Patrick Georgi0588d192009-08-12 15:00:51 +0000367
Patrick Georgi0588d192009-08-12 15:00:51 +0000368config PIRQ_ROUTE
369 bool
370 default n
371
372config HAVE_SMI_HANDLER
373 bool
374 default n
375
376config PCI_IO_CFG_EXT
377 bool
378 default n
379
380config IOAPIC
381 bool
382 default n
383
Stefan Reinauer5b635792012-08-16 14:05:42 -0700384config CBFS_SIZE
385 hex
386 default ROM_SIZE
387
Kyösti Mälkki107f72e2014-01-06 11:06:26 +0200388config CACHE_ROM_SIZE_OVERRIDE
Stefan Reinauer5b635792012-08-16 14:05:42 -0700389 hex
Kyösti Mälkki107f72e2014-01-06 11:06:26 +0200390 default 0
Stefan Reinauer5b635792012-08-16 14:05:42 -0700391
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000392# TODO: Can probably be removed once all chipsets have kconfig options for it.
Uwe Hermann70b0cf22009-10-04 17:15:39 +0000393config VIDEO_MB
394 int
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000395 default 0
Uwe Hermann70b0cf22009-10-04 17:15:39 +0000396
Myles Watson45bb25f2009-09-22 18:49:08 +0000397config USE_WATCHDOG_ON_BOOT
398 bool
399 default n
400
401config VGA
402 bool
403 default n
404 help
405 Build board-specific VGA code.
406
407config GFXUMA
408 bool
Myles Watsond73c1b52009-10-26 15:14:07 +0000409 default n
Myles Watson45bb25f2009-09-22 18:49:08 +0000410 help
411 Enable Unified Memory Architecture for graphics.
412
Aaron Durbinad935522012-12-24 14:28:37 -0600413config RELOCATABLE_MODULES
414 bool "Relocatable Modules"
415 default n
416 help
417 If RELOCATABLE_MODULES is selected then support is enabled for
418 building relocatable modules in the ram stage. Those modules can be
419 loaded anywhere and all the relocations are handled automatically.
420
Aaron Durbin8e4a3552013-02-08 17:28:04 -0600421config RELOCATABLE_RAMSTAGE
Aaron Durbindd4a6d22013-02-27 22:50:12 -0600422 depends on (RELOCATABLE_MODULES && DYNAMIC_CBMEM)
Aaron Durbin8e4a3552013-02-08 17:28:04 -0600423 bool "Build the ramstage to be relocatable in 32-bit address space."
424 default n
425 help
426 The reloctable ramstage support allows for the ramstage to be built
427 as a relocatable module. The stage loader can identify a place
428 out of the OS way so that copying memory is unnecessary during an S3
429 wake. When selecting this option the romstage is responsible for
430 determing a stack location to use for loading the ramstage.
431
Aaron Durbin75e29742013-10-10 20:37:04 -0500432config CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM
433 depends on RELOCATABLE_RAMSTAGE
434 bool "Cache the relocated ramstage outside of cbmem."
435 default n
436 help
437 The relocated ramstage is saved in an area specified by the
438 by the board and/or chipset.
439
Aaron Durbin6ac34052013-10-24 08:55:51 -0500440config HAVE_REFCODE_BLOB
441 depends on ARCH_X86
442 bool "An external reference code blob should be put into cbfs."
443 default n
444 help
445 The reference code blob will be placed into cbfs.
446
447if HAVE_REFCODE_BLOB
448
449config REFCODE_BLOB_FILE
450 string "Path and filename to reference code blob."
451 default "refcode.elf"
452 help
453 The path and filename to the file to be added to cbfs.
454
455endif # HAVE_REFCODE_BLOB
456
Myles Watsonb8e20272009-10-15 13:35:47 +0000457config HAVE_ACPI_TABLES
458 bool
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000459 help
460 This variable specifies whether a given board has ACPI table support.
461 It is usually set in mainboard/*/Kconfig.
462 Whether or not the ACPI tables are actually generated by coreboot
463 is configurable by the user via GENERATE_ACPI_TABLES.
Myles Watsonb8e20272009-10-15 13:35:47 +0000464
465config HAVE_MP_TABLE
466 bool
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000467 help
468 This variable specifies whether a given board has MP table support.
469 It is usually set in mainboard/*/Kconfig.
470 Whether or not the MP table is actually generated by coreboot
471 is configurable by the user via GENERATE_MP_TABLE.
Myles Watsonb8e20272009-10-15 13:35:47 +0000472
473config HAVE_PIRQ_TABLE
474 bool
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000475 help
476 This variable specifies whether a given board has PIRQ table support.
477 It is usually set in mainboard/*/Kconfig.
478 Whether or not the PIRQ table is actually generated by coreboot
479 is configurable by the user via GENERATE_PIRQ_TABLE.
Myles Watsonb8e20272009-10-15 13:35:47 +0000480
Alexandru Gagniuc70c660f2012-08-23 02:32:58 -0500481config MAX_PIRQ_LINKS
482 int
483 default 4
484 help
485 This variable specifies the number of PIRQ interrupt links which are
486 routable. On most chipsets, this is 4, INTA through INTD. Some
487 chipsets offer more than four links, commonly up to INTH. They may
488 also have a separate link for ATA or IOAPIC interrupts. When the PIRQ
489 table specifies links greater than 4, pirq_route_irqs will not
490 function properly, unless this variable is correctly set.
491
Myles Watsond73c1b52009-10-26 15:14:07 +0000492#These Options are here to avoid "undefined" warnings.
493#The actual selection and help texts are in the following menu.
494
Uwe Hermann168b11b2009-10-07 16:15:40 +0000495menu "System tables"
Myles Watson45bb25f2009-09-22 18:49:08 +0000496
Myles Watsonb8e20272009-10-15 13:35:47 +0000497config GENERATE_ACPI_TABLES
Stefan Reinauer56cd70b2012-11-13 17:33:08 -0800498 prompt "Generate ACPI tables" if HAVE_ACPI_TABLES
499 bool
500 default HAVE_ACPI_TABLES
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000501 help
502 Generate ACPI tables for this board.
503
504 If unsure, say Y.
Myles Watson45bb25f2009-09-22 18:49:08 +0000505
Myles Watsonb8e20272009-10-15 13:35:47 +0000506config GENERATE_MP_TABLE
Stefan Reinauer56cd70b2012-11-13 17:33:08 -0800507 prompt "Generate an MP table" if HAVE_MP_TABLE || DRIVERS_GENERIC_IOAPIC
508 bool
509 default HAVE_MP_TABLE || DRIVERS_GENERIC_IOAPIC
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000510 help
511 Generate an MP table (conforming to the Intel MultiProcessor
512 specification 1.4) for this board.
513
514 If unsure, say Y.
Myles Watson45bb25f2009-09-22 18:49:08 +0000515
Myles Watsonb8e20272009-10-15 13:35:47 +0000516config GENERATE_PIRQ_TABLE
Stefan Reinauer56cd70b2012-11-13 17:33:08 -0800517 prompt "Generate a PIRQ table" if HAVE_PIRQ_TABLE
518 bool
519 default HAVE_PIRQ_TABLE
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000520 help
521 Generate a PIRQ table for this board.
522
523 If unsure, say Y.
Myles Watson45bb25f2009-09-22 18:49:08 +0000524
Sven Schnelle164bcfd2011-08-14 20:56:34 +0200525config GENERATE_SMBIOS_TABLES
526 depends on ARCH_X86
527 bool "Generate SMBIOS tables"
528 default y
529 help
530 Generate SMBIOS tables for this board.
531
532 If unsure, say Y.
533
Myles Watson45bb25f2009-09-22 18:49:08 +0000534endmenu
535
Patrick Georgi0588d192009-08-12 15:00:51 +0000536menu "Payload"
537
Patrick Georgi0588d192009-08-12 15:00:51 +0000538choice
Uwe Hermann168b11b2009-10-07 16:15:40 +0000539 prompt "Add a payload"
Stefan Reinauerf1939bb2010-12-30 17:39:50 +0000540 default PAYLOAD_NONE if !ARCH_X86
541 default PAYLOAD_SEABIOS if ARCH_X86
Patrick Georgi0588d192009-08-12 15:00:51 +0000542
Uwe Hermann168b11b2009-10-07 16:15:40 +0000543config PAYLOAD_NONE
544 bool "None"
545 help
546 Select this option if you want to create an "empty" coreboot
547 ROM image for a certain mainboard, i.e. a coreboot ROM image
548 which does not yet contain a payload.
549
550 For such an image to be useful, you have to use 'cbfstool'
551 to add a payload to the ROM image later.
552
Patrick Georgi0588d192009-08-12 15:00:51 +0000553config PAYLOAD_ELF
Uwe Hermann168b11b2009-10-07 16:15:40 +0000554 bool "An ELF executable payload"
Patrick Georgi0588d192009-08-12 15:00:51 +0000555 help
556 Select this option if you have a payload image (an ELF file)
557 which coreboot should run as soon as the basic hardware
558 initialization is completed.
559
560 You will be able to specify the location and file name of the
561 payload image later.
Patrick Georgi0588d192009-08-12 15:00:51 +0000562
Patrick Georgi16ae95c2013-08-31 08:26:52 +0200563config PAYLOAD_LINUX
564 bool "A Linux payload"
565 help
566 Select this option if you have a Linux bzImage which coreboot
567 should run as soon as the basic hardware initialization
568 is completed.
569
570 You will be able to specify the location and file name of the
571 payload image later.
572
Stefan Reinauerf1939bb2010-12-30 17:39:50 +0000573config PAYLOAD_SEABIOS
574 bool "SeaBIOS"
575 depends on ARCH_X86
576 help
577 Select this option if you want to build a coreboot image
578 with a SeaBIOS payload. If you don't know what this is
579 about, just leave it enabled.
580
581 See http://coreboot.org/Payloads for more information.
582
Stefan Reinauere50952f2011-04-15 03:34:05 +0000583config PAYLOAD_FILO
584 bool "FILO"
585 help
586 Select this option if you want to build a coreboot image
587 with a FILO payload. If you don't know what this is
588 about, just leave it enabled.
589
590 See http://coreboot.org/Payloads for more information.
591
Vladimir Serbinenko113a3662013-11-14 12:10:08 +0100592config PAYLOAD_GRUB2
593 bool "GRUB2"
594 help
595 Select this option if you want to build a coreboot image
596 with a GRUB2 payload. If you don't know what this is
597 about, just leave it enabled.
598
599 See http://coreboot.org/Payloads for more information.
600
Stefan Reinauercc5b3442013-01-15 17:02:58 -0800601config PAYLOAD_TIANOCORE
602 bool "Tiano Core"
603 help
604 Select this option if you want to build a coreboot image
605 with a Tiano Core payload. If you don't know what this is
606 about, just leave it enabled.
607
608 See http://coreboot.org/Payloads for more information.
609
Stefan Reinauerf1939bb2010-12-30 17:39:50 +0000610endchoice
611
612choice
613 prompt "SeaBIOS version"
614 default SEABIOS_STABLE
615 depends on PAYLOAD_SEABIOS
616
617config SEABIOS_STABLE
Idwer Vollering1a433092013-03-02 18:27:05 +0100618 bool "1.7.2.1"
Stefan Reinauerf1939bb2010-12-30 17:39:50 +0000619 help
620 Stable SeaBIOS version
621config SEABIOS_MASTER
622 bool "master"
623 help
624 Newest SeaBIOS version
Patrick Georgi0588d192009-08-12 15:00:51 +0000625endchoice
626
Peter Stugef0408582013-07-09 19:43:09 +0200627config SEABIOS_PS2_TIMEOUT
628 prompt "PS/2 keyboard controller initialization timeout (milliseconds)" if PAYLOAD_SEABIOS
Patrick Georgi1e44c3f2013-08-16 10:14:38 +0200629 default 0
Peter Stugef0408582013-07-09 19:43:09 +0200630 depends on EXPERT
631 int
632 help
633 Some PS/2 keyboard controllers don't respond to commands immediately
634 after powering on. This specifies how long SeaBIOS will wait for the
635 keyboard controller to become ready before giving up.
636
Idwer Vollering7c1a49b2014-04-01 22:47:33 +0000637config SEABIOS_THREAD_OPTIONROMS
638 prompt "Hardware init during option ROM execution" if PAYLOAD_SEABIOS
639 default n
640 bool
641 help
642 Allow hardware init to run in parallel with optionrom execution.
643
644 This can reduce boot time, but can cause some timing
645 variations during option ROM code execution. It is not
646 known if all option ROMs will behave properly with this option.
647
Stefan Reinauere50952f2011-04-15 03:34:05 +0000648choice
Vladimir Serbinenko113a3662013-11-14 12:10:08 +0100649 prompt "GRUB2 version"
650 default GRUB2_MASTER
651 depends on PAYLOAD_GRUB2
652
653config GRUB2_MASTER
654 bool "HEAD"
655 help
656 Newest GRUB2 version
657endchoice
658
659choice
Stefan Reinauere50952f2011-04-15 03:34:05 +0000660 prompt "FILO version"
661 default FILO_STABLE
662 depends on PAYLOAD_FILO
663
664config FILO_STABLE
665 bool "0.6.0"
666 help
667 Stable FILO version
668config FILO_MASTER
669 bool "HEAD"
670 help
671 Newest FILO version
672endchoice
673
Stefan Reinauerbccbbe62010-12-19 21:20:14 +0000674config PAYLOAD_FILE
Cristi Magherusanb5034d42009-08-17 14:47:32 +0000675 string "Payload path and filename"
Patrick Georgi0588d192009-08-12 15:00:51 +0000676 depends on PAYLOAD_ELF
677 default "payload.elf"
678 help
Uwe Hermann5ec2c2b2009-08-25 00:53:22 +0000679 The path and filename of the ELF executable file to use as payload.
Patrick Georgi0588d192009-08-12 15:00:51 +0000680
Stefan Reinauerf1939bb2010-12-30 17:39:50 +0000681config PAYLOAD_FILE
Patrick Georgi16ae95c2013-08-31 08:26:52 +0200682 string "Linux path and filename"
683 depends on PAYLOAD_LINUX
684 default "bzImage"
685 help
686 The path and filename of the bzImage kernel to use as payload.
687
688config PAYLOAD_FILE
Stefan Reinauerf1939bb2010-12-30 17:39:50 +0000689 depends on PAYLOAD_SEABIOS
Stefan Reinaueraff6dc22012-01-21 10:34:22 -0800690 default "$(obj)/seabios/out/bios.bin.elf"
Stefan Reinauerf1939bb2010-12-30 17:39:50 +0000691
Stefan Reinauere50952f2011-04-15 03:34:05 +0000692config PAYLOAD_FILE
693 depends on PAYLOAD_FILO
694 default "payloads/external/FILO/filo/build/filo.elf"
695
Stefan Reinauer275fb632013-02-05 13:58:29 -0800696config PAYLOAD_FILE
Vladimir Serbinenko113a3662013-11-14 12:10:08 +0100697 depends on PAYLOAD_GRUB2
698 default "payloads/external/GRUB2/grub2/build/default_payload.elf"
699
700config PAYLOAD_FILE
Stefan Reinauer275fb632013-02-05 13:58:29 -0800701 string "Tianocore firmware volume"
702 depends on PAYLOAD_TIANOCORE
703 default "COREBOOT.fd"
704 help
705 The result of a corebootPkg build
706
Uwe Hermann168b11b2009-10-07 16:15:40 +0000707# TODO: Defined if no payload? Breaks build?
708config COMPRESSED_PAYLOAD_LZMA
709 bool "Use LZMA compression for payloads"
710 default y
Vladimir Serbinenko113a3662013-11-14 12:10:08 +0100711 depends on PAYLOAD_ELF || PAYLOAD_SEABIOS || PAYLOAD_FILO || PAYLOAD_TIANOCORE || PAYLOAD_GRUB2
Uwe Hermann168b11b2009-10-07 16:15:40 +0000712 help
713 In order to reduce the size payloads take up in the ROM chip
714 coreboot can compress them using the LZMA algorithm.
715
Patrick Georgi16ae95c2013-08-31 08:26:52 +0200716config LINUX_COMMAND_LINE
717 string "Linux command line"
718 depends on PAYLOAD_LINUX
719 default ""
720 help
721 A command line to add to the Linux kernel.
722
723config LINUX_INITRD
724 string "Linux initrd"
725 depends on PAYLOAD_LINUX
726 default ""
727 help
728 An initrd image to add to the Linux kernel.
729
Peter Stugea758ca22009-09-17 16:21:31 +0000730endmenu
731
Uwe Hermann168b11b2009-10-07 16:15:40 +0000732menu "Debugging"
733
734# TODO: Better help text and detailed instructions.
Patrick Georgi0588d192009-08-12 15:00:51 +0000735config GDB_STUB
Uwe Hermann5ec2c2b2009-08-25 00:53:22 +0000736 bool "GDB debugging support"
Rudolf Marek65888022012-03-25 20:51:16 +0200737 default n
Patrick Georgi0588d192009-08-12 15:00:51 +0000738 help
Uwe Hermann5ec2c2b2009-08-25 00:53:22 +0000739 If enabled, you will be able to set breakpoints for gdb debugging.
Stefan Reinauer8677a232010-12-11 20:33:41 +0000740 See src/arch/x86/lib/c_start.S for details.
Patrick Georgi0588d192009-08-12 15:00:51 +0000741
Denis 'GNUtoo' Cariklie4cece02012-06-22 15:56:37 +0200742config GDB_WAIT
743 bool "Wait for a GDB connection"
744 default n
745 depends on GDB_STUB
746 help
747 If enabled, coreboot will wait for a GDB connection.
748
Stefan Reinauerfe422182012-05-02 16:33:18 -0700749config DEBUG_CBFS
750 bool "Output verbose CBFS debug messages"
751 default n
Stefan Reinauerfe422182012-05-02 16:33:18 -0700752 help
753 This option enables additional CBFS related debug messages.
754
Jens Rottmann0d11f2d2010-08-26 12:46:02 +0000755config HAVE_DEBUG_RAM_SETUP
756 def_bool n
757
Uwe Hermann01ce6012010-03-05 10:03:50 +0000758config DEBUG_RAM_SETUP
759 bool "Output verbose RAM init debug messages"
760 default n
Jens Rottmann0d11f2d2010-08-26 12:46:02 +0000761 depends on HAVE_DEBUG_RAM_SETUP
Uwe Hermann01ce6012010-03-05 10:03:50 +0000762 help
763 This option enables additional RAM init related debug messages.
764 It is recommended to enable this when debugging issues on your
765 board which might be RAM init related.
766
767 Note: This option will increase the size of the coreboot image.
768
769 If unsure, say N.
770
Patrick Georgie82618d2010-10-01 14:50:12 +0000771config HAVE_DEBUG_CAR
772 def_bool n
773
Peter Stuge5015f792010-11-10 02:00:32 +0000774config DEBUG_CAR
775 def_bool n
776 depends on HAVE_DEBUG_CAR
777
778if DEFAULT_CONSOLE_LOGLEVEL_7 || DEFAULT_CONSOLE_LOGLEVEL_8
Uwe Hermanna953f372010-11-10 00:14:32 +0000779# Only visible if debug level is DEBUG (7) or SPEW (8) as it does additional
780# printk(BIOS_DEBUG, ...) calls.
Patrick Georgie82618d2010-10-01 14:50:12 +0000781config DEBUG_CAR
782 bool "Output verbose Cache-as-RAM debug messages"
783 default n
Peter Stuge5015f792010-11-10 02:00:32 +0000784 depends on HAVE_DEBUG_CAR
Patrick Georgie82618d2010-10-01 14:50:12 +0000785 help
786 This option enables additional CAR related debug messages.
Peter Stuge5015f792010-11-10 02:00:32 +0000787endif
Patrick Georgie82618d2010-10-01 14:50:12 +0000788
Myles Watson80e914ff2010-06-01 19:25:31 +0000789config DEBUG_PIRQ
790 bool "Check PIRQ table consistency"
791 default n
792 depends on GENERATE_PIRQ_TABLE
793 help
794 If unsure, say N.
795
Jens Rottmann0d11f2d2010-08-26 12:46:02 +0000796config HAVE_DEBUG_SMBUS
797 def_bool n
798
Uwe Hermann01ce6012010-03-05 10:03:50 +0000799config DEBUG_SMBUS
800 bool "Output verbose SMBus debug messages"
801 default n
Jens Rottmann0d11f2d2010-08-26 12:46:02 +0000802 depends on HAVE_DEBUG_SMBUS
Uwe Hermann01ce6012010-03-05 10:03:50 +0000803 help
804 This option enables additional SMBus (and SPD) debug messages.
805
806 Note: This option will increase the size of the coreboot image.
807
808 If unsure, say N.
809
810config DEBUG_SMI
811 bool "Output verbose SMI debug messages"
812 default n
813 depends on HAVE_SMI_HANDLER
814 help
815 This option enables additional SMI related debug messages.
816
817 Note: This option will increase the size of the coreboot image.
818
819 If unsure, say N.
820
Stefan Reinauerbc0f7a62010-08-01 15:41:14 +0000821config DEBUG_SMM_RELOCATION
822 bool "Debug SMM relocation code"
823 default n
824 depends on HAVE_SMI_HANDLER
825 help
826 This option enables additional SMM handler relocation related
827 debug messages.
828
829 Note: This option will increase the size of the coreboot image.
830
831 If unsure, say N.
832
Uwe Hermanna953f372010-11-10 00:14:32 +0000833# Only visible if debug level is DEBUG (7) or SPEW (8) as it does additional
834# printk(BIOS_DEBUG, ...) calls.
835config DEBUG_MALLOC
Stefan Reinauer95a63962012-11-13 17:00:01 -0800836 prompt "Output verbose malloc debug messages" if DEFAULT_CONSOLE_LOGLEVEL_7 || DEFAULT_CONSOLE_LOGLEVEL_8
837 bool
Uwe Hermanna953f372010-11-10 00:14:32 +0000838 default n
Uwe Hermanna953f372010-11-10 00:14:32 +0000839 help
840 This option enables additional malloc related debug messages.
841
842 Note: This option will increase the size of the coreboot image.
843
844 If unsure, say N.
Cristian Măgherușan-Stanciu9f52ea42011-07-02 00:44:39 +0300845
846# Only visible if debug level is DEBUG (7) or SPEW (8) as it does additional
847# printk(BIOS_DEBUG, ...) calls.
Cristian Măgherușan-Stanciu9f52ea42011-07-02 00:44:39 +0300848config DEBUG_ACPI
Stefan Reinauer95a63962012-11-13 17:00:01 -0800849 prompt "Output verbose ACPI debug messages" if DEFAULT_CONSOLE_LOGLEVEL_7 || DEFAULT_CONSOLE_LOGLEVEL_8
850 bool
Cristian Măgherușan-Stanciu9f52ea42011-07-02 00:44:39 +0300851 default n
852 help
853 This option enables additional ACPI related debug messages.
854
855 Note: This option will slightly increase the size of the coreboot image.
856
857 If unsure, say N.
Cristian Măgherușan-Stanciu9f52ea42011-07-02 00:44:39 +0300858
Uwe Hermanna953f372010-11-10 00:14:32 +0000859# Only visible if debug level is DEBUG (7) or SPEW (8) as it does additional
860# printk(BIOS_DEBUG, ...) calls.
Myles Watson6c9bc012010-09-07 22:30:15 +0000861config REALMODE_DEBUG
Stefan Reinauer95a63962012-11-13 17:00:01 -0800862 prompt "Enable debug messages for option ROM execution" if DEFAULT_CONSOLE_LOGLEVEL_7 || DEFAULT_CONSOLE_LOGLEVEL_8
863 bool
Myles Watson6c9bc012010-09-07 22:30:15 +0000864 default n
Peter Stuge5015f792010-11-10 02:00:32 +0000865 depends on PCI_OPTION_ROM_RUN_REALMODE
Myles Watson6c9bc012010-09-07 22:30:15 +0000866 help
867 This option enables additional x86emu related debug messages.
868
869 Note: This option will increase the time to emulate a ROM.
870
871 If unsure, say N.
872
Uwe Hermann01ce6012010-03-05 10:03:50 +0000873config X86EMU_DEBUG
874 bool "Output verbose x86emu debug messages"
875 default n
876 depends on PCI_OPTION_ROM_RUN_YABEL
877 help
878 This option enables additional x86emu related debug messages.
879
880 Note: This option will increase the size of the coreboot image.
881
882 If unsure, say N.
883
884config X86EMU_DEBUG_JMP
885 bool "Trace JMP/RETF"
886 default n
887 depends on X86EMU_DEBUG
888 help
889 Print information about JMP and RETF opcodes from x86emu.
890
891 Note: This option will increase the size of the coreboot image.
892
893 If unsure, say N.
894
895config X86EMU_DEBUG_TRACE
896 bool "Trace all opcodes"
897 default n
898 depends on X86EMU_DEBUG
899 help
900 Print _all_ opcodes that are executed by x86emu.
Stefan Reinauer14e22772010-04-27 06:56:47 +0000901
Uwe Hermann01ce6012010-03-05 10:03:50 +0000902 WARNING: This will produce a LOT of output and take a long time.
903
904 Note: This option will increase the size of the coreboot image.
905
906 If unsure, say N.
907
908config X86EMU_DEBUG_PNP
909 bool "Log Plug&Play accesses"
910 default n
911 depends on X86EMU_DEBUG
912 help
913 Print Plug And Play accesses made by option ROMs.
914
915 Note: This option will increase the size of the coreboot image.
916
917 If unsure, say N.
918
919config X86EMU_DEBUG_DISK
920 bool "Log Disk I/O"
921 default n
922 depends on X86EMU_DEBUG
923 help
924 Print Disk I/O related messages.
925
926 Note: This option will increase the size of the coreboot image.
927
928 If unsure, say N.
929
930config X86EMU_DEBUG_PMM
931 bool "Log PMM"
932 default n
933 depends on X86EMU_DEBUG
934 help
935 Print messages related to POST Memory Manager (PMM).
936
937 Note: This option will increase the size of the coreboot image.
938
939 If unsure, say N.
940
941
942config X86EMU_DEBUG_VBE
943 bool "Debug VESA BIOS Extensions"
944 default n
945 depends on X86EMU_DEBUG
946 help
947 Print messages related to VESA BIOS Extension (VBE) functions.
948
949 Note: This option will increase the size of the coreboot image.
950
951 If unsure, say N.
952
953config X86EMU_DEBUG_INT10
954 bool "Redirect INT10 output to console"
955 default n
956 depends on X86EMU_DEBUG
957 help
958 Let INT10 (i.e. character output) calls print messages to debug output.
959
960 Note: This option will increase the size of the coreboot image.
961
962 If unsure, say N.
963
964config X86EMU_DEBUG_INTERRUPTS
965 bool "Log intXX calls"
966 default n
967 depends on X86EMU_DEBUG
968 help
969 Print messages related to interrupt handling.
970
971 Note: This option will increase the size of the coreboot image.
972
973 If unsure, say N.
974
975config X86EMU_DEBUG_CHECK_VMEM_ACCESS
976 bool "Log special memory accesses"
977 default n
978 depends on X86EMU_DEBUG
979 help
980 Print messages related to accesses to certain areas of the virtual
981 memory (e.g. BDA (BIOS Data Area) or interrupt vectors)
982
983 Note: This option will increase the size of the coreboot image.
984
985 If unsure, say N.
986
987config X86EMU_DEBUG_MEM
988 bool "Log all memory accesses"
989 default n
990 depends on X86EMU_DEBUG
991 help
992 Print memory accesses made by option ROM.
993 Note: This also includes accesses to fetch instructions.
994
995 Note: This option will increase the size of the coreboot image.
996
997 If unsure, say N.
998
999config X86EMU_DEBUG_IO
1000 bool "Log IO accesses"
1001 default n
1002 depends on X86EMU_DEBUG
1003 help
1004 Print I/O accesses made by option ROM.
1005
1006 Note: This option will increase the size of the coreboot image.
1007
1008 If unsure, say N.
1009
Denis 'GNUtoo' Carikli4cdc5d62013-05-15 00:19:49 +02001010config X86EMU_DEBUG_TIMINGS
1011 bool "Output timing information"
1012 default n
1013 depends on X86EMU_DEBUG && UDELAY_LAPIC && HAVE_MONOTONIC_TIMER
1014 help
1015 Print timing information needed by i915tool.
1016
1017 If unsure, say N.
1018
Stefan Reinauerdfb098d2011-11-17 12:50:54 -08001019config DEBUG_TPM
1020 bool "Output verbose TPM debug messages"
1021 default n
1022 depends on TPM
1023 help
1024 This option enables additional TPM related debug messages.
1025
Stefan Reinauer1c56d9b2012-05-10 11:27:32 -07001026config DEBUG_SPI_FLASH
1027 bool "Output verbose SPI flash debug messages"
1028 default n
1029 depends on SPI_FLASH
1030 help
1031 This option enables additional SPI flash related debug messages.
1032
Kyösti Mälkki3be80cc2013-06-06 10:46:37 +03001033config DEBUG_USBDEBUG
1034 bool "Output verbose USB 2.0 EHCI debug dongle messages"
1035 default n
1036 depends on USBDEBUG
1037 help
1038 This option enables additional USB 2.0 debug dongle related messages.
1039
1040 Select this to debug the connection of usbdebug dongle. Note that
1041 you need some other working console to receive the messages.
1042
Stefan Reinauer8e073822012-04-04 00:07:22 +02001043if SOUTHBRIDGE_INTEL_BD82X6X && DEFAULT_CONSOLE_LOGLEVEL_8
1044# Only visible with the right southbridge and loglevel.
1045config DEBUG_INTEL_ME
1046 bool "Verbose logging for Intel Management Engine"
1047 default n
1048 help
1049 Enable verbose logging for Intel Management Engine driver that
1050 is present on Intel 6-series chipsets.
1051endif
1052
Rudolf Marek7f0e9302011-09-02 23:23:41 +02001053config TRACE
1054 bool "Trace function calls"
1055 default n
1056 help
1057 If enabled, every function will print information to console once
1058 the function is entered. The syntax is ~0xaaaabbbb(0xccccdddd)
1059 the 0xaaaabbbb is the actual function and 0xccccdddd is EIP
1060 of calling function. Please note some printk releated functions
1061 are omitted from trace to have good looking console dumps.
Stefan Reinauerd37ab452012-12-18 16:23:28 -08001062
1063config DEBUG_COVERAGE
1064 bool "Debug code coverage"
1065 default n
1066 depends on COVERAGE
1067 help
1068 If enabled, the code coverage hooks in coreboot will output some
1069 information about the coverage data that is dumped.
1070
Uwe Hermann168b11b2009-10-07 16:15:40 +00001071endmenu
1072
Myles Watsond73c1b52009-10-26 15:14:07 +00001073# These probably belong somewhere else, but they are needed somewhere.
Myles Watsond73c1b52009-10-26 15:14:07 +00001074config ENABLE_APIC_EXT_ID
1075 bool
1076 default n
Myles Watson2e672732009-11-12 16:38:03 +00001077
1078config WARNINGS_ARE_ERRORS
1079 bool
Stefan Reinauer6f57b512010-07-08 16:41:05 +00001080 default y
Patrick Georgi436f99b2009-11-27 16:55:13 +00001081
Peter Stuge51eafde2010-10-13 06:23:02 +00001082# The four POWER_BUTTON_DEFAULT_ENABLE, POWER_BUTTON_DEFAULT_DISABLE,
1083# POWER_BUTTON_FORCE_ENABLE and POWER_BUTTON_FORCE_DISABLE options are
1084# mutually exclusive. One of these options must be selected in the
1085# mainboard Kconfig if the chipset supports enabling and disabling of
1086# the power button. Chipset code uses the ENABLE_POWER_BUTTON option set
1087# in mainboard/Kconfig to know if the button should be enabled or not.
1088
1089config POWER_BUTTON_DEFAULT_ENABLE
1090 def_bool n
1091 help
1092 Select when the board has a power button which can optionally be
1093 disabled by the user.
1094
1095config POWER_BUTTON_DEFAULT_DISABLE
1096 def_bool n
1097 help
1098 Select when the board has a power button which can optionally be
1099 enabled by the user, e.g. when the board ships with a jumper over
1100 the power switch contacts.
1101
1102config POWER_BUTTON_FORCE_ENABLE
1103 def_bool n
1104 help
1105 Select when the board requires that the power button is always
1106 enabled.
1107
1108config POWER_BUTTON_FORCE_DISABLE
1109 def_bool n
1110 help
1111 Select when the board requires that the power button is always
1112 disabled, e.g. when it has been hardwired to ground.
1113
1114config POWER_BUTTON_IS_OPTIONAL
1115 bool
1116 default y if POWER_BUTTON_DEFAULT_ENABLE || POWER_BUTTON_DEFAULT_DISABLE
1117 default n if !(POWER_BUTTON_DEFAULT_ENABLE || POWER_BUTTON_DEFAULT_DISABLE)
1118 help
1119 Internal option that controls ENABLE_POWER_BUTTON visibility.
Duncan Laurie72748002013-10-31 08:26:23 -07001120
1121config REG_SCRIPT
1122 bool
1123 default y if ARCH_X86
1124 default n
1125 help
1126 Internal option that controls whether we compile in register scripts.