Patrick Georgi | 0588d19 | 2009-08-12 15:00:51 +0000 | [diff] [blame] | 1 | ## |
Stefan Reinauer | 16f515a | 2010-01-20 18:44:30 +0000 | [diff] [blame] | 2 | ## This file is part of the coreboot project. |
Patrick Georgi | 0588d19 | 2009-08-12 15:00:51 +0000 | [diff] [blame] | 3 | ## |
Alexandru Gagniuc | 70c660f | 2012-08-23 02:32:58 -0500 | [diff] [blame] | 4 | ## Copyright (C) 2012 Alexandru Gagniuc <mr.nuke.me@gmail.com> |
Stefan Reinauer | 16f515a | 2010-01-20 18:44:30 +0000 | [diff] [blame] | 5 | ## Copyright (C) 2009-2010 coresystems GmbH |
Patrick Georgi | 0588d19 | 2009-08-12 15:00:51 +0000 | [diff] [blame] | 6 | ## |
Stefan Reinauer | 16f515a | 2010-01-20 18:44:30 +0000 | [diff] [blame] | 7 | ## This program is free software; you can redistribute it and/or modify |
| 8 | ## it under the terms of the GNU General Public License as published by |
| 9 | ## the Free Software Foundation; version 2 of the License. |
| 10 | ## |
| 11 | ## This program is distributed in the hope that it will be useful, |
| 12 | ## but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | ## GNU General Public License for more details. |
| 15 | ## |
Patrick Georgi | 0588d19 | 2009-08-12 15:00:51 +0000 | [diff] [blame] | 16 | |
Uwe Hermann | ad8c95f | 2012-04-12 22:00:03 +0200 | [diff] [blame] | 17 | mainmenu "coreboot configuration" |
Patrick Georgi | 0588d19 | 2009-08-12 15:00:51 +0000 | [diff] [blame] | 18 | |
Uwe Hermann | c04be93 | 2009-10-05 13:55:28 +0000 | [diff] [blame] | 19 | menu "General setup" |
| 20 | |
Lee Leahy | bb70c40 | 2017-04-03 07:38:20 -0700 | [diff] [blame] | 21 | config COREBOOT_BUILD |
| 22 | bool |
| 23 | default y |
| 24 | |
Uwe Hermann | c04be93 | 2009-10-05 13:55:28 +0000 | [diff] [blame] | 25 | config LOCALVERSION |
Uwe Hermann | 168b11b | 2009-10-07 16:15:40 +0000 | [diff] [blame] | 26 | string "Local version string" |
Uwe Hermann | c04be93 | 2009-10-05 13:55:28 +0000 | [diff] [blame] | 27 | help |
| 28 | Append an extra string to the end of the coreboot version. |
| 29 | |
Uwe Hermann | 168b11b | 2009-10-07 16:15:40 +0000 | [diff] [blame] | 30 | This can be useful if, for instance, you want to append the |
| 31 | respective board's hostname or some other identifying string to |
| 32 | the coreboot version number, so that you can easily distinguish |
| 33 | boot logs of different boards from each other. |
| 34 | |
Patrick Georgi | 4b8a241 | 2010-02-09 19:35:16 +0000 | [diff] [blame] | 35 | config CBFS_PREFIX |
| 36 | string "CBFS prefix to use" |
| 37 | default "fallback" |
| 38 | help |
| 39 | Select the prefix to all files put into the image. It's "fallback" |
| 40 | by default, "normal" is a common alternative. |
| 41 | |
Patrick Georgi | 23d89cc | 2010-03-16 01:17:19 +0000 | [diff] [blame] | 42 | choice |
Uwe Hermann | ad8c95f | 2012-04-12 22:00:03 +0200 | [diff] [blame] | 43 | prompt "Compiler to use" |
Patrick Georgi | 23d89cc | 2010-03-16 01:17:19 +0000 | [diff] [blame] | 44 | default COMPILER_GCC |
| 45 | help |
| 46 | This option allows you to select the compiler used for building |
| 47 | coreboot. |
Martin Roth | a5a628e8 | 2016-01-19 12:01:09 -0700 | [diff] [blame] | 48 | You must build the coreboot crosscompiler for the board that you |
| 49 | have selected. |
| 50 | |
| 51 | To build all the GCC crosscompilers (takes a LONG time), run: |
| 52 | make crossgcc |
| 53 | |
| 54 | For help on individual architectures, run the command: |
| 55 | make help_toolchain |
Patrick Georgi | 23d89cc | 2010-03-16 01:17:19 +0000 | [diff] [blame] | 56 | |
| 57 | config COMPILER_GCC |
| 58 | bool "GCC" |
Uwe Hermann | ad8c95f | 2012-04-12 22:00:03 +0200 | [diff] [blame] | 59 | help |
| 60 | Use the GNU Compiler Collection (GCC) to build coreboot. |
| 61 | |
| 62 | For details see http://gcc.gnu.org. |
| 63 | |
Patrick Georgi | 23d89cc | 2010-03-16 01:17:19 +0000 | [diff] [blame] | 64 | config COMPILER_LLVM_CLANG |
Martin Roth | a5a628e8 | 2016-01-19 12:01:09 -0700 | [diff] [blame] | 65 | bool "LLVM/clang (TESTING ONLY - Not currently working)" |
Uwe Hermann | ad8c95f | 2012-04-12 22:00:03 +0200 | [diff] [blame] | 66 | help |
Martin Roth | a5a628e8 | 2016-01-19 12:01:09 -0700 | [diff] [blame] | 67 | Use LLVM/clang to build coreboot. To use this, you must build the |
| 68 | coreboot version of the clang compiler. Run the command |
| 69 | make clang |
| 70 | Note that this option is not currently working correctly and should |
| 71 | really only be selected if you're trying to work on getting clang |
| 72 | operational. |
Uwe Hermann | ad8c95f | 2012-04-12 22:00:03 +0200 | [diff] [blame] | 73 | |
| 74 | For details see http://clang.llvm.org. |
| 75 | |
Patrick Georgi | 23d89cc | 2010-03-16 01:17:19 +0000 | [diff] [blame] | 76 | endchoice |
| 77 | |
Patrick Georgi | 9b0de71 | 2013-12-29 18:45:23 +0100 | [diff] [blame] | 78 | config ANY_TOOLCHAIN |
| 79 | bool "Allow building with any toolchain" |
| 80 | default n |
Patrick Georgi | 9b0de71 | 2013-12-29 18:45:23 +0100 | [diff] [blame] | 81 | help |
| 82 | Many toolchains break when building coreboot since it uses quite |
| 83 | unusual linker features. Unless developers explicitely request it, |
| 84 | we'll have to assume that they use their distro compiler by mistake. |
| 85 | Make sure that using patched compilers is a conscious decision. |
| 86 | |
Patrick Georgi | 516a2a7 | 2010-03-25 21:45:25 +0000 | [diff] [blame] | 87 | config CCACHE |
Uwe Hermann | ad8c95f | 2012-04-12 22:00:03 +0200 | [diff] [blame] | 88 | bool "Use ccache to speed up (re)compilation" |
Patrick Georgi | 516a2a7 | 2010-03-25 21:45:25 +0000 | [diff] [blame] | 89 | default n |
| 90 | help |
| 91 | Enables the use of ccache for faster builds. |
Uwe Hermann | ad8c95f | 2012-04-12 22:00:03 +0200 | [diff] [blame] | 92 | |
| 93 | Requires the ccache utility in your system $PATH. |
| 94 | |
| 95 | For details see https://ccache.samba.org. |
Patrick Georgi | 516a2a7 | 2010-03-25 21:45:25 +0000 | [diff] [blame] | 96 | |
Sol Boucher | 69b88bf | 2015-02-26 11:47:19 -0800 | [diff] [blame] | 97 | config FMD_GENPARSER |
| 98 | bool "Generate flashmap descriptor parser using flex and bison" |
| 99 | default n |
Sol Boucher | 69b88bf | 2015-02-26 11:47:19 -0800 | [diff] [blame] | 100 | help |
| 101 | Enable this option if you are working on the flashmap descriptor |
| 102 | parser and made changes to fmd_scanner.l or fmd_parser.y. |
| 103 | |
| 104 | Otherwise, say N to use the provided pregenerated scanner/parser. |
| 105 | |
Martin Roth | f411b70 | 2017-04-09 19:12:42 -0600 | [diff] [blame] | 106 | config UTIL_GENPARSER |
Denis 'GNUtoo' Carikli | 780e931 | 2018-01-10 14:35:55 +0100 | [diff] [blame] | 107 | bool "Generate SCONFIG & BINCFG parser using flex and bison" |
Stefan Reinauer | 9bf7810 | 2010-08-09 13:28:18 +0000 | [diff] [blame] | 108 | default n |
Stefan Reinauer | 9bf7810 | 2010-08-09 13:28:18 +0000 | [diff] [blame] | 109 | help |
Uwe Hermann | ad8c95f | 2012-04-12 22:00:03 +0200 | [diff] [blame] | 110 | Enable this option if you are working on the sconfig device tree |
Denis 'GNUtoo' Carikli | 780e931 | 2018-01-10 14:35:55 +0100 | [diff] [blame] | 111 | parser or bincfg and made changes to the .l or .y files. |
Uwe Hermann | ad8c95f | 2012-04-12 22:00:03 +0200 | [diff] [blame] | 112 | |
Sol Boucher | 69b88bf | 2015-02-26 11:47:19 -0800 | [diff] [blame] | 113 | Otherwise, say N to use the provided pregenerated scanner/parser. |
Stefan Reinauer | 9bf7810 | 2010-08-09 13:28:18 +0000 | [diff] [blame] | 114 | |
Joe Korty | 6d77252 | 2010-05-19 18:41:15 +0000 | [diff] [blame] | 115 | config USE_OPTION_TABLE |
| 116 | bool "Use CMOS for configuration values" |
Edwin Beasant | eb50c7d | 2010-07-06 21:05:04 +0000 | [diff] [blame] | 117 | depends on HAVE_OPTION_TABLE |
Joe Korty | 6d77252 | 2010-05-19 18:41:15 +0000 | [diff] [blame] | 118 | help |
| 119 | Enable this option if coreboot shall read options from the "CMOS" |
Uwe Hermann | ad8c95f | 2012-04-12 22:00:03 +0200 | [diff] [blame] | 120 | NVRAM instead of using hard-coded values. |
Joe Korty | 6d77252 | 2010-05-19 18:41:15 +0000 | [diff] [blame] | 121 | |
Timothy Pearson | f20c6e8 | 2015-02-14 16:15:31 -0600 | [diff] [blame] | 122 | config STATIC_OPTION_TABLE |
| 123 | bool "Load default configuration values into CMOS on each boot" |
Timothy Pearson | f20c6e8 | 2015-02-14 16:15:31 -0600 | [diff] [blame] | 124 | depends on USE_OPTION_TABLE |
| 125 | help |
| 126 | Enable this option to reset "CMOS" NVRAM values to default on |
| 127 | every boot. Use this if you want the NVRAM configuration to |
| 128 | never be modified from its default values. |
| 129 | |
Sven Schnelle | 8eee19d | 2011-05-02 19:53:04 +0000 | [diff] [blame] | 130 | config COMPRESS_RAMSTAGE |
| 131 | bool "Compress ramstage with LZMA" |
Martin Roth | 75e5cb7 | 2016-12-15 15:05:37 -0700 | [diff] [blame] | 132 | # Default value set at the end of the file |
Sven Schnelle | 8eee19d | 2011-05-02 19:53:04 +0000 | [diff] [blame] | 133 | help |
| 134 | Compress ramstage to save memory in the flash image. Note |
| 135 | that decompression might slow down booting if the boot flash |
Uwe Hermann | ad8c95f | 2012-04-12 22:00:03 +0200 | [diff] [blame] | 136 | is connected through a slow link (i.e. SPI). |
Sven Schnelle | 8eee19d | 2011-05-02 19:53:04 +0000 | [diff] [blame] | 137 | |
Julius Werner | 09f2921 | 2015-09-29 13:51:35 -0700 | [diff] [blame] | 138 | config COMPRESS_PRERAM_STAGES |
| 139 | bool "Compress romstage and verstage with LZ4" |
Martin Roth | f2e0461 | 2016-03-09 15:50:23 -0700 | [diff] [blame] | 140 | depends on !ARCH_X86 |
Martin Roth | 75e5cb7 | 2016-12-15 15:05:37 -0700 | [diff] [blame] | 141 | # Default value set at the end of the file |
Julius Werner | 09f2921 | 2015-09-29 13:51:35 -0700 | [diff] [blame] | 142 | help |
| 143 | Compress romstage and (if it exists) verstage with LZ4 to save flash |
| 144 | space and speed up boot, since the time for reading the image from SPI |
| 145 | (and in the vboot case verifying it) is usually much greater than the |
| 146 | time spent decompressing. Doesn't work for XIP stages (assume all |
| 147 | ARCH_X86 for now) for obvious reasons. |
| 148 | |
Julius Werner | 99f4683 | 2018-05-16 14:14:04 -0700 | [diff] [blame] | 149 | config COMPRESS_BOOTBLOCK |
| 150 | bool |
| 151 | help |
| 152 | This option can be used to compress the bootblock with LZ4 and attach |
| 153 | a small self-decompression stub to its front. This can drastically |
| 154 | reduce boot time on platforms where the bootblock is loaded over a |
| 155 | very slow connection and bootblock size trumps all other factors for |
Jonathan Neuschäfer | 2930a72 | 2018-09-29 17:42:52 +0200 | [diff] [blame] | 156 | speed. Since using this option usually requires changes to the |
Julius Werner | 99f4683 | 2018-05-16 14:14:04 -0700 | [diff] [blame] | 157 | SoC memlayout and possibly extra support code, it should not be |
| 158 | user-selectable. (There's no real point in offering this to the user |
| 159 | anyway... if it works and saves boot time, you would always want it.) |
| 160 | |
Cristian Măgherușan-Stanciu | d367b00 | 2011-06-19 03:03:28 +0200 | [diff] [blame] | 161 | config INCLUDE_CONFIG_FILE |
Uwe Hermann | ad8c95f | 2012-04-12 22:00:03 +0200 | [diff] [blame] | 162 | bool "Include the coreboot .config file into the ROM image" |
Martin Roth | 75e5cb7 | 2016-12-15 15:05:37 -0700 | [diff] [blame] | 163 | # Default value set at the end of the file |
Uwe Hermann | ad8c95f | 2012-04-12 22:00:03 +0200 | [diff] [blame] | 164 | help |
| 165 | Include the .config file that was used to compile coreboot |
| 166 | in the (CBFS) ROM image. This is useful if you want to know which |
| 167 | options were used to build a specific coreboot.rom image. |
| 168 | |
Daniele Forsi | 53847a2 | 2014-07-22 18:00:56 +0200 | [diff] [blame] | 169 | Saying Y here will increase the image size by 2-3KB. |
Uwe Hermann | ad8c95f | 2012-04-12 22:00:03 +0200 | [diff] [blame] | 170 | |
| 171 | You can use the following command to easily list the options: |
| 172 | |
| 173 | grep -a CONFIG_ coreboot.rom |
| 174 | |
| 175 | Alternatively, you can also use cbfstool to print the image |
| 176 | contents (including the raw 'config' item we're looking for). |
| 177 | |
| 178 | Example: |
| 179 | |
| 180 | $ cbfstool coreboot.rom print |
| 181 | coreboot.rom: 4096 kB, bootblocksize 1008, romsize 4194304, |
| 182 | offset 0x0 |
| 183 | Alignment: 64 bytes |
Steve Goodrich | f026912 | 2012-05-18 11:18:47 -0600 | [diff] [blame] | 184 | |
Uwe Hermann | ad8c95f | 2012-04-12 22:00:03 +0200 | [diff] [blame] | 185 | Name Offset Type Size |
| 186 | cmos_layout.bin 0x0 cmos layout 1159 |
| 187 | fallback/romstage 0x4c0 stage 339756 |
Daniele Forsi | 53847a2 | 2014-07-22 18:00:56 +0200 | [diff] [blame] | 188 | fallback/ramstage 0x53440 stage 186664 |
Uwe Hermann | ad8c95f | 2012-04-12 22:00:03 +0200 | [diff] [blame] | 189 | fallback/payload 0x80dc0 payload 51526 |
| 190 | config 0x8d740 raw 3324 |
| 191 | (empty) 0x8e480 null 3610440 |
Cristian Măgherușan-Stanciu | d367b00 | 2011-06-19 03:03:28 +0200 | [diff] [blame] | 192 | |
Vadim Bendebury | 9202473d | 2011-09-21 14:46:43 -0700 | [diff] [blame] | 193 | config COLLECT_TIMESTAMPS |
| 194 | bool "Create a table of timestamps collected during boot" |
Paul Menzel | 4e4a763 | 2015-10-11 11:57:44 +0200 | [diff] [blame] | 195 | default y if ARCH_X86 |
Vadim Bendebury | 9202473d | 2011-09-21 14:46:43 -0700 | [diff] [blame] | 196 | help |
Uwe Hermann | ad8c95f | 2012-04-12 22:00:03 +0200 | [diff] [blame] | 197 | Make coreboot create a table of timer-ID/timer-value pairs to |
| 198 | allow measuring time spent at different phases of the boot process. |
| 199 | |
Martin Roth | b22bbe2 | 2018-03-07 15:32:16 -0700 | [diff] [blame] | 200 | config TIMESTAMPS_ON_CONSOLE |
| 201 | bool "Print the timestamp values on the console" |
| 202 | default n |
| 203 | depends on COLLECT_TIMESTAMPS |
| 204 | help |
| 205 | Print the timestamps to the debug console if enabled at level spew. |
| 206 | |
Patrick Georgi | 7e9b9d8 | 2012-04-30 21:06:10 +0200 | [diff] [blame] | 207 | config USE_BLOBS |
| 208 | bool "Allow use of binary-only repository" |
Patrick Georgi | 7e9b9d8 | 2012-04-30 21:06:10 +0200 | [diff] [blame] | 209 | help |
| 210 | This draws in the blobs repository, which contains binary files that |
| 211 | might be required for some chipsets or boards. |
| 212 | This flag ensures that a "Free" option remains available for users. |
| 213 | |
Stefan Reinauer | d37ab45 | 2012-12-18 16:23:28 -0800 | [diff] [blame] | 214 | config COVERAGE |
| 215 | bool "Code coverage support" |
| 216 | depends on COMPILER_GCC |
Stefan Reinauer | d37ab45 | 2012-12-18 16:23:28 -0800 | [diff] [blame] | 217 | help |
| 218 | Add code coverage support for coreboot. This will store code |
| 219 | coverage information in CBMEM for extraction from user space. |
| 220 | If unsure, say N. |
| 221 | |
Ryan Salsamendi | ab37e9a | 2017-06-11 21:07:31 -0700 | [diff] [blame] | 222 | config UBSAN |
| 223 | bool "Undefined behavior sanitizer support" |
| 224 | default n |
| 225 | help |
| 226 | Instrument the code with checks for undefined behavior. If unsure, |
| 227 | say N because it adds a small performance penalty and may abort |
| 228 | on code that happens to work in spite of the UB. |
| 229 | |
Kyösti Mälkki | 7904e72 | 2018-06-03 14:55:10 +0300 | [diff] [blame] | 230 | config NO_RELOCATABLE_RAMSTAGE |
| 231 | bool |
| 232 | default n if ARCH_X86 |
| 233 | default y |
| 234 | |
Stefan Reinauer | 58470e3 | 2014-10-17 13:08:36 +0200 | [diff] [blame] | 235 | config RELOCATABLE_RAMSTAGE |
Kyösti Mälkki | 730df3c | 2016-06-18 07:39:31 +0300 | [diff] [blame] | 236 | bool |
Kyösti Mälkki | 730df3c | 2016-06-18 07:39:31 +0300 | [diff] [blame] | 237 | default !NO_RELOCATABLE_RAMSTAGE |
Vladimir Serbinenko | 633352c | 2015-05-30 22:21:37 +0200 | [diff] [blame] | 238 | select RELOCATABLE_MODULES |
Stefan Reinauer | 58470e3 | 2014-10-17 13:08:36 +0200 | [diff] [blame] | 239 | help |
| 240 | The reloctable ramstage support allows for the ramstage to be built |
| 241 | as a relocatable module. The stage loader can identify a place |
| 242 | out of the OS way so that copying memory is unnecessary during an S3 |
| 243 | wake. When selecting this option the romstage is responsible for |
| 244 | determing a stack location to use for loading the ramstage. |
| 245 | |
| 246 | config CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM |
| 247 | depends on RELOCATABLE_RAMSTAGE |
Arthur Heymans | 410f256 | 2017-01-25 15:27:52 +0100 | [diff] [blame] | 248 | bool |
Stefan Reinauer | 58470e3 | 2014-10-17 13:08:36 +0200 | [diff] [blame] | 249 | help |
| 250 | The relocated ramstage is saved in an area specified by the |
| 251 | by the board and/or chipset. |
| 252 | |
Stefan Reinauer | 58470e3 | 2014-10-17 13:08:36 +0200 | [diff] [blame] | 253 | config UPDATE_IMAGE |
| 254 | bool "Update existing coreboot.rom image" |
Stefan Reinauer | 58470e3 | 2014-10-17 13:08:36 +0200 | [diff] [blame] | 255 | help |
| 256 | If this option is enabled, no new coreboot.rom file |
| 257 | is created. Instead it is expected that there already |
| 258 | is a suitable file for further processing. |
| 259 | The bootblock will not be modified. |
| 260 | |
Martin Roth | 5942e06 | 2016-01-20 14:59:21 -0700 | [diff] [blame] | 261 | If unsure, select 'N' |
| 262 | |
Konstantin Aladyshev | 6544cb3 | 2015-01-24 18:52:10 +0400 | [diff] [blame] | 263 | config BOOTSPLASH_IMAGE |
| 264 | bool "Add a bootsplash image" |
| 265 | help |
| 266 | Select this option if you have a bootsplash image that you would |
| 267 | like to add to your ROM. |
| 268 | |
| 269 | This will only add the image to the ROM. To actually run it check |
| 270 | options under 'Display' section. |
| 271 | |
| 272 | config BOOTSPLASH_FILE |
| 273 | string "Bootsplash path and filename" |
| 274 | depends on BOOTSPLASH_IMAGE |
Martin Roth | 75e5cb7 | 2016-12-15 15:05:37 -0700 | [diff] [blame] | 275 | # Default value set at the end of the file |
Konstantin Aladyshev | 6544cb3 | 2015-01-24 18:52:10 +0400 | [diff] [blame] | 276 | help |
| 277 | The path and filename of the file to use as graphical bootsplash |
| 278 | screen. The file format has to be jpg. |
| 279 | |
Uwe Hermann | c04be93 | 2009-10-05 13:55:28 +0000 | [diff] [blame] | 280 | endmenu |
| 281 | |
Martin Roth | 026e4dc | 2015-06-19 23:17:15 -0600 | [diff] [blame] | 282 | menu "Mainboard" |
| 283 | |
Stefan Reinauer | a48ca84 | 2015-04-04 01:58:28 +0200 | [diff] [blame] | 284 | source "src/mainboard/Kconfig" |
Stefan Reinauer | 8aedcbc | 2010-12-16 23:37:17 +0000 | [diff] [blame] | 285 | |
Marshall Dawson | e937513 | 2016-09-04 08:38:33 -0600 | [diff] [blame] | 286 | config DEVICETREE |
| 287 | string |
| 288 | default "devicetree.cb" |
| 289 | help |
| 290 | This symbol allows mainboards to select a different file under their |
| 291 | mainboard directory for the devicetree.cb file. This allows the board |
| 292 | variants that need different devicetrees to be in the same directory. |
| 293 | |
| 294 | Examples: "devicetree.variant.cb" |
| 295 | "variant/devicetree.cb" |
| 296 | |
Furquan Shaikh | f241998 | 2018-06-21 18:50:48 -0700 | [diff] [blame] | 297 | config OVERRIDE_DEVICETREE |
| 298 | string |
| 299 | default "" |
| 300 | help |
| 301 | This symbol allows variants to provide an override devicetree file to |
| 302 | override the registers and/or add new devices on top of the ones |
| 303 | provided by baseboard devicetree using CONFIG_DEVICETREE. |
| 304 | |
| 305 | Examples: "devicetree.variant-override.cb" |
| 306 | "variant/devicetree-override.cb" |
| 307 | |
Martin Roth | 026e4dc | 2015-06-19 23:17:15 -0600 | [diff] [blame] | 308 | config CBFS_SIZE |
| 309 | hex "Size of CBFS filesystem in ROM" |
Martin Roth | 75e5cb7 | 2016-12-15 15:05:37 -0700 | [diff] [blame] | 310 | # Default value set at the end of the file |
Martin Roth | 026e4dc | 2015-06-19 23:17:15 -0600 | [diff] [blame] | 311 | help |
| 312 | This is the part of the ROM actually managed by CBFS, located at the |
| 313 | end of the ROM (passed through cbfstool -o) on x86 and at at the start |
| 314 | of the ROM (passed through cbfstool -s) everywhere else. It defaults |
| 315 | to span the whole ROM on all but Intel systems that use an Intel Firmware |
| 316 | Descriptor. It can be overridden to make coreboot live alongside other |
| 317 | components like ChromeOS's vboot/FMAP or Intel's IFD / ME / TXE |
| 318 | binaries. |
| 319 | |
Patrick Georgi | 8a3592e | 2015-09-16 18:10:52 +0200 | [diff] [blame] | 320 | config FMDFILE |
| 321 | string "fmap description file in fmd format" |
Patrick Georgi | 5d7ab39 | 2015-12-12 00:23:15 +0100 | [diff] [blame] | 322 | default "src/mainboard/$(CONFIG_MAINBOARD_DIR)/chromeos.fmd" if CHROMEOS |
Patrick Georgi | 8a3592e | 2015-09-16 18:10:52 +0200 | [diff] [blame] | 323 | default "" |
| 324 | help |
| 325 | The build system creates a default FMAP from ROM_SIZE and CBFS_SIZE, |
| 326 | but in some cases more complex setups are required. |
| 327 | When an fmd is specified, it overrides the default format. |
| 328 | |
Martin Roth | da1ca20 | 2015-12-26 16:51:16 -0700 | [diff] [blame] | 329 | endmenu |
| 330 | |
Martin Roth | b09a569 | 2016-01-24 19:38:33 -0700 | [diff] [blame] | 331 | # load site-local kconfig to allow user specific defaults and overrides |
| 332 | source "site-local/Kconfig" |
| 333 | |
Vladimir Serbinenko | a9db82f | 2014-10-16 13:21:47 +0200 | [diff] [blame] | 334 | config SYSTEM_TYPE_LAPTOP |
Martin Roth | 595e777 | 2015-04-26 18:53:26 -0600 | [diff] [blame] | 335 | default n |
| 336 | bool |
Vladimir Serbinenko | a9db82f | 2014-10-16 13:21:47 +0200 | [diff] [blame] | 337 | |
Duncan Laurie | 8312df4 | 2019-02-01 11:33:57 -0800 | [diff] [blame] | 338 | config SYSTEM_TYPE_TABLET |
| 339 | default n |
| 340 | bool |
| 341 | |
| 342 | config SYSTEM_TYPE_DETACHABLE |
| 343 | default n |
| 344 | bool |
| 345 | |
| 346 | config SYSTEM_TYPE_CONVERTIBLE |
| 347 | default n |
| 348 | bool |
| 349 | |
Werner Zeh | c0fb361 | 2016-01-14 15:08:36 +0100 | [diff] [blame] | 350 | config CBFS_AUTOGEN_ATTRIBUTES |
| 351 | default n |
| 352 | bool |
| 353 | help |
| 354 | If this option is selected, every file in cbfs which has a constraint |
| 355 | regarding position or alignment will get an additional file attribute |
| 356 | which describes this constraint. |
| 357 | |
Uwe Hermann | 63a8f2a | 2009-10-26 21:42:13 +0000 | [diff] [blame] | 358 | menu "Chipset" |
| 359 | |
Duncan Laurie | d211976 | 2015-06-08 18:11:56 -0700 | [diff] [blame] | 360 | comment "SoC" |
Chris Ching | aa8e5d3 | 2017-10-20 10:43:39 -0600 | [diff] [blame] | 361 | source "src/soc/*/Kconfig" |
Uwe Hermann | 63a8f2a | 2009-10-26 21:42:13 +0000 | [diff] [blame] | 362 | comment "CPU" |
Stefan Reinauer | a48ca84 | 2015-04-04 01:58:28 +0200 | [diff] [blame] | 363 | source "src/cpu/Kconfig" |
Uwe Hermann | 63a8f2a | 2009-10-26 21:42:13 +0000 | [diff] [blame] | 364 | comment "Northbridge" |
Stefan Reinauer | a48ca84 | 2015-04-04 01:58:28 +0200 | [diff] [blame] | 365 | source "src/northbridge/*/*/Kconfig" |
Uwe Hermann | 63a8f2a | 2009-10-26 21:42:13 +0000 | [diff] [blame] | 366 | comment "Southbridge" |
Stefan Reinauer | a48ca84 | 2015-04-04 01:58:28 +0200 | [diff] [blame] | 367 | source "src/southbridge/*/*/Kconfig" |
Uwe Hermann | 63a8f2a | 2009-10-26 21:42:13 +0000 | [diff] [blame] | 368 | comment "Super I/O" |
Omar Pakker | 57603e2 | 2016-07-29 23:31:45 +0200 | [diff] [blame] | 369 | source "src/superio/*/*/Kconfig" |
Sven Schnelle | 7592e8b | 2011-01-27 11:43:03 +0000 | [diff] [blame] | 370 | comment "Embedded Controllers" |
Stefan Reinauer | a48ca84 | 2015-04-04 01:58:28 +0200 | [diff] [blame] | 371 | source "src/ec/acpi/Kconfig" |
| 372 | source "src/ec/*/*/Kconfig" |
Stefan Reinauer | 86ddd73 | 2016-03-11 20:22:28 -0800 | [diff] [blame] | 373 | # FIXME move to vendorcode |
Marc Jones | 7868797 | 2015-04-22 23:16:31 -0600 | [diff] [blame] | 374 | source "src/drivers/intel/fsp1_0/Kconfig" |
Uwe Hermann | 63a8f2a | 2009-10-26 21:42:13 +0000 | [diff] [blame] | 375 | |
Martin Roth | 59aa2b1 | 2015-06-20 16:17:12 -0600 | [diff] [blame] | 376 | source "src/southbridge/intel/common/firmware/Kconfig" |
Martin Roth | e1523ec | 2015-06-19 22:30:43 -0600 | [diff] [blame] | 377 | source "src/vendorcode/*/Kconfig" |
Martin Roth | 59aa2b1 | 2015-06-20 16:17:12 -0600 | [diff] [blame] | 378 | |
Martin Roth | e1523ec | 2015-06-19 22:30:43 -0600 | [diff] [blame] | 379 | source "src/arch/*/Kconfig" |
| 380 | |
Uwe Hermann | 63a8f2a | 2009-10-26 21:42:13 +0000 | [diff] [blame] | 381 | endmenu |
Patrick Georgi | 0588d19 | 2009-08-12 15:00:51 +0000 | [diff] [blame] | 382 | |
Stefan Reinauer | a48ca84 | 2015-04-04 01:58:28 +0200 | [diff] [blame] | 383 | source "src/device/Kconfig" |
Stefan Reinauer | 95a6396 | 2012-11-13 17:00:01 -0800 | [diff] [blame] | 384 | |
Rudolf Marek | d9c2549 | 2010-05-16 15:31:53 +0000 | [diff] [blame] | 385 | menu "Generic Drivers" |
Stefan Reinauer | a48ca84 | 2015-04-04 01:58:28 +0200 | [diff] [blame] | 386 | source "src/drivers/*/Kconfig" |
Stefan Reinauer | 86ddd73 | 2016-03-11 20:22:28 -0800 | [diff] [blame] | 387 | source "src/drivers/*/*/Kconfig" |
Lee Leahy | 48dbc66 | 2017-05-08 16:56:03 -0700 | [diff] [blame] | 388 | source "src/commonlib/storage/Kconfig" |
Rudolf Marek | d9c2549 | 2010-05-16 15:31:53 +0000 | [diff] [blame] | 389 | endmenu |
| 390 | |
Philipp Deppenwiese | 1899fbe | 2017-10-16 17:09:33 +0200 | [diff] [blame] | 391 | menu "Security" |
| 392 | |
| 393 | source "src/security/Kconfig" |
| 394 | |
| 395 | endmenu |
| 396 | |
Martin Roth | 09210a1 | 2016-05-17 11:28:23 -0600 | [diff] [blame] | 397 | source "src/acpi/Kconfig" |
| 398 | |
Aaron Durbin | 4a36c4e | 2016-08-11 11:02:26 -0500 | [diff] [blame] | 399 | # This option is for the current boards/chipsets where SPI flash |
| 400 | # is not the boot device. Currently nearly all boards/chipsets assume |
| 401 | # SPI flash is the boot device. |
| 402 | config BOOT_DEVICE_NOT_SPI_FLASH |
| 403 | bool |
| 404 | default n |
| 405 | |
| 406 | config BOOT_DEVICE_SPI_FLASH |
| 407 | bool |
| 408 | default y if !BOOT_DEVICE_NOT_SPI_FLASH |
| 409 | default n |
| 410 | |
Aaron Durbin | 16c173f | 2016-08-11 14:04:10 -0500 | [diff] [blame] | 411 | config BOOT_DEVICE_MEMORY_MAPPED |
| 412 | bool |
| 413 | default y if ARCH_X86 && BOOT_DEVICE_SPI_FLASH |
| 414 | default n |
| 415 | help |
| 416 | Inform system if SPI is memory-mapped or not. |
| 417 | |
Aaron Durbin | e8e118d | 2016-08-12 15:00:10 -0500 | [diff] [blame] | 418 | config BOOT_DEVICE_SUPPORTS_WRITES |
| 419 | bool |
| 420 | default n |
| 421 | help |
| 422 | Indicate that the platform has writable boot device |
| 423 | support. |
| 424 | |
Patrick Georgi | 0770f25 | 2015-04-22 13:28:21 +0200 | [diff] [blame] | 425 | config RTC |
| 426 | bool |
| 427 | default n |
| 428 | |
Patrick Georgi | 0588d19 | 2009-08-12 15:00:51 +0000 | [diff] [blame] | 429 | config HEAP_SIZE |
| 430 | hex |
Myles Watson | 04000f4 | 2009-10-16 19:12:49 +0000 | [diff] [blame] | 431 | default 0x4000 |
Patrick Georgi | 0588d19 | 2009-08-12 15:00:51 +0000 | [diff] [blame] | 432 | |
Julius Werner | c3e7c4e | 2014-09-19 13:18:16 -0700 | [diff] [blame] | 433 | config STACK_SIZE |
| 434 | hex |
Julius Werner | 66a476a | 2015-10-12 16:45:21 -0700 | [diff] [blame] | 435 | default 0x1000 if ARCH_X86 |
| 436 | default 0x0 |
Julius Werner | c3e7c4e | 2014-09-19 13:18:16 -0700 | [diff] [blame] | 437 | |
Patrick Georgi | 0588d19 | 2009-08-12 15:00:51 +0000 | [diff] [blame] | 438 | config MAX_CPUS |
| 439 | int |
| 440 | default 1 |
| 441 | |
Stefan Reinauer | a48ca84 | 2015-04-04 01:58:28 +0200 | [diff] [blame] | 442 | source "src/console/Kconfig" |
Patrick Georgi | 0588d19 | 2009-08-12 15:00:51 +0000 | [diff] [blame] | 443 | |
| 444 | config HAVE_ACPI_RESUME |
| 445 | bool |
| 446 | default n |
| 447 | |
Kyösti Mälkki | 9d6f365 | 2016-06-28 07:38:46 +0300 | [diff] [blame] | 448 | config ACPI_HUGE_LOWMEM_BACKUP |
| 449 | bool |
Kyösti Mälkki | 43e9c93 | 2016-11-10 11:50:21 +0200 | [diff] [blame] | 450 | default n |
Kyösti Mälkki | 9d6f365 | 2016-06-28 07:38:46 +0300 | [diff] [blame] | 451 | help |
| 452 | On S3 resume path, backup low memory from RAMBASE..RAMTOP in CBMEM. |
| 453 | |
Aaron Durbin | 87c9fae | 2016-01-22 15:26:04 -0600 | [diff] [blame] | 454 | config RESUME_PATH_SAME_AS_BOOT |
| 455 | bool |
| 456 | default y if ARCH_X86 |
| 457 | depends on HAVE_ACPI_RESUME |
| 458 | help |
| 459 | This option indicates that when a system resumes it takes the |
| 460 | same path as a regular boot. e.g. an x86 system runs from the |
| 461 | reset vector at 0xfffffff0 on both resume and warm/cold boot. |
| 462 | |
Timothy Pearson | 44d5342 | 2015-05-18 16:04:10 -0500 | [diff] [blame] | 463 | config HAVE_ROMSTAGE_CONSOLE_SPINLOCK |
| 464 | bool |
| 465 | default n |
| 466 | |
Timothy Pearson | 7b22d84 | 2015-08-28 19:52:05 -0500 | [diff] [blame] | 467 | config HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK |
| 468 | bool |
| 469 | default n |
| 470 | help |
| 471 | This should be enabled on certain plaforms, such as the AMD |
| 472 | SR565x, that cannot handle concurrent CBFS accesses from |
| 473 | multiple APs during early startup. |
| 474 | |
Timothy Pearson | c764c74 | 2015-08-28 20:48:17 -0500 | [diff] [blame] | 475 | config HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK |
| 476 | bool |
| 477 | default n |
| 478 | |
Aaron Durbin | a421791 | 2013-04-29 22:31:51 -0500 | [diff] [blame] | 479 | config HAVE_MONOTONIC_TIMER |
| 480 | def_bool n |
| 481 | help |
| 482 | The board/chipset provides a monotonic timer. |
| 483 | |
Aaron Durbin | e5e3630 | 2014-09-25 10:05:15 -0500 | [diff] [blame] | 484 | config GENERIC_UDELAY |
| 485 | def_bool n |
| 486 | depends on HAVE_MONOTONIC_TIMER |
| 487 | help |
| 488 | The board/chipset uses a generic udelay function utilizing the |
| 489 | monotonic timer. |
| 490 | |
Aaron Durbin | 340ca91 | 2013-04-30 09:58:12 -0500 | [diff] [blame] | 491 | config TIMER_QUEUE |
| 492 | def_bool n |
| 493 | depends on HAVE_MONOTONIC_TIMER |
| 494 | help |
Kyösti Mälkki | ecd8424 | 2013-09-13 07:57:49 +0300 | [diff] [blame] | 495 | Provide a timer queue for performing time-based callbacks. |
Aaron Durbin | 340ca91 | 2013-04-30 09:58:12 -0500 | [diff] [blame] | 496 | |
Aaron Durbin | 4409a5e | 2013-05-06 12:20:52 -0500 | [diff] [blame] | 497 | config COOP_MULTITASKING |
| 498 | def_bool n |
Aaron Durbin | 38c326d | 2013-05-06 12:22:23 -0500 | [diff] [blame] | 499 | depends on TIMER_QUEUE && ARCH_X86 |
Aaron Durbin | 4409a5e | 2013-05-06 12:20:52 -0500 | [diff] [blame] | 500 | help |
| 501 | Cooperative multitasking allows callbacks to be multiplexed on the |
| 502 | main thread of ramstage. With this enabled it allows for multiple |
| 503 | execution paths to take place when they have udelay() calls within |
| 504 | their code. |
| 505 | |
| 506 | config NUM_THREADS |
| 507 | int |
| 508 | default 4 |
| 509 | depends on COOP_MULTITASKING |
| 510 | help |
| 511 | How many execution threads to cooperatively multitask with. |
| 512 | |
Patrick Georgi | 0588d19 | 2009-08-12 15:00:51 +0000 | [diff] [blame] | 513 | config HAVE_OPTION_TABLE |
| 514 | bool |
Edwin Beasant | eb50c7d | 2010-07-06 21:05:04 +0000 | [diff] [blame] | 515 | default n |
Uwe Hermann | 6ba13bb | 2009-10-15 17:49:07 +0000 | [diff] [blame] | 516 | help |
| 517 | This variable specifies whether a given board has a cmos.layout |
| 518 | file containing NVRAM/CMOS bit definitions. |
Edwin Beasant | eb50c7d | 2010-07-06 21:05:04 +0000 | [diff] [blame] | 519 | It defaults to 'n' but can be selected in mainboard/*/Kconfig. |
Patrick Georgi | 0588d19 | 2009-08-12 15:00:51 +0000 | [diff] [blame] | 520 | |
Patrick Georgi | 0588d19 | 2009-08-12 15:00:51 +0000 | [diff] [blame] | 521 | config PIRQ_ROUTE |
| 522 | bool |
| 523 | default n |
| 524 | |
| 525 | config HAVE_SMI_HANDLER |
| 526 | bool |
| 527 | default n |
| 528 | |
| 529 | config PCI_IO_CFG_EXT |
| 530 | bool |
| 531 | default n |
| 532 | |
| 533 | config IOAPIC |
| 534 | bool |
| 535 | default n |
| 536 | |
Myles Watson | 45bb25f | 2009-09-22 18:49:08 +0000 | [diff] [blame] | 537 | config USE_WATCHDOG_ON_BOOT |
| 538 | bool |
| 539 | default n |
| 540 | |
Myles Watson | 45bb25f | 2009-09-22 18:49:08 +0000 | [diff] [blame] | 541 | config GFXUMA |
| 542 | bool |
Myles Watson | d73c1b5 | 2009-10-26 15:14:07 +0000 | [diff] [blame] | 543 | default n |
Myles Watson | 45bb25f | 2009-09-22 18:49:08 +0000 | [diff] [blame] | 544 | help |
| 545 | Enable Unified Memory Architecture for graphics. |
| 546 | |
Myles Watson | b8e2027 | 2009-10-15 13:35:47 +0000 | [diff] [blame] | 547 | config HAVE_ACPI_TABLES |
| 548 | bool |
Uwe Hermann | 6ba13bb | 2009-10-15 17:49:07 +0000 | [diff] [blame] | 549 | help |
| 550 | This variable specifies whether a given board has ACPI table support. |
| 551 | It is usually set in mainboard/*/Kconfig. |
Myles Watson | b8e2027 | 2009-10-15 13:35:47 +0000 | [diff] [blame] | 552 | |
| 553 | config HAVE_MP_TABLE |
| 554 | bool |
Uwe Hermann | 6ba13bb | 2009-10-15 17:49:07 +0000 | [diff] [blame] | 555 | help |
| 556 | This variable specifies whether a given board has MP table support. |
| 557 | It is usually set in mainboard/*/Kconfig. |
| 558 | Whether or not the MP table is actually generated by coreboot |
| 559 | is configurable by the user via GENERATE_MP_TABLE. |
Myles Watson | b8e2027 | 2009-10-15 13:35:47 +0000 | [diff] [blame] | 560 | |
| 561 | config HAVE_PIRQ_TABLE |
| 562 | bool |
Uwe Hermann | 6ba13bb | 2009-10-15 17:49:07 +0000 | [diff] [blame] | 563 | help |
| 564 | This variable specifies whether a given board has PIRQ table support. |
| 565 | It is usually set in mainboard/*/Kconfig. |
| 566 | Whether or not the PIRQ table is actually generated by coreboot |
| 567 | is configurable by the user via GENERATE_PIRQ_TABLE. |
Myles Watson | b8e2027 | 2009-10-15 13:35:47 +0000 | [diff] [blame] | 568 | |
Alexandru Gagniuc | 70c660f | 2012-08-23 02:32:58 -0500 | [diff] [blame] | 569 | config MAX_PIRQ_LINKS |
| 570 | int |
| 571 | default 4 |
| 572 | help |
| 573 | This variable specifies the number of PIRQ interrupt links which are |
| 574 | routable. On most chipsets, this is 4, INTA through INTD. Some |
| 575 | chipsets offer more than four links, commonly up to INTH. They may |
| 576 | also have a separate link for ATA or IOAPIC interrupts. When the PIRQ |
| 577 | table specifies links greater than 4, pirq_route_irqs will not |
| 578 | function properly, unless this variable is correctly set. |
| 579 | |
Vladimir Serbinenko | c21e073 | 2014-10-16 12:48:19 +0200 | [diff] [blame] | 580 | config COMMON_FADT |
| 581 | bool |
| 582 | default n |
| 583 | |
Aaron Durbin | 9420a52 | 2015-11-17 16:31:00 -0600 | [diff] [blame] | 584 | config ACPI_NHLT |
| 585 | bool |
| 586 | default n |
| 587 | help |
| 588 | Build support for NHLT (non HD Audio) ACPI table generation. |
| 589 | |
Marshall Dawson | 991467d | 2018-09-04 12:32:56 -0600 | [diff] [blame] | 590 | config ACPI_BERT |
| 591 | bool |
| 592 | depends on HAVE_ACPI_TABLES |
| 593 | help |
| 594 | Build an ACPI Boot Error Record Table. |
| 595 | |
Myles Watson | d73c1b5 | 2009-10-26 15:14:07 +0000 | [diff] [blame] | 596 | #These Options are here to avoid "undefined" warnings. |
| 597 | #The actual selection and help texts are in the following menu. |
| 598 | |
Uwe Hermann | 168b11b | 2009-10-07 16:15:40 +0000 | [diff] [blame] | 599 | menu "System tables" |
Myles Watson | 45bb25f | 2009-09-22 18:49:08 +0000 | [diff] [blame] | 600 | |
Myles Watson | b8e2027 | 2009-10-15 13:35:47 +0000 | [diff] [blame] | 601 | config GENERATE_MP_TABLE |
Stefan Reinauer | 56cd70b | 2012-11-13 17:33:08 -0800 | [diff] [blame] | 602 | prompt "Generate an MP table" if HAVE_MP_TABLE || DRIVERS_GENERIC_IOAPIC |
| 603 | bool |
| 604 | default HAVE_MP_TABLE || DRIVERS_GENERIC_IOAPIC |
Uwe Hermann | 6ba13bb | 2009-10-15 17:49:07 +0000 | [diff] [blame] | 605 | help |
| 606 | Generate an MP table (conforming to the Intel MultiProcessor |
| 607 | specification 1.4) for this board. |
| 608 | |
| 609 | If unsure, say Y. |
Myles Watson | 45bb25f | 2009-09-22 18:49:08 +0000 | [diff] [blame] | 610 | |
Myles Watson | b8e2027 | 2009-10-15 13:35:47 +0000 | [diff] [blame] | 611 | config GENERATE_PIRQ_TABLE |
Stefan Reinauer | 56cd70b | 2012-11-13 17:33:08 -0800 | [diff] [blame] | 612 | prompt "Generate a PIRQ table" if HAVE_PIRQ_TABLE |
| 613 | bool |
| 614 | default HAVE_PIRQ_TABLE |
Uwe Hermann | 6ba13bb | 2009-10-15 17:49:07 +0000 | [diff] [blame] | 615 | help |
| 616 | Generate a PIRQ table for this board. |
| 617 | |
| 618 | If unsure, say Y. |
Myles Watson | 45bb25f | 2009-09-22 18:49:08 +0000 | [diff] [blame] | 619 | |
Sven Schnelle | 164bcfd | 2011-08-14 20:56:34 +0200 | [diff] [blame] | 620 | config GENERATE_SMBIOS_TABLES |
| 621 | depends on ARCH_X86 |
| 622 | bool "Generate SMBIOS tables" |
| 623 | default y |
| 624 | help |
| 625 | Generate SMBIOS tables for this board. |
| 626 | |
| 627 | If unsure, say Y. |
| 628 | |
Vladimir Serbinenko | 0afdec4 | 2015-05-30 23:08:26 +0200 | [diff] [blame] | 629 | config SMBIOS_PROVIDED_BY_MOBO |
| 630 | bool |
| 631 | default n |
| 632 | |
Stefan Reinauer | 6023ca4 | 2014-10-17 13:28:15 +0200 | [diff] [blame] | 633 | config MAINBOARD_SERIAL_NUMBER |
| 634 | string "SMBIOS Serial Number" |
| 635 | depends on GENERATE_SMBIOS_TABLES |
Vladimir Serbinenko | 0afdec4 | 2015-05-30 23:08:26 +0200 | [diff] [blame] | 636 | depends on !SMBIOS_PROVIDED_BY_MOBO |
Stefan Reinauer | 6023ca4 | 2014-10-17 13:28:15 +0200 | [diff] [blame] | 637 | default "123456789" |
Martin Roth | 595e777 | 2015-04-26 18:53:26 -0600 | [diff] [blame] | 638 | help |
Stefan Reinauer | 6023ca4 | 2014-10-17 13:28:15 +0200 | [diff] [blame] | 639 | The Serial Number to store in SMBIOS structures. |
| 640 | |
| 641 | config MAINBOARD_VERSION |
| 642 | string "SMBIOS Version Number" |
| 643 | depends on GENERATE_SMBIOS_TABLES |
Vladimir Serbinenko | 0afdec4 | 2015-05-30 23:08:26 +0200 | [diff] [blame] | 644 | depends on !SMBIOS_PROVIDED_BY_MOBO |
Stefan Reinauer | 6023ca4 | 2014-10-17 13:28:15 +0200 | [diff] [blame] | 645 | default "1.0" |
| 646 | help |
| 647 | The Version Number to store in SMBIOS structures. |
| 648 | |
| 649 | config MAINBOARD_SMBIOS_MANUFACTURER |
| 650 | string "SMBIOS Manufacturer" |
| 651 | depends on GENERATE_SMBIOS_TABLES |
Vladimir Serbinenko | 0afdec4 | 2015-05-30 23:08:26 +0200 | [diff] [blame] | 652 | depends on !SMBIOS_PROVIDED_BY_MOBO |
Stefan Reinauer | 6023ca4 | 2014-10-17 13:28:15 +0200 | [diff] [blame] | 653 | default MAINBOARD_VENDOR |
| 654 | help |
| 655 | Override the default Manufacturer stored in SMBIOS structures. |
| 656 | |
| 657 | config MAINBOARD_SMBIOS_PRODUCT_NAME |
| 658 | string "SMBIOS Product name" |
| 659 | depends on GENERATE_SMBIOS_TABLES |
Vladimir Serbinenko | 0afdec4 | 2015-05-30 23:08:26 +0200 | [diff] [blame] | 660 | depends on !SMBIOS_PROVIDED_BY_MOBO |
Stefan Reinauer | 6023ca4 | 2014-10-17 13:28:15 +0200 | [diff] [blame] | 661 | default MAINBOARD_PART_NUMBER |
| 662 | help |
| 663 | Override the default Product name stored in SMBIOS structures. |
| 664 | |
Julien Viard de Galbert | 9d231a9 | 2018-02-28 13:39:55 +0100 | [diff] [blame] | 665 | config SMBIOS_ENCLOSURE_TYPE |
| 666 | hex |
| 667 | depends on GENERATE_SMBIOS_TABLES |
| 668 | default 0x09 if SYSTEM_TYPE_LAPTOP |
Duncan Laurie | 8312df4 | 2019-02-01 11:33:57 -0800 | [diff] [blame] | 669 | default 0x1e if SYSTEM_TYPE_TABLET |
| 670 | default 0x1f if SYSTEM_TYPE_CONVERTIBLE |
| 671 | default 0x20 if SYSTEM_TYPE_DETACHABLE |
Julien Viard de Galbert | 9d231a9 | 2018-02-28 13:39:55 +0100 | [diff] [blame] | 672 | default 0x03 |
| 673 | help |
| 674 | System Enclosure or Chassis Types as defined in SMBIOS specification. |
Duncan Laurie | 8312df4 | 2019-02-01 11:33:57 -0800 | [diff] [blame] | 675 | The default value is SMBIOS_ENCLOSURE_DESKTOP (0x03) but laptop, |
| 676 | convertible, or tablet enclosure will be used if the appropriate |
| 677 | system type is selected. |
Julien Viard de Galbert | 9d231a9 | 2018-02-28 13:39:55 +0100 | [diff] [blame] | 678 | |
Myles Watson | 45bb25f | 2009-09-22 18:49:08 +0000 | [diff] [blame] | 679 | endmenu |
| 680 | |
Martin Roth | 21c0650 | 2016-02-04 19:52:27 -0700 | [diff] [blame] | 681 | source "payloads/Kconfig" |
Peter Stuge | a758ca2 | 2009-09-17 16:21:31 +0000 | [diff] [blame] | 682 | |
Uwe Hermann | 168b11b | 2009-10-07 16:15:40 +0000 | [diff] [blame] | 683 | menu "Debugging" |
| 684 | |
Nico Huber | d67edca | 2018-11-13 19:28:07 +0100 | [diff] [blame] | 685 | comment "CPU Debug Settings" |
| 686 | source "src/cpu/*/Kconfig.debug" |
| 687 | |
| 688 | comment "General Debug Settings" |
| 689 | |
Uwe Hermann | 168b11b | 2009-10-07 16:15:40 +0000 | [diff] [blame] | 690 | # TODO: Better help text and detailed instructions. |
Patrick Georgi | 0588d19 | 2009-08-12 15:00:51 +0000 | [diff] [blame] | 691 | config GDB_STUB |
Uwe Hermann | 5ec2c2b | 2009-08-25 00:53:22 +0000 | [diff] [blame] | 692 | bool "GDB debugging support" |
Rudolf Marek | 6588802 | 2012-03-25 20:51:16 +0200 | [diff] [blame] | 693 | default n |
Denis 'GNUtoo' Carikli | 3747ba1 | 2015-12-10 22:04:56 +0100 | [diff] [blame] | 694 | depends on CONSOLE_SERIAL |
Patrick Georgi | 0588d19 | 2009-08-12 15:00:51 +0000 | [diff] [blame] | 695 | help |
Uwe Hermann | 5ec2c2b | 2009-08-25 00:53:22 +0000 | [diff] [blame] | 696 | If enabled, you will be able to set breakpoints for gdb debugging. |
Stefan Reinauer | 8677a23 | 2010-12-11 20:33:41 +0000 | [diff] [blame] | 697 | See src/arch/x86/lib/c_start.S for details. |
Patrick Georgi | 0588d19 | 2009-08-12 15:00:51 +0000 | [diff] [blame] | 698 | |
Denis 'GNUtoo' Carikli | e4cece0 | 2012-06-22 15:56:37 +0200 | [diff] [blame] | 699 | config GDB_WAIT |
Denis 'GNUtoo' Carikli | 7d234f2 | 2015-12-10 21:58:52 +0100 | [diff] [blame] | 700 | bool "Wait for a GDB connection in the ramstage" |
Denis 'GNUtoo' Carikli | e4cece0 | 2012-06-22 15:56:37 +0200 | [diff] [blame] | 701 | default n |
| 702 | depends on GDB_STUB |
| 703 | help |
Denis 'GNUtoo' Carikli | 7d234f2 | 2015-12-10 21:58:52 +0100 | [diff] [blame] | 704 | If enabled, coreboot will wait for a GDB connection in the ramstage. |
| 705 | |
Denis 'GNUtoo' Carikli | e4cece0 | 2012-06-22 15:56:37 +0200 | [diff] [blame] | 706 | |
Julius Werner | d82e0cf | 2015-02-17 17:27:23 -0800 | [diff] [blame] | 707 | config FATAL_ASSERTS |
| 708 | bool "Halt when hitting a BUG() or assertion error" |
| 709 | default n |
| 710 | help |
| 711 | If enabled, coreboot will call hlt() on a BUG() or failed ASSERT(). |
| 712 | |
Nico Huber | 371a667 | 2018-11-13 22:06:40 +0100 | [diff] [blame] | 713 | config HAVE_DEBUG_GPIO |
| 714 | bool |
| 715 | |
| 716 | config DEBUG_GPIO |
| 717 | bool "Output verbose GPIO debug messages" |
| 718 | depends on HAVE_DEBUG_GPIO |
| 719 | |
Stefan Reinauer | fe42218 | 2012-05-02 16:33:18 -0700 | [diff] [blame] | 720 | config DEBUG_CBFS |
| 721 | bool "Output verbose CBFS debug messages" |
| 722 | default n |
Stefan Reinauer | fe42218 | 2012-05-02 16:33:18 -0700 | [diff] [blame] | 723 | help |
| 724 | This option enables additional CBFS related debug messages. |
| 725 | |
Jens Rottmann | 0d11f2d | 2010-08-26 12:46:02 +0000 | [diff] [blame] | 726 | config HAVE_DEBUG_RAM_SETUP |
| 727 | def_bool n |
| 728 | |
Uwe Hermann | 01ce601 | 2010-03-05 10:03:50 +0000 | [diff] [blame] | 729 | config DEBUG_RAM_SETUP |
| 730 | bool "Output verbose RAM init debug messages" |
| 731 | default n |
Jens Rottmann | 0d11f2d | 2010-08-26 12:46:02 +0000 | [diff] [blame] | 732 | depends on HAVE_DEBUG_RAM_SETUP |
Uwe Hermann | 01ce601 | 2010-03-05 10:03:50 +0000 | [diff] [blame] | 733 | help |
| 734 | This option enables additional RAM init related debug messages. |
| 735 | It is recommended to enable this when debugging issues on your |
| 736 | board which might be RAM init related. |
| 737 | |
| 738 | Note: This option will increase the size of the coreboot image. |
| 739 | |
| 740 | If unsure, say N. |
| 741 | |
Myles Watson | 80e914ff | 2010-06-01 19:25:31 +0000 | [diff] [blame] | 742 | config DEBUG_PIRQ |
| 743 | bool "Check PIRQ table consistency" |
| 744 | default n |
| 745 | depends on GENERATE_PIRQ_TABLE |
| 746 | help |
| 747 | If unsure, say N. |
| 748 | |
Jens Rottmann | 0d11f2d | 2010-08-26 12:46:02 +0000 | [diff] [blame] | 749 | config HAVE_DEBUG_SMBUS |
| 750 | def_bool n |
| 751 | |
Uwe Hermann | 01ce601 | 2010-03-05 10:03:50 +0000 | [diff] [blame] | 752 | config DEBUG_SMBUS |
| 753 | bool "Output verbose SMBus debug messages" |
| 754 | default n |
Jens Rottmann | 0d11f2d | 2010-08-26 12:46:02 +0000 | [diff] [blame] | 755 | depends on HAVE_DEBUG_SMBUS |
Uwe Hermann | 01ce601 | 2010-03-05 10:03:50 +0000 | [diff] [blame] | 756 | help |
| 757 | This option enables additional SMBus (and SPD) debug messages. |
| 758 | |
| 759 | Note: This option will increase the size of the coreboot image. |
| 760 | |
| 761 | If unsure, say N. |
| 762 | |
| 763 | config DEBUG_SMI |
| 764 | bool "Output verbose SMI debug messages" |
| 765 | default n |
| 766 | depends on HAVE_SMI_HANDLER |
Nico Huber | 9e53db4 | 2018-06-05 22:34:08 +0200 | [diff] [blame] | 767 | select SPI_FLASH_SMM if SPI_CONSOLE || CONSOLE_SPI_FLASH |
Uwe Hermann | 01ce601 | 2010-03-05 10:03:50 +0000 | [diff] [blame] | 768 | help |
| 769 | This option enables additional SMI related debug messages. |
| 770 | |
| 771 | Note: This option will increase the size of the coreboot image. |
| 772 | |
| 773 | If unsure, say N. |
| 774 | |
Uwe Hermann | a953f37 | 2010-11-10 00:14:32 +0000 | [diff] [blame] | 775 | # Only visible if debug level is DEBUG (7) or SPEW (8) as it does additional |
| 776 | # printk(BIOS_DEBUG, ...) calls. |
| 777 | config DEBUG_MALLOC |
Stefan Reinauer | 95a6396 | 2012-11-13 17:00:01 -0800 | [diff] [blame] | 778 | prompt "Output verbose malloc debug messages" if DEFAULT_CONSOLE_LOGLEVEL_7 || DEFAULT_CONSOLE_LOGLEVEL_8 |
| 779 | bool |
Uwe Hermann | a953f37 | 2010-11-10 00:14:32 +0000 | [diff] [blame] | 780 | default n |
Uwe Hermann | a953f37 | 2010-11-10 00:14:32 +0000 | [diff] [blame] | 781 | help |
| 782 | This option enables additional malloc related debug messages. |
| 783 | |
| 784 | Note: This option will increase the size of the coreboot image. |
| 785 | |
| 786 | If unsure, say N. |
Cristian Măgherușan-Stanciu | 9f52ea4 | 2011-07-02 00:44:39 +0300 | [diff] [blame] | 787 | |
| 788 | # Only visible if debug level is DEBUG (7) or SPEW (8) as it does additional |
| 789 | # printk(BIOS_DEBUG, ...) calls. |
Cristian Măgherușan-Stanciu | 9f52ea4 | 2011-07-02 00:44:39 +0300 | [diff] [blame] | 790 | config DEBUG_ACPI |
Stefan Reinauer | 95a6396 | 2012-11-13 17:00:01 -0800 | [diff] [blame] | 791 | prompt "Output verbose ACPI debug messages" if DEFAULT_CONSOLE_LOGLEVEL_7 || DEFAULT_CONSOLE_LOGLEVEL_8 |
| 792 | bool |
Cristian Măgherușan-Stanciu | 9f52ea4 | 2011-07-02 00:44:39 +0300 | [diff] [blame] | 793 | default n |
| 794 | help |
| 795 | This option enables additional ACPI related debug messages. |
| 796 | |
| 797 | Note: This option will slightly increase the size of the coreboot image. |
| 798 | |
| 799 | If unsure, say N. |
Cristian Măgherușan-Stanciu | 9f52ea4 | 2011-07-02 00:44:39 +0300 | [diff] [blame] | 800 | |
Kyösti Mälkki | 6627795 | 2018-12-31 15:22:34 +0200 | [diff] [blame] | 801 | config DEBUG_CONSOLE_INIT |
| 802 | bool "Debug console initialisation code" |
| 803 | default n |
| 804 | help |
| 805 | With this option printk()'s are attempted before console hardware |
| 806 | initialisation has been completed. Your mileage may vary. |
| 807 | |
| 808 | Typically you will need to modify source in console_hw_init() such |
| 809 | that a working console appears before the one you want to debug. |
| 810 | |
| 811 | If unsure, say N. |
| 812 | |
Uwe Hermann | a953f37 | 2010-11-10 00:14:32 +0000 | [diff] [blame] | 813 | # Only visible if debug level is DEBUG (7) or SPEW (8) as it does additional |
| 814 | # printk(BIOS_DEBUG, ...) calls. |
Myles Watson | 6c9bc01 | 2010-09-07 22:30:15 +0000 | [diff] [blame] | 815 | config REALMODE_DEBUG |
Stefan Reinauer | 95a6396 | 2012-11-13 17:00:01 -0800 | [diff] [blame] | 816 | prompt "Enable debug messages for option ROM execution" if DEFAULT_CONSOLE_LOGLEVEL_7 || DEFAULT_CONSOLE_LOGLEVEL_8 |
| 817 | bool |
Myles Watson | 6c9bc01 | 2010-09-07 22:30:15 +0000 | [diff] [blame] | 818 | default n |
Peter Stuge | 5015f79 | 2010-11-10 02:00:32 +0000 | [diff] [blame] | 819 | depends on PCI_OPTION_ROM_RUN_REALMODE |
Myles Watson | 6c9bc01 | 2010-09-07 22:30:15 +0000 | [diff] [blame] | 820 | help |
| 821 | This option enables additional x86emu related debug messages. |
| 822 | |
| 823 | Note: This option will increase the time to emulate a ROM. |
| 824 | |
| 825 | If unsure, say N. |
| 826 | |
Uwe Hermann | 01ce601 | 2010-03-05 10:03:50 +0000 | [diff] [blame] | 827 | config X86EMU_DEBUG |
| 828 | bool "Output verbose x86emu debug messages" |
| 829 | default n |
| 830 | depends on PCI_OPTION_ROM_RUN_YABEL |
| 831 | help |
| 832 | This option enables additional x86emu related debug messages. |
| 833 | |
| 834 | Note: This option will increase the size of the coreboot image. |
| 835 | |
| 836 | If unsure, say N. |
| 837 | |
| 838 | config X86EMU_DEBUG_JMP |
| 839 | bool "Trace JMP/RETF" |
| 840 | default n |
| 841 | depends on X86EMU_DEBUG |
| 842 | help |
| 843 | Print information about JMP and RETF opcodes from x86emu. |
| 844 | |
| 845 | Note: This option will increase the size of the coreboot image. |
| 846 | |
| 847 | If unsure, say N. |
| 848 | |
| 849 | config X86EMU_DEBUG_TRACE |
| 850 | bool "Trace all opcodes" |
| 851 | default n |
| 852 | depends on X86EMU_DEBUG |
| 853 | help |
| 854 | Print _all_ opcodes that are executed by x86emu. |
Stefan Reinauer | 14e2277 | 2010-04-27 06:56:47 +0000 | [diff] [blame] | 855 | |
Uwe Hermann | 01ce601 | 2010-03-05 10:03:50 +0000 | [diff] [blame] | 856 | WARNING: This will produce a LOT of output and take a long time. |
| 857 | |
| 858 | Note: This option will increase the size of the coreboot image. |
| 859 | |
| 860 | If unsure, say N. |
| 861 | |
| 862 | config X86EMU_DEBUG_PNP |
| 863 | bool "Log Plug&Play accesses" |
| 864 | default n |
| 865 | depends on X86EMU_DEBUG |
| 866 | help |
| 867 | Print Plug And Play accesses made by option ROMs. |
| 868 | |
| 869 | Note: This option will increase the size of the coreboot image. |
| 870 | |
| 871 | If unsure, say N. |
| 872 | |
| 873 | config X86EMU_DEBUG_DISK |
| 874 | bool "Log Disk I/O" |
| 875 | default n |
| 876 | depends on X86EMU_DEBUG |
| 877 | help |
| 878 | Print Disk I/O related messages. |
| 879 | |
| 880 | Note: This option will increase the size of the coreboot image. |
| 881 | |
| 882 | If unsure, say N. |
| 883 | |
| 884 | config X86EMU_DEBUG_PMM |
| 885 | bool "Log PMM" |
| 886 | default n |
| 887 | depends on X86EMU_DEBUG |
| 888 | help |
| 889 | Print messages related to POST Memory Manager (PMM). |
| 890 | |
| 891 | Note: This option will increase the size of the coreboot image. |
| 892 | |
| 893 | If unsure, say N. |
| 894 | |
| 895 | |
| 896 | config X86EMU_DEBUG_VBE |
| 897 | bool "Debug VESA BIOS Extensions" |
| 898 | default n |
| 899 | depends on X86EMU_DEBUG |
| 900 | help |
| 901 | Print messages related to VESA BIOS Extension (VBE) functions. |
| 902 | |
| 903 | Note: This option will increase the size of the coreboot image. |
| 904 | |
| 905 | If unsure, say N. |
| 906 | |
| 907 | config X86EMU_DEBUG_INT10 |
| 908 | bool "Redirect INT10 output to console" |
| 909 | default n |
| 910 | depends on X86EMU_DEBUG |
| 911 | help |
| 912 | Let INT10 (i.e. character output) calls print messages to debug output. |
| 913 | |
| 914 | Note: This option will increase the size of the coreboot image. |
| 915 | |
| 916 | If unsure, say N. |
| 917 | |
| 918 | config X86EMU_DEBUG_INTERRUPTS |
| 919 | bool "Log intXX calls" |
| 920 | default n |
| 921 | depends on X86EMU_DEBUG |
| 922 | help |
| 923 | Print messages related to interrupt handling. |
| 924 | |
| 925 | Note: This option will increase the size of the coreboot image. |
| 926 | |
| 927 | If unsure, say N. |
| 928 | |
| 929 | config X86EMU_DEBUG_CHECK_VMEM_ACCESS |
| 930 | bool "Log special memory accesses" |
| 931 | default n |
| 932 | depends on X86EMU_DEBUG |
| 933 | help |
| 934 | Print messages related to accesses to certain areas of the virtual |
| 935 | memory (e.g. BDA (BIOS Data Area) or interrupt vectors) |
| 936 | |
| 937 | Note: This option will increase the size of the coreboot image. |
| 938 | |
| 939 | If unsure, say N. |
| 940 | |
| 941 | config X86EMU_DEBUG_MEM |
| 942 | bool "Log all memory accesses" |
| 943 | default n |
| 944 | depends on X86EMU_DEBUG |
| 945 | help |
| 946 | Print memory accesses made by option ROM. |
| 947 | Note: This also includes accesses to fetch instructions. |
| 948 | |
| 949 | Note: This option will increase the size of the coreboot image. |
| 950 | |
| 951 | If unsure, say N. |
| 952 | |
| 953 | config X86EMU_DEBUG_IO |
| 954 | bool "Log IO accesses" |
| 955 | default n |
| 956 | depends on X86EMU_DEBUG |
| 957 | help |
| 958 | Print I/O accesses made by option ROM. |
| 959 | |
| 960 | Note: This option will increase the size of the coreboot image. |
| 961 | |
| 962 | If unsure, say N. |
| 963 | |
Denis 'GNUtoo' Carikli | 4cdc5d6 | 2013-05-15 00:19:49 +0200 | [diff] [blame] | 964 | config X86EMU_DEBUG_TIMINGS |
| 965 | bool "Output timing information" |
| 966 | default n |
| 967 | depends on X86EMU_DEBUG && UDELAY_LAPIC && HAVE_MONOTONIC_TIMER |
| 968 | help |
| 969 | Print timing information needed by i915tool. |
| 970 | |
| 971 | If unsure, say N. |
| 972 | |
Stefan Reinauer | 1c56d9b | 2012-05-10 11:27:32 -0700 | [diff] [blame] | 973 | config DEBUG_SPI_FLASH |
| 974 | bool "Output verbose SPI flash debug messages" |
| 975 | default n |
| 976 | depends on SPI_FLASH |
| 977 | help |
| 978 | This option enables additional SPI flash related debug messages. |
| 979 | |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 980 | if SOUTHBRIDGE_INTEL_BD82X6X && DEFAULT_CONSOLE_LOGLEVEL_8 |
| 981 | # Only visible with the right southbridge and loglevel. |
| 982 | config DEBUG_INTEL_ME |
| 983 | bool "Verbose logging for Intel Management Engine" |
| 984 | default n |
| 985 | help |
| 986 | Enable verbose logging for Intel Management Engine driver that |
| 987 | is present on Intel 6-series chipsets. |
| 988 | endif |
| 989 | |
Rudolf Marek | 7f0e930 | 2011-09-02 23:23:41 +0200 | [diff] [blame] | 990 | config TRACE |
| 991 | bool "Trace function calls" |
| 992 | default n |
| 993 | help |
| 994 | If enabled, every function will print information to console once |
| 995 | the function is entered. The syntax is ~0xaaaabbbb(0xccccdddd) |
| 996 | the 0xaaaabbbb is the actual function and 0xccccdddd is EIP |
Ben Gardner | 8420ad4 | 2015-11-18 10:46:53 -0600 | [diff] [blame] | 997 | of calling function. Please note some printk related functions |
Rudolf Marek | 7f0e930 | 2011-09-02 23:23:41 +0200 | [diff] [blame] | 998 | are omitted from trace to have good looking console dumps. |
Stefan Reinauer | d37ab45 | 2012-12-18 16:23:28 -0800 | [diff] [blame] | 999 | |
| 1000 | config DEBUG_COVERAGE |
| 1001 | bool "Debug code coverage" |
| 1002 | default n |
| 1003 | depends on COVERAGE |
| 1004 | help |
| 1005 | If enabled, the code coverage hooks in coreboot will output some |
| 1006 | information about the coverage data that is dumped. |
| 1007 | |
Jonathan Neuschäfer | fc04f9b | 2016-06-29 21:59:32 +0200 | [diff] [blame] | 1008 | config DEBUG_BOOT_STATE |
| 1009 | bool "Debug boot state machine" |
| 1010 | default n |
| 1011 | help |
| 1012 | Control debugging of the boot state machine. When selected displays |
| 1013 | the state boundaries in ramstage. |
| 1014 | |
Nico Huber | e84e625 | 2016-10-05 17:43:56 +0200 | [diff] [blame] | 1015 | config DEBUG_ADA_CODE |
| 1016 | bool "Compile debug code in Ada sources" |
| 1017 | default n |
| 1018 | help |
| 1019 | Add the compiler switch `-gnata` to compile code guarded by |
| 1020 | `pragma Debug`. |
| 1021 | |
Simon Glass | 46255f7 | 2018-07-12 15:26:07 -0600 | [diff] [blame] | 1022 | config HAVE_EM100_SUPPORT |
| 1023 | bool "Platform can support the Dediprog EM100 SPI emulator" |
| 1024 | help |
| 1025 | This is enabled by platforms which can support using the EM100. |
| 1026 | |
| 1027 | config EM100 |
| 1028 | bool "Configure image for EM100 usage" |
| 1029 | depends on HAVE_EM100_SUPPORT |
| 1030 | help |
| 1031 | The Dediprog EM100 SPI emulator allows fast loading of new SPI images |
| 1032 | over USB. However it only supports a maximum SPI clock of 20MHz and |
| 1033 | single data output. Enable this option to use a 20MHz SPI clock and |
| 1034 | disable "Dual Output Fast Read" Support. |
| 1035 | |
| 1036 | On AMD platforms this changes the SPI speed at run-time if the |
| 1037 | mainboard code supports this. On supported Intel platforms this works |
| 1038 | by changing the settings in the descriptor.bin file. |
| 1039 | |
Uwe Hermann | 168b11b | 2009-10-07 16:15:40 +0000 | [diff] [blame] | 1040 | endmenu |
| 1041 | |
Martin Roth | 8e4aafb | 2016-12-15 15:25:15 -0700 | [diff] [blame] | 1042 | |
| 1043 | ############################################################################### |
| 1044 | # Set variables with no prompt - these can be set anywhere, and putting at |
| 1045 | # the end of this file gives the most flexibility. |
Nico Huber | 3db7653 | 2017-05-18 18:07:34 +0200 | [diff] [blame] | 1046 | |
| 1047 | source "src/lib/Kconfig" |
| 1048 | |
Myles Watson | d73c1b5 | 2009-10-26 15:14:07 +0000 | [diff] [blame] | 1049 | config ENABLE_APIC_EXT_ID |
| 1050 | bool |
| 1051 | default n |
Myles Watson | 2e67273 | 2009-11-12 16:38:03 +0000 | [diff] [blame] | 1052 | |
| 1053 | config WARNINGS_ARE_ERRORS |
| 1054 | bool |
Edward O'Callaghan | 63f6dc7 | 2014-11-18 03:17:54 +1100 | [diff] [blame] | 1055 | default y |
Patrick Georgi | 436f99b | 2009-11-27 16:55:13 +0000 | [diff] [blame] | 1056 | |
Peter Stuge | 51eafde | 2010-10-13 06:23:02 +0000 | [diff] [blame] | 1057 | # The four POWER_BUTTON_DEFAULT_ENABLE, POWER_BUTTON_DEFAULT_DISABLE, |
| 1058 | # POWER_BUTTON_FORCE_ENABLE and POWER_BUTTON_FORCE_DISABLE options are |
| 1059 | # mutually exclusive. One of these options must be selected in the |
| 1060 | # mainboard Kconfig if the chipset supports enabling and disabling of |
| 1061 | # the power button. Chipset code uses the ENABLE_POWER_BUTTON option set |
| 1062 | # in mainboard/Kconfig to know if the button should be enabled or not. |
| 1063 | |
| 1064 | config POWER_BUTTON_DEFAULT_ENABLE |
| 1065 | def_bool n |
| 1066 | help |
| 1067 | Select when the board has a power button which can optionally be |
| 1068 | disabled by the user. |
| 1069 | |
| 1070 | config POWER_BUTTON_DEFAULT_DISABLE |
| 1071 | def_bool n |
| 1072 | help |
| 1073 | Select when the board has a power button which can optionally be |
| 1074 | enabled by the user, e.g. when the board ships with a jumper over |
| 1075 | the power switch contacts. |
| 1076 | |
| 1077 | config POWER_BUTTON_FORCE_ENABLE |
| 1078 | def_bool n |
| 1079 | help |
| 1080 | Select when the board requires that the power button is always |
| 1081 | enabled. |
| 1082 | |
| 1083 | config POWER_BUTTON_FORCE_DISABLE |
| 1084 | def_bool n |
| 1085 | help |
| 1086 | Select when the board requires that the power button is always |
| 1087 | disabled, e.g. when it has been hardwired to ground. |
| 1088 | |
| 1089 | config POWER_BUTTON_IS_OPTIONAL |
| 1090 | bool |
| 1091 | default y if POWER_BUTTON_DEFAULT_ENABLE || POWER_BUTTON_DEFAULT_DISABLE |
| 1092 | default n if !(POWER_BUTTON_DEFAULT_ENABLE || POWER_BUTTON_DEFAULT_DISABLE) |
| 1093 | help |
| 1094 | Internal option that controls ENABLE_POWER_BUTTON visibility. |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 1095 | |
| 1096 | config REG_SCRIPT |
| 1097 | bool |
Duncan Laurie | 7274800 | 2013-10-31 08:26:23 -0700 | [diff] [blame] | 1098 | default n |
| 1099 | help |
| 1100 | Internal option that controls whether we compile in register scripts. |
Furquan Shaikh | 99ac98f | 2014-04-23 10:18:48 -0700 | [diff] [blame] | 1101 | |
Furquan Shaikh | 99ac98f | 2014-04-23 10:18:48 -0700 | [diff] [blame] | 1102 | config MAX_REBOOT_CNT |
| 1103 | int |
| 1104 | default 3 |
Timothy Pearson | 17ada2e | 2015-03-18 01:31:34 -0500 | [diff] [blame] | 1105 | help |
| 1106 | Internal option that sets the maximum number of bootblock executions allowed |
| 1107 | with the normal image enabled before assuming the normal image is defective |
Vadim Bendebury | 9c9c336 | 2014-07-23 09:40:02 -0700 | [diff] [blame] | 1108 | and switching to the fallback image. |
Martin Roth | 59ff340 | 2016-02-09 09:06:46 -0700 | [diff] [blame] | 1109 | |
Martin Roth | 8e4aafb | 2016-12-15 15:25:15 -0700 | [diff] [blame] | 1110 | config UNCOMPRESSED_RAMSTAGE |
| 1111 | bool |
| 1112 | |
| 1113 | config NO_XIP_EARLY_STAGES |
| 1114 | bool |
| 1115 | default n if ARCH_X86 |
| 1116 | default y |
| 1117 | help |
| 1118 | Identify if early stages are eXecute-In-Place(XIP). |
| 1119 | |
Martin Roth | 8e4aafb | 2016-12-15 15:25:15 -0700 | [diff] [blame] | 1120 | config EARLY_CBMEM_LIST |
| 1121 | bool |
| 1122 | default n |
| 1123 | help |
| 1124 | Enable display of CBMEM during romstage and postcar. |
| 1125 | |
| 1126 | config RELOCATABLE_MODULES |
| 1127 | bool |
| 1128 | help |
| 1129 | If RELOCATABLE_MODULES is selected then support is enabled for |
| 1130 | building relocatable modules in the RAM stage. Those modules can be |
| 1131 | loaded anywhere and all the relocations are handled automatically. |
| 1132 | |
| 1133 | config NO_STAGE_CACHE |
| 1134 | bool |
Kyösti Mälkki | a8c0cb3 | 2018-06-25 15:38:45 +0300 | [diff] [blame] | 1135 | default y if !HAVE_ACPI_RESUME |
Martin Roth | 8e4aafb | 2016-12-15 15:25:15 -0700 | [diff] [blame] | 1136 | help |
| 1137 | Do not save any component in stage cache for resume path. On resume, |
| 1138 | all components would be read back from CBFS again. |
| 1139 | |
| 1140 | config GENERIC_GPIO_LIB |
| 1141 | bool |
| 1142 | help |
| 1143 | If enabled, compile the generic GPIO library. A "generic" GPIO |
| 1144 | implies configurability usually found on SoCs, particularly the |
| 1145 | ability to control internal pull resistors. |
| 1146 | |
| 1147 | config GENERIC_SPD_BIN |
| 1148 | bool |
| 1149 | help |
| 1150 | If enabled, add support for adding spd.hex files in cbfs as spd.bin |
| 1151 | and locating it runtime to load SPD. Additionally provide provision to |
| 1152 | fetch SPD over SMBus. |
| 1153 | |
| 1154 | config DIMM_MAX |
| 1155 | int |
| 1156 | default 4 |
| 1157 | depends on GENERIC_SPD_BIN |
| 1158 | help |
| 1159 | Total number of memory DIMM slots available on motherboard. |
| 1160 | It is multiplication of number of channel to number of DIMMs per |
| 1161 | channel |
| 1162 | |
| 1163 | config DIMM_SPD_SIZE |
| 1164 | int |
| 1165 | default 256 |
Martin Roth | 8e4aafb | 2016-12-15 15:25:15 -0700 | [diff] [blame] | 1166 | help |
| 1167 | Total SPD size that will be used for DIMM. |
| 1168 | Ex: DDR3 256, DDR4 512. |
| 1169 | |
Kane Chen | 66f1f38 | 2017-10-16 19:40:18 +0800 | [diff] [blame] | 1170 | config SPD_READ_BY_WORD |
| 1171 | bool |
| 1172 | |
Martin Roth | 8e4aafb | 2016-12-15 15:25:15 -0700 | [diff] [blame] | 1173 | config BOOTBLOCK_CUSTOM |
| 1174 | # To be selected by arch, SoC or mainboard if it does not want use the normal |
| 1175 | # src/lib/bootblock.c#main() C entry point. |
| 1176 | bool |
| 1177 | |
| 1178 | config C_ENVIRONMENT_BOOTBLOCK |
| 1179 | # To be selected by arch or platform if a C environment is available during the |
| 1180 | # bootblock. Normally this signifies availability of RW memory (e.g. SRAM). |
| 1181 | bool |
| 1182 | |
Martin Roth | 75e5cb7 | 2016-12-15 15:05:37 -0700 | [diff] [blame] | 1183 | ############################################################################### |
| 1184 | # Set default values for symbols created before mainboards. This allows the |
| 1185 | # option to be displayed in the general menu, but the default to be loaded in |
| 1186 | # the mainboard if desired. |
| 1187 | config COMPRESS_RAMSTAGE |
| 1188 | default y if !UNCOMPRESSED_RAMSTAGE |
| 1189 | |
| 1190 | config COMPRESS_PRERAM_STAGES |
| 1191 | depends on !ARCH_X86 |
| 1192 | default y |
| 1193 | |
| 1194 | config INCLUDE_CONFIG_FILE |
| 1195 | default y |
| 1196 | |
Martin Roth | 75e5cb7 | 2016-12-15 15:05:37 -0700 | [diff] [blame] | 1197 | config BOOTSPLASH_FILE |
| 1198 | depends on BOOTSPLASH_IMAGE |
| 1199 | default "bootsplash.jpg" |
| 1200 | |
| 1201 | config CBFS_SIZE |
| 1202 | default ROM_SIZE |