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Patrick Georgi0588d192009-08-12 15:00:51 +00001##
Stefan Reinauer16f515a2010-01-20 18:44:30 +00002## This file is part of the coreboot project.
Patrick Georgi0588d192009-08-12 15:00:51 +00003##
Alexandru Gagniuc70c660f2012-08-23 02:32:58 -05004## Copyright (C) 2012 Alexandru Gagniuc <mr.nuke.me@gmail.com>
Stefan Reinauer16f515a2010-01-20 18:44:30 +00005## Copyright (C) 2009-2010 coresystems GmbH
Patrick Georgi0588d192009-08-12 15:00:51 +00006##
Stefan Reinauer16f515a2010-01-20 18:44:30 +00007## This program is free software; you can redistribute it and/or modify
8## it under the terms of the GNU General Public License as published by
9## the Free Software Foundation; version 2 of the License.
10##
11## This program is distributed in the hope that it will be useful,
12## but WITHOUT ANY WARRANTY; without even the implied warranty of
13## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14## GNU General Public License for more details.
15##
16## You should have received a copy of the GNU General Public License
17## along with this program; if not, write to the Free Software
18## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Patrick Georgi0588d192009-08-12 15:00:51 +000019##
20
Uwe Hermannad8c95f2012-04-12 22:00:03 +020021mainmenu "coreboot configuration"
Patrick Georgi0588d192009-08-12 15:00:51 +000022
Uwe Hermannc04be932009-10-05 13:55:28 +000023menu "General setup"
24
Uwe Hermanna29ad5c2009-10-18 18:35:50 +000025config EXPERT
26 bool "Expert mode"
27 help
28 This allows you to select certain advanced configuration options.
29
30 Warning: Only enable this option if you really know what you are
31 doing! You have been warned!
32
Uwe Hermannc04be932009-10-05 13:55:28 +000033config LOCALVERSION
Uwe Hermann168b11b2009-10-07 16:15:40 +000034 string "Local version string"
Uwe Hermannc04be932009-10-05 13:55:28 +000035 help
36 Append an extra string to the end of the coreboot version.
37
Uwe Hermann168b11b2009-10-07 16:15:40 +000038 This can be useful if, for instance, you want to append the
39 respective board's hostname or some other identifying string to
40 the coreboot version number, so that you can easily distinguish
41 boot logs of different boards from each other.
42
Patrick Georgi4b8a2412010-02-09 19:35:16 +000043config CBFS_PREFIX
44 string "CBFS prefix to use"
45 default "fallback"
46 help
47 Select the prefix to all files put into the image. It's "fallback"
48 by default, "normal" is a common alternative.
49
Patrick Georgi23d89cc2010-03-16 01:17:19 +000050choice
Uwe Hermannad8c95f2012-04-12 22:00:03 +020051 prompt "Compiler to use"
Patrick Georgi23d89cc2010-03-16 01:17:19 +000052 default COMPILER_GCC
53 help
54 This option allows you to select the compiler used for building
55 coreboot.
56
57config COMPILER_GCC
58 bool "GCC"
Uwe Hermannad8c95f2012-04-12 22:00:03 +020059 help
60 Use the GNU Compiler Collection (GCC) to build coreboot.
61
62 For details see http://gcc.gnu.org.
63
Patrick Georgi23d89cc2010-03-16 01:17:19 +000064config COMPILER_LLVM_CLANG
65 bool "LLVM/clang"
Uwe Hermannad8c95f2012-04-12 22:00:03 +020066 help
67 Use LLVM/clang to build coreboot.
68
69 For details see http://clang.llvm.org.
70
Patrick Georgi23d89cc2010-03-16 01:17:19 +000071endchoice
72
Patrick Georgi020f51f2010-03-14 21:25:03 +000073config SCANBUILD_ENABLE
Uwe Hermannad8c95f2012-04-12 22:00:03 +020074 bool "Build with scan-build for static code analysis"
Patrick Georgi020f51f2010-03-14 21:25:03 +000075 default n
76 help
Uwe Hermannad8c95f2012-04-12 22:00:03 +020077 Changes the build process to use scan-build (a utility for
78 running the clang static code analyzer from the command line).
79
80 Requires the scan-build utility in your system $PATH.
81
82 For details see http://clang-analyzer.llvm.org/scan-build.html.
Patrick Georgi020f51f2010-03-14 21:25:03 +000083
84config SCANBUILD_REPORT_LOCATION
Uwe Hermannad8c95f2012-04-12 22:00:03 +020085 string "Directory for the scan-build report(s)"
Patrick Georgi020f51f2010-03-14 21:25:03 +000086 default ""
87 depends on SCANBUILD_ENABLE
88 help
Uwe Hermannad8c95f2012-04-12 22:00:03 +020089 Directory where the scan-build reports should be stored in. The
90 reports are stored in subdirectories of the form 'yyyy-mm-dd-*'
91 in the specified directory.
92
93 If this setting is left empty, the coreboot top-level directory
94 will be used to store the report subdirectories.
Patrick Georgi020f51f2010-03-14 21:25:03 +000095
Patrick Georgi516a2a72010-03-25 21:45:25 +000096config CCACHE
Uwe Hermannad8c95f2012-04-12 22:00:03 +020097 bool "Use ccache to speed up (re)compilation"
Patrick Georgi516a2a72010-03-25 21:45:25 +000098 default n
99 help
100 Enables the use of ccache for faster builds.
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200101
102 Requires the ccache utility in your system $PATH.
103
104 For details see https://ccache.samba.org.
Patrick Georgi516a2a72010-03-25 21:45:25 +0000105
Stefan Reinauer9bf78102010-08-09 13:28:18 +0000106config SCONFIG_GENPARSER
107 bool "Generate SCONFIG parser using flex and bison"
108 default n
109 depends on EXPERT
110 help
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200111 Enable this option if you are working on the sconfig device tree
112 parser and made changes to sconfig.l and sconfig.y.
113
Stefan Reinauer9bf78102010-08-09 13:28:18 +0000114 Otherwise, say N.
115
Joe Korty6d772522010-05-19 18:41:15 +0000116config USE_OPTION_TABLE
117 bool "Use CMOS for configuration values"
118 default n
Edwin Beasanteb50c7d2010-07-06 21:05:04 +0000119 depends on HAVE_OPTION_TABLE
Joe Korty6d772522010-05-19 18:41:15 +0000120 help
121 Enable this option if coreboot shall read options from the "CMOS"
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200122 NVRAM instead of using hard-coded values.
Joe Korty6d772522010-05-19 18:41:15 +0000123
Sven Schnelle8eee19d2011-05-02 19:53:04 +0000124config COMPRESS_RAMSTAGE
125 bool "Compress ramstage with LZMA"
126 default y
127 help
128 Compress ramstage to save memory in the flash image. Note
129 that decompression might slow down booting if the boot flash
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200130 is connected through a slow link (i.e. SPI).
Sven Schnelle8eee19d2011-05-02 19:53:04 +0000131
Cristian Măgherușan-Stanciud367b002011-06-19 03:03:28 +0200132config INCLUDE_CONFIG_FILE
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200133 bool "Include the coreboot .config file into the ROM image"
Cristian Măgherușan-Stanciud367b002011-06-19 03:03:28 +0200134 default y
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200135 help
136 Include the .config file that was used to compile coreboot
137 in the (CBFS) ROM image. This is useful if you want to know which
138 options were used to build a specific coreboot.rom image.
139
140 Saying Y here will increase the image size by 2-3kB.
141
142 You can use the following command to easily list the options:
143
144 grep -a CONFIG_ coreboot.rom
145
146 Alternatively, you can also use cbfstool to print the image
147 contents (including the raw 'config' item we're looking for).
148
149 Example:
150
151 $ cbfstool coreboot.rom print
152 coreboot.rom: 4096 kB, bootblocksize 1008, romsize 4194304,
153 offset 0x0
154 Alignment: 64 bytes
Steve Goodrichf0269122012-05-18 11:18:47 -0600155
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200156 Name Offset Type Size
157 cmos_layout.bin 0x0 cmos layout 1159
158 fallback/romstage 0x4c0 stage 339756
159 fallback/coreboot_ram 0x53440 stage 186664
160 fallback/payload 0x80dc0 payload 51526
161 config 0x8d740 raw 3324
162 (empty) 0x8e480 null 3610440
Cristian Măgherușan-Stanciud367b002011-06-19 03:03:28 +0200163
Vadim Bendeburye6b6aff2011-09-20 16:46:46 -0700164config EARLY_CBMEM_INIT
165 bool "Initialize CBMEM while in ROM stage"
166 default n
167 help
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200168 Make coreboot initialize the cbmem structures while running in ROM
169 stage. This could be useful when the ROM stage wants to communicate
Vadim Bendeburye6b6aff2011-09-20 16:46:46 -0700170 some, for instance, execution timestamps.
171
Vadim Bendebury9202473d2011-09-21 14:46:43 -0700172config COLLECT_TIMESTAMPS
173 bool "Create a table of timestamps collected during boot"
174 depends on EARLY_CBMEM_INIT
175 help
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200176 Make coreboot create a table of timer-ID/timer-value pairs to
177 allow measuring time spent at different phases of the boot process.
178
Patrick Georgi7e9b9d82012-04-30 21:06:10 +0200179config USE_BLOBS
180 bool "Allow use of binary-only repository"
181 default n
182 help
183 This draws in the blobs repository, which contains binary files that
184 might be required for some chipsets or boards.
185 This flag ensures that a "Free" option remains available for users.
186
187config REQUIRES_BLOB
188 bool
189 default n
190 help
191 This option can be configured by boards that require the blobs
192 repository for the default configuration. It will make the build
193 fail if USE_BLOBS is disabled. Users that still desire to do a
194 coreboot build for such a board can override this manually, but
195 this option serves as warning that it might fail.
196
Uwe Hermannc04be932009-10-05 13:55:28 +0000197endmenu
198
Patrick Georgi0588d192009-08-12 15:00:51 +0000199source src/mainboard/Kconfig
Stefan Reinauer8aedcbc2010-12-16 23:37:17 +0000200
201# This option is used to set the architecture of a mainboard to X86.
202# It is usually set in mainboard/*/Kconfig.
203config ARCH_X86
204 bool
205 default n
206
207if ARCH_X86
Stefan Reinauer8677a232010-12-11 20:33:41 +0000208source src/arch/x86/Kconfig
Stefan Reinauer8aedcbc2010-12-16 23:37:17 +0000209endif
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000210
211menu "Chipset"
212
213comment "CPU"
Patrick Georgi0588d192009-08-12 15:00:51 +0000214source src/cpu/Kconfig
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000215comment "Northbridge"
216source src/northbridge/Kconfig
217comment "Southbridge"
218source src/southbridge/Kconfig
219comment "Super I/O"
220source src/superio/Kconfig
221comment "Devices"
222source src/devices/Kconfig
Sven Schnelle7592e8b2011-01-27 11:43:03 +0000223comment "Embedded Controllers"
224source src/ec/Kconfig
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000225
226endmenu
Patrick Georgi0588d192009-08-12 15:00:51 +0000227
Rudolf Marekd9c25492010-05-16 15:31:53 +0000228menu "Generic Drivers"
229source src/drivers/Kconfig
230endmenu
231
Patrick Georgi0588d192009-08-12 15:00:51 +0000232config PCI_BUS_SEGN_BITS
Myles Watson74fb8f22009-09-24 15:09:11 +0000233 int
234 default 0
Patrick Georgi892b0912009-09-24 09:03:06 +0000235
Patrick Georgi0588d192009-08-12 15:00:51 +0000236config PCI_ROM_RUN
Patrick Georgi698c0e0e2009-08-25 17:38:24 +0000237 bool
238 default n
Patrick Georgi0588d192009-08-12 15:00:51 +0000239
Patrick Georgi0588d192009-08-12 15:00:51 +0000240config HEAP_SIZE
241 hex
Myles Watson04000f42009-10-16 19:12:49 +0000242 default 0x4000
Patrick Georgi0588d192009-08-12 15:00:51 +0000243
Patrick Georgi0588d192009-08-12 15:00:51 +0000244config MAX_CPUS
245 int
246 default 1
247
248config MMCONF_SUPPORT_DEFAULT
249 bool
250 default n
251
252config MMCONF_SUPPORT
253 bool
254 default n
255
Patrick Georgi0588d192009-08-12 15:00:51 +0000256source src/console/Kconfig
257
Stefan Reinauer4885daa2011-04-26 23:47:04 +0000258# This should default to N and be set by SuperI/O drivers that have an UART
259config HAVE_UART_IO_MAPPED
260 bool
261 default y
262
263config HAVE_UART_MEMORY_MAPPED
264 bool
265 default n
266
Patrick Georgi0588d192009-08-12 15:00:51 +0000267config HAVE_ACPI_RESUME
268 bool
269 default n
270
Stefan Reinauerc4f1a772010-06-05 10:03:08 +0000271config HAVE_ACPI_SLIC
272 bool
273 default n
274
Patrick Georgi0588d192009-08-12 15:00:51 +0000275config ACPI_SSDTX_NUM
276 int
277 default 0
278
Patrick Georgi0588d192009-08-12 15:00:51 +0000279config HAVE_HARD_RESET
280 bool
Patrick Georgi37bdb872010-02-27 08:39:04 +0000281 default y if BOARD_HAS_HARD_RESET
Uwe Hermann748475b2009-10-09 11:47:21 +0000282 default n
Patrick Georgi37bdb872010-02-27 08:39:04 +0000283 help
284 This variable specifies whether a given board has a hard_reset
285 function, no matter if it's provided by board code or chipset code.
286
Patrick Georgi0588d192009-08-12 15:00:51 +0000287config HAVE_INIT_TIMER
288 bool
Patrick Georgi1f807fd2010-01-04 20:09:27 +0000289 default n if UDELAY_IO
Myles Watsond73c1b52009-10-26 15:14:07 +0000290 default y
Patrick Georgi0588d192009-08-12 15:00:51 +0000291
zbaof7223732012-04-13 13:42:15 +0800292config HIGH_SCRATCH_MEMORY_SIZE
293 hex
294 default 0x0
295
Edwin Beasanteb50c7d2010-07-06 21:05:04 +0000296config USE_OPTION_TABLE
297 bool
298 default n
299
Patrick Georgi0588d192009-08-12 15:00:51 +0000300config HAVE_OPTION_TABLE
301 bool
Edwin Beasanteb50c7d2010-07-06 21:05:04 +0000302 default n
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000303 help
304 This variable specifies whether a given board has a cmos.layout
305 file containing NVRAM/CMOS bit definitions.
Edwin Beasanteb50c7d2010-07-06 21:05:04 +0000306 It defaults to 'n' but can be selected in mainboard/*/Kconfig.
Patrick Georgi0588d192009-08-12 15:00:51 +0000307
Patrick Georgi0588d192009-08-12 15:00:51 +0000308config PIRQ_ROUTE
309 bool
310 default n
311
312config HAVE_SMI_HANDLER
313 bool
314 default n
315
316config PCI_IO_CFG_EXT
317 bool
318 default n
319
320config IOAPIC
321 bool
322 default n
323
Stefan Reinauer3008bbad2011-10-11 14:46:25 -0700324config TPM
325 bool
326 default n
327
Stefan Reinauer5b635792012-08-16 14:05:42 -0700328config CBFS_SIZE
329 hex
330 default ROM_SIZE
331
332config CACHE_ROM_SIZE
333 hex
334 default CBFS_SIZE
335
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000336# TODO: Can probably be removed once all chipsets have kconfig options for it.
Uwe Hermann70b0cf22009-10-04 17:15:39 +0000337config VIDEO_MB
338 int
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000339 default 0
Uwe Hermann70b0cf22009-10-04 17:15:39 +0000340
Myles Watson45bb25f2009-09-22 18:49:08 +0000341config USE_WATCHDOG_ON_BOOT
342 bool
343 default n
344
345config VGA
346 bool
347 default n
348 help
349 Build board-specific VGA code.
350
351config GFXUMA
352 bool
Myles Watsond73c1b52009-10-26 15:14:07 +0000353 default n
Myles Watson45bb25f2009-09-22 18:49:08 +0000354 help
355 Enable Unified Memory Architecture for graphics.
356
Uwe Hermann5ec2c2b2009-08-25 00:53:22 +0000357# TODO
358# menu "Drivers"
Uwe Hermann168b11b2009-10-07 16:15:40 +0000359#
Uwe Hermann5ec2c2b2009-08-25 00:53:22 +0000360# endmenu
Patrick Georgi0588d192009-08-12 15:00:51 +0000361
Myles Watsonb8e20272009-10-15 13:35:47 +0000362config HAVE_ACPI_TABLES
363 bool
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000364 help
365 This variable specifies whether a given board has ACPI table support.
366 It is usually set in mainboard/*/Kconfig.
367 Whether or not the ACPI tables are actually generated by coreboot
368 is configurable by the user via GENERATE_ACPI_TABLES.
Myles Watsonb8e20272009-10-15 13:35:47 +0000369
370config HAVE_MP_TABLE
371 bool
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000372 help
373 This variable specifies whether a given board has MP table support.
374 It is usually set in mainboard/*/Kconfig.
375 Whether or not the MP table is actually generated by coreboot
376 is configurable by the user via GENERATE_MP_TABLE.
Myles Watsonb8e20272009-10-15 13:35:47 +0000377
378config HAVE_PIRQ_TABLE
379 bool
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000380 help
381 This variable specifies whether a given board has PIRQ table support.
382 It is usually set in mainboard/*/Kconfig.
383 Whether or not the PIRQ table is actually generated by coreboot
384 is configurable by the user via GENERATE_PIRQ_TABLE.
Myles Watsonb8e20272009-10-15 13:35:47 +0000385
Alexandru Gagniuc70c660f2012-08-23 02:32:58 -0500386config MAX_PIRQ_LINKS
387 int
388 default 4
389 help
390 This variable specifies the number of PIRQ interrupt links which are
391 routable. On most chipsets, this is 4, INTA through INTD. Some
392 chipsets offer more than four links, commonly up to INTH. They may
393 also have a separate link for ATA or IOAPIC interrupts. When the PIRQ
394 table specifies links greater than 4, pirq_route_irqs will not
395 function properly, unless this variable is correctly set.
396
Myles Watsond73c1b52009-10-26 15:14:07 +0000397#These Options are here to avoid "undefined" warnings.
398#The actual selection and help texts are in the following menu.
399
400config GENERATE_ACPI_TABLES
Myles Watsonb8e20272009-10-15 13:35:47 +0000401 bool
Myles Watsond73c1b52009-10-26 15:14:07 +0000402 default HAVE_ACPI_TABLES
403
404config GENERATE_MP_TABLE
405 bool
Kyösti Mälkki651339b2012-08-25 00:21:44 +0300406 default HAVE_MP_TABLE || DRIVERS_GENERIC_IOAPIC
Myles Watsond73c1b52009-10-26 15:14:07 +0000407
408config GENERATE_PIRQ_TABLE
409 bool
410 default HAVE_PIRQ_TABLE
411
Sven Schnelle164bcfd2011-08-14 20:56:34 +0200412config GENERATE_SMBIOS_TABLES
413 bool
414 default y
415
Uwe Hermann168b11b2009-10-07 16:15:40 +0000416menu "System tables"
Myles Watson45bb25f2009-09-22 18:49:08 +0000417
Myles Watsonb8e20272009-10-15 13:35:47 +0000418config WRITE_HIGH_TABLES
Myles Watson45bb25f2009-09-22 18:49:08 +0000419 bool "Write 'high' tables to avoid being overwritten in F segment"
420 default y
421
422config MULTIBOOT
Uwe Hermann168b11b2009-10-07 16:15:40 +0000423 bool "Generate Multiboot tables (for GRUB2)"
Ronald G. Minnich7f91d922009-11-09 17:56:47 +0000424 default y
Myles Watson45bb25f2009-09-22 18:49:08 +0000425
Myles Watsonb8e20272009-10-15 13:35:47 +0000426config GENERATE_ACPI_TABLES
427 depends on HAVE_ACPI_TABLES
Myles Watson45bb25f2009-09-22 18:49:08 +0000428 bool "Generate ACPI tables"
Myles Watsonb8e20272009-10-15 13:35:47 +0000429 default y
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000430 help
431 Generate ACPI tables for this board.
432
433 If unsure, say Y.
Myles Watson45bb25f2009-09-22 18:49:08 +0000434
Myles Watsonb8e20272009-10-15 13:35:47 +0000435config GENERATE_MP_TABLE
Kyösti Mälkki651339b2012-08-25 00:21:44 +0300436 depends on HAVE_MP_TABLE || DRIVERS_GENERIC_IOAPIC
Myles Watson45bb25f2009-09-22 18:49:08 +0000437 bool "Generate an MP table"
Myles Watsonb8e20272009-10-15 13:35:47 +0000438 default y
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000439 help
440 Generate an MP table (conforming to the Intel MultiProcessor
441 specification 1.4) for this board.
442
443 If unsure, say Y.
Myles Watson45bb25f2009-09-22 18:49:08 +0000444
Myles Watsonb8e20272009-10-15 13:35:47 +0000445config GENERATE_PIRQ_TABLE
446 depends on HAVE_PIRQ_TABLE
Myles Watson45bb25f2009-09-22 18:49:08 +0000447 bool "Generate a PIRQ table"
Myles Watsonb8e20272009-10-15 13:35:47 +0000448 default y
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000449 help
450 Generate a PIRQ table for this board.
451
452 If unsure, say Y.
Myles Watson45bb25f2009-09-22 18:49:08 +0000453
Sven Schnelle164bcfd2011-08-14 20:56:34 +0200454config GENERATE_SMBIOS_TABLES
455 depends on ARCH_X86
456 bool "Generate SMBIOS tables"
457 default y
458 help
459 Generate SMBIOS tables for this board.
460
461 If unsure, say Y.
462
Myles Watson45bb25f2009-09-22 18:49:08 +0000463endmenu
464
Patrick Georgi0588d192009-08-12 15:00:51 +0000465menu "Payload"
466
Patrick Georgi0588d192009-08-12 15:00:51 +0000467choice
Uwe Hermann168b11b2009-10-07 16:15:40 +0000468 prompt "Add a payload"
Stefan Reinauerf1939bb2010-12-30 17:39:50 +0000469 default PAYLOAD_NONE if !ARCH_X86
470 default PAYLOAD_SEABIOS if ARCH_X86
Patrick Georgi0588d192009-08-12 15:00:51 +0000471
Uwe Hermann168b11b2009-10-07 16:15:40 +0000472config PAYLOAD_NONE
473 bool "None"
474 help
475 Select this option if you want to create an "empty" coreboot
476 ROM image for a certain mainboard, i.e. a coreboot ROM image
477 which does not yet contain a payload.
478
479 For such an image to be useful, you have to use 'cbfstool'
480 to add a payload to the ROM image later.
481
Patrick Georgi0588d192009-08-12 15:00:51 +0000482config PAYLOAD_ELF
Uwe Hermann168b11b2009-10-07 16:15:40 +0000483 bool "An ELF executable payload"
Patrick Georgi0588d192009-08-12 15:00:51 +0000484 help
485 Select this option if you have a payload image (an ELF file)
486 which coreboot should run as soon as the basic hardware
487 initialization is completed.
488
489 You will be able to specify the location and file name of the
490 payload image later.
Patrick Georgi0588d192009-08-12 15:00:51 +0000491
Stefan Reinauerf1939bb2010-12-30 17:39:50 +0000492config PAYLOAD_SEABIOS
493 bool "SeaBIOS"
494 depends on ARCH_X86
495 help
496 Select this option if you want to build a coreboot image
497 with a SeaBIOS payload. If you don't know what this is
498 about, just leave it enabled.
499
500 See http://coreboot.org/Payloads for more information.
501
Stefan Reinauere50952f2011-04-15 03:34:05 +0000502config PAYLOAD_FILO
503 bool "FILO"
504 help
505 Select this option if you want to build a coreboot image
506 with a FILO payload. If you don't know what this is
507 about, just leave it enabled.
508
509 See http://coreboot.org/Payloads for more information.
510
Stefan Reinauerf1939bb2010-12-30 17:39:50 +0000511endchoice
512
513choice
514 prompt "SeaBIOS version"
515 default SEABIOS_STABLE
516 depends on PAYLOAD_SEABIOS
517
518config SEABIOS_STABLE
Peter Stuge9b48ef22012-10-16 02:25:07 +0200519 bool "1.7.1"
Stefan Reinauerf1939bb2010-12-30 17:39:50 +0000520 help
521 Stable SeaBIOS version
522config SEABIOS_MASTER
523 bool "master"
524 help
525 Newest SeaBIOS version
Patrick Georgi0588d192009-08-12 15:00:51 +0000526endchoice
527
Stefan Reinauere50952f2011-04-15 03:34:05 +0000528choice
529 prompt "FILO version"
530 default FILO_STABLE
531 depends on PAYLOAD_FILO
532
533config FILO_STABLE
534 bool "0.6.0"
535 help
536 Stable FILO version
537config FILO_MASTER
538 bool "HEAD"
539 help
540 Newest FILO version
541endchoice
542
Stefan Reinauerbccbbe62010-12-19 21:20:14 +0000543config PAYLOAD_FILE
Cristi Magherusanb5034d42009-08-17 14:47:32 +0000544 string "Payload path and filename"
Patrick Georgi0588d192009-08-12 15:00:51 +0000545 depends on PAYLOAD_ELF
546 default "payload.elf"
547 help
Uwe Hermann5ec2c2b2009-08-25 00:53:22 +0000548 The path and filename of the ELF executable file to use as payload.
Patrick Georgi0588d192009-08-12 15:00:51 +0000549
Stefan Reinauerf1939bb2010-12-30 17:39:50 +0000550config PAYLOAD_FILE
551 depends on PAYLOAD_SEABIOS
Stefan Reinaueraff6dc22012-01-21 10:34:22 -0800552 default "$(obj)/seabios/out/bios.bin.elf"
Stefan Reinauerf1939bb2010-12-30 17:39:50 +0000553
Stefan Reinauere50952f2011-04-15 03:34:05 +0000554config PAYLOAD_FILE
555 depends on PAYLOAD_FILO
556 default "payloads/external/FILO/filo/build/filo.elf"
557
Uwe Hermann168b11b2009-10-07 16:15:40 +0000558# TODO: Defined if no payload? Breaks build?
559config COMPRESSED_PAYLOAD_LZMA
560 bool "Use LZMA compression for payloads"
561 default y
Stefan Reinauere50952f2011-04-15 03:34:05 +0000562 depends on PAYLOAD_ELF || PAYLOAD_SEABIOS || PAYLOAD_FILO
Uwe Hermann168b11b2009-10-07 16:15:40 +0000563 help
564 In order to reduce the size payloads take up in the ROM chip
565 coreboot can compress them using the LZMA algorithm.
566
Myles Watson04000f42009-10-16 19:12:49 +0000567config COMPRESSED_PAYLOAD_NRV2B
Peter Stuged7b37b02009-10-17 03:00:04 +0000568 bool
Myles Watson04000f42009-10-16 19:12:49 +0000569 default n
570
Peter Stugea758ca22009-09-17 16:21:31 +0000571endmenu
572
573menu "VGA BIOS"
574
575config VGA_BIOS
576 bool "Add a VGA BIOS image"
577 help
578 Select this option if you have a VGA BIOS image that you would
579 like to add to your ROM.
580
581 You will be able to specify the location and file name of the
582 image later.
583
Stefan Reinauerbccbbe62010-12-19 21:20:14 +0000584config VGA_BIOS_FILE
Cristi Magherusan488c36c2009-08-17 14:46:13 +0000585 string "VGA BIOS path and filename"
586 depends on VGA_BIOS
587 default "vgabios.bin"
588 help
589 The path and filename of the file to use as VGA BIOS.
590
Stefan Reinauerbccbbe62010-12-19 21:20:14 +0000591config VGA_BIOS_ID
Uwe Hermann81b3c0a2009-10-30 12:56:59 +0000592 string "VGA device PCI IDs"
Cristi Magherusan488c36c2009-08-17 14:46:13 +0000593 depends on VGA_BIOS
594 default "1106,3230"
595 help
Uwe Hermann168b11b2009-10-07 16:15:40 +0000596 The comma-separated PCI vendor and device ID that would associate
597 your VGA BIOS to your video card.
598
599 Example: 1106,3230
600
601 In the above example 1106 is the PCI vendor ID (in hex, but without
602 the "0x" prefix) and 3230 specifies the PCI device ID of the
603 video card (also in hex, without "0x" prefix).
Cristi Magherusan488c36c2009-08-17 14:46:13 +0000604
Stefan Reinauer800379f2010-03-01 08:34:19 +0000605config INTEL_MBI
606 bool "Add an MBI image"
607 depends on NORTHBRIDGE_INTEL_I82830
608 help
609 Select this option if you have an Intel MBI image that you would
610 like to add to your ROM.
611
612 You will be able to specify the location and file name of the
613 image later.
614
Stefan Reinauerbccbbe62010-12-19 21:20:14 +0000615config MBI_FILE
Stefan Reinauer800379f2010-03-01 08:34:19 +0000616 string "Intel MBI path and filename"
617 depends on INTEL_MBI
618 default "mbi.bin"
619 help
620 The path and filename of the file to use as VGA BIOS.
621
622endmenu
623
Stefan Reinauerc1efb902011-10-12 14:30:59 -0700624menu "Display"
625 depends on PCI_OPTION_ROM_RUN_YABEL || PCI_OPTION_ROM_RUN_REALMODE
626
627config FRAMEBUFFER_SET_VESA_MODE
628 prompt "Set VESA framebuffer mode"
629 bool
630 depends on PCI_OPTION_ROM_RUN_YABEL || PCI_OPTION_ROM_RUN_REALMODE
631 help
632 Set VESA framebuffer mode (needed for bootsplash)
633
Steve Goodrichf0269122012-05-18 11:18:47 -0600634choice
Stefan Reinauerc1efb902011-10-12 14:30:59 -0700635 prompt "VESA framebuffer video mode"
Steve Goodrichf0269122012-05-18 11:18:47 -0600636 default FRAMEBUFFER_VESA_MODE_117
Stefan Reinauerc1efb902011-10-12 14:30:59 -0700637 depends on FRAMEBUFFER_SET_VESA_MODE
638 help
639 This option sets the resolution used for the coreboot framebuffer (and
Steve Goodrichf0269122012-05-18 11:18:47 -0600640 bootsplash screen).
641
642config FRAMEBUFFER_VESA_MODE_100
643 bool "640x400 256-color"
644
645config FRAMEBUFFER_VESA_MODE_101
646 bool "640x480 256-color"
647
648config FRAMEBUFFER_VESA_MODE_102
649 bool "800x600 16-color"
650
651config FRAMEBUFFER_VESA_MODE_103
652 bool "800x600 256-color"
653
654config FRAMEBUFFER_VESA_MODE_104
655 bool "1024x768 16-color"
656
657config FRAMEBUFFER_VESA_MODE_105
658 bool "1024x7686 256-color"
659
660config FRAMEBUFFER_VESA_MODE_106
661 bool "1280x1024 16-color"
662
663config FRAMEBUFFER_VESA_MODE_107
664 bool "1280x1024 256-color"
665
666config FRAMEBUFFER_VESA_MODE_108
667 bool "80x60 text"
668
669config FRAMEBUFFER_VESA_MODE_109
670 bool "132x25 text"
671
672config FRAMEBUFFER_VESA_MODE_10A
673 bool "132x43 text"
674
675config FRAMEBUFFER_VESA_MODE_10B
676 bool "132x50 text"
677
678config FRAMEBUFFER_VESA_MODE_10C
679 bool "132x60 text"
680
681config FRAMEBUFFER_VESA_MODE_10D
682 bool "320x200 32k-color (1:5:5:5)"
683
684config FRAMEBUFFER_VESA_MODE_10E
685 bool "320x200 64k-color (5:6:5)"
686
687config FRAMEBUFFER_VESA_MODE_10F
688 bool "320x200 16.8M-color (8:8:8)"
689
690config FRAMEBUFFER_VESA_MODE_110
691 bool "640x480 32k-color (1:5:5:5)"
692
693config FRAMEBUFFER_VESA_MODE_111
694 bool "640x480 64k-color (5:6:5)"
695
696config FRAMEBUFFER_VESA_MODE_112
697 bool "640x480 16.8M-color (8:8:8)"
698
699config FRAMEBUFFER_VESA_MODE_113
700 bool "800x600 32k-color (1:5:5:5)"
701
702config FRAMEBUFFER_VESA_MODE_114
703 bool "800x600 64k-color (5:6:5)"
704
705config FRAMEBUFFER_VESA_MODE_115
706 bool "800x600 16.8M-color (8:8:8)"
707
708config FRAMEBUFFER_VESA_MODE_116
709 bool "1024x768 32k-color (1:5:5:5)"
710
711config FRAMEBUFFER_VESA_MODE_117
712 bool "1024x768 64k-color (5:6:5)"
713
714config FRAMEBUFFER_VESA_MODE_118
715 bool "1024x768 16.8M-color (8:8:8)"
716
717config FRAMEBUFFER_VESA_MODE_119
718 bool "1280x1024 32k-color (1:5:5:5)"
719
720config FRAMEBUFFER_VESA_MODE_11A
721 bool "1280x1024 64k-color (5:6:5)"
722
723config FRAMEBUFFER_VESA_MODE_11B
724 bool "1280x1024 16.8M-color (8:8:8)"
725
726endchoice
727
728# Map the config names to an integer (KB).
729config FRAMEBUFFER_VESA_MODE
730 hex
731 default 0x100 if FRAMEBUFFER_VESA_MODE_100
732 default 0x101 if FRAMEBUFFER_VESA_MODE_101
733 default 0x102 if FRAMEBUFFER_VESA_MODE_102
734 default 0x103 if FRAMEBUFFER_VESA_MODE_103
735 default 0x104 if FRAMEBUFFER_VESA_MODE_104
736 default 0x105 if FRAMEBUFFER_VESA_MODE_105
737 default 0x106 if FRAMEBUFFER_VESA_MODE_106
738 default 0x107 if FRAMEBUFFER_VESA_MODE_107
739 default 0x108 if FRAMEBUFFER_VESA_MODE_108
740 default 0x109 if FRAMEBUFFER_VESA_MODE_109
741 default 0x10A if FRAMEBUFFER_VESA_MODE_10A
742 default 0x10B if FRAMEBUFFER_VESA_MODE_10B
743 default 0x10C if FRAMEBUFFER_VESA_MODE_10C
744 default 0x10D if FRAMEBUFFER_VESA_MODE_10D
745 default 0x10E if FRAMEBUFFER_VESA_MODE_10E
746 default 0x10F if FRAMEBUFFER_VESA_MODE_10F
747 default 0x110 if FRAMEBUFFER_VESA_MODE_110
748 default 0x111 if FRAMEBUFFER_VESA_MODE_111
749 default 0x112 if FRAMEBUFFER_VESA_MODE_112
750 default 0x113 if FRAMEBUFFER_VESA_MODE_113
751 default 0x114 if FRAMEBUFFER_VESA_MODE_114
752 default 0x115 if FRAMEBUFFER_VESA_MODE_115
753 default 0x116 if FRAMEBUFFER_VESA_MODE_116
754 default 0x117 if FRAMEBUFFER_VESA_MODE_117
755 default 0x118 if FRAMEBUFFER_VESA_MODE_118
756 default 0x119 if FRAMEBUFFER_VESA_MODE_119
757 default 0x11A if FRAMEBUFFER_VESA_MODE_11A
758 default 0x11B if FRAMEBUFFER_VESA_MODE_11B
Stefan Reinauerc1efb902011-10-12 14:30:59 -0700759
760config FRAMEBUFFER_KEEP_VESA_MODE
761 prompt "Keep VESA framebuffer"
762 bool
763 depends on PCI_OPTION_ROM_RUN_YABEL || PCI_OPTION_ROM_RUN_REALMODE
764 help
765 This option keeps the framebuffer mode set after coreboot finishes
766 execution. If this option is enabled, coreboot will pass a
767 framebuffer entry in its coreboot table and the payload will need a
768 framebuffer driver. If this option is disabled, coreboot will switch
769 back to text mode before handing control to a payload.
Stefan Reinauer800379f2010-03-01 08:34:19 +0000770
771config BOOTSPLASH
772 prompt "Show graphical bootsplash"
773 bool
Stefan Reinauerc1efb902011-10-12 14:30:59 -0700774 depends on FRAMEBUFFER_SET_VESA_MODE
Stefan Reinauer800379f2010-03-01 08:34:19 +0000775 help
776 This option shows a graphical bootsplash screen. The grapics are
777 loaded from the CBFS file bootsplash.jpg.
778
Stefan Reinauerbccbbe62010-12-19 21:20:14 +0000779config BOOTSPLASH_FILE
Stefan Reinauer800379f2010-03-01 08:34:19 +0000780 string "Bootsplash path and filename"
781 depends on BOOTSPLASH
782 default "bootsplash.jpg"
783 help
Stefan Reinauer14e22772010-04-27 06:56:47 +0000784 The path and filename of the file to use as graphical bootsplash
785 screen. The file format has to be jpg.
Patrick Georgi0588d192009-08-12 15:00:51 +0000786endmenu
787
Uwe Hermann168b11b2009-10-07 16:15:40 +0000788menu "Debugging"
789
790# TODO: Better help text and detailed instructions.
Patrick Georgi0588d192009-08-12 15:00:51 +0000791config GDB_STUB
Uwe Hermann5ec2c2b2009-08-25 00:53:22 +0000792 bool "GDB debugging support"
Rudolf Marek65888022012-03-25 20:51:16 +0200793 default n
Patrick Georgi0588d192009-08-12 15:00:51 +0000794 help
Uwe Hermann5ec2c2b2009-08-25 00:53:22 +0000795 If enabled, you will be able to set breakpoints for gdb debugging.
Stefan Reinauer8677a232010-12-11 20:33:41 +0000796 See src/arch/x86/lib/c_start.S for details.
Patrick Georgi0588d192009-08-12 15:00:51 +0000797
Denis 'GNUtoo' Cariklie4cece02012-06-22 15:56:37 +0200798config GDB_WAIT
799 bool "Wait for a GDB connection"
800 default n
801 depends on GDB_STUB
802 help
803 If enabled, coreboot will wait for a GDB connection.
804
Stefan Reinauerfe422182012-05-02 16:33:18 -0700805config DEBUG_CBFS
806 bool "Output verbose CBFS debug messages"
807 default n
808 depends on TPM
809 help
810 This option enables additional CBFS related debug messages.
811
Jens Rottmann0d11f2d2010-08-26 12:46:02 +0000812config HAVE_DEBUG_RAM_SETUP
813 def_bool n
814
Uwe Hermann01ce6012010-03-05 10:03:50 +0000815config DEBUG_RAM_SETUP
816 bool "Output verbose RAM init debug messages"
817 default n
Jens Rottmann0d11f2d2010-08-26 12:46:02 +0000818 depends on HAVE_DEBUG_RAM_SETUP
Uwe Hermann01ce6012010-03-05 10:03:50 +0000819 help
820 This option enables additional RAM init related debug messages.
821 It is recommended to enable this when debugging issues on your
822 board which might be RAM init related.
823
824 Note: This option will increase the size of the coreboot image.
825
826 If unsure, say N.
827
Patrick Georgie82618d2010-10-01 14:50:12 +0000828config HAVE_DEBUG_CAR
829 def_bool n
830
Peter Stuge5015f792010-11-10 02:00:32 +0000831config DEBUG_CAR
832 def_bool n
833 depends on HAVE_DEBUG_CAR
834
835if DEFAULT_CONSOLE_LOGLEVEL_7 || DEFAULT_CONSOLE_LOGLEVEL_8
Uwe Hermanna953f372010-11-10 00:14:32 +0000836# Only visible if debug level is DEBUG (7) or SPEW (8) as it does additional
837# printk(BIOS_DEBUG, ...) calls.
Patrick Georgie82618d2010-10-01 14:50:12 +0000838config DEBUG_CAR
839 bool "Output verbose Cache-as-RAM debug messages"
840 default n
Peter Stuge5015f792010-11-10 02:00:32 +0000841 depends on HAVE_DEBUG_CAR
Patrick Georgie82618d2010-10-01 14:50:12 +0000842 help
843 This option enables additional CAR related debug messages.
Peter Stuge5015f792010-11-10 02:00:32 +0000844endif
Patrick Georgie82618d2010-10-01 14:50:12 +0000845
Myles Watson80e914ff2010-06-01 19:25:31 +0000846config DEBUG_PIRQ
847 bool "Check PIRQ table consistency"
848 default n
849 depends on GENERATE_PIRQ_TABLE
850 help
851 If unsure, say N.
852
Jens Rottmann0d11f2d2010-08-26 12:46:02 +0000853config HAVE_DEBUG_SMBUS
854 def_bool n
855
Uwe Hermann01ce6012010-03-05 10:03:50 +0000856config DEBUG_SMBUS
857 bool "Output verbose SMBus debug messages"
858 default n
Jens Rottmann0d11f2d2010-08-26 12:46:02 +0000859 depends on HAVE_DEBUG_SMBUS
Uwe Hermann01ce6012010-03-05 10:03:50 +0000860 help
861 This option enables additional SMBus (and SPD) debug messages.
862
863 Note: This option will increase the size of the coreboot image.
864
865 If unsure, say N.
866
867config DEBUG_SMI
868 bool "Output verbose SMI debug messages"
869 default n
870 depends on HAVE_SMI_HANDLER
871 help
872 This option enables additional SMI related debug messages.
873
874 Note: This option will increase the size of the coreboot image.
875
876 If unsure, say N.
877
Stefan Reinauerbc0f7a62010-08-01 15:41:14 +0000878config DEBUG_SMM_RELOCATION
879 bool "Debug SMM relocation code"
880 default n
881 depends on HAVE_SMI_HANDLER
882 help
883 This option enables additional SMM handler relocation related
884 debug messages.
885
886 Note: This option will increase the size of the coreboot image.
887
888 If unsure, say N.
889
Peter Stuge5015f792010-11-10 02:00:32 +0000890config DEBUG_MALLOC
891 def_bool n
892
Uwe Hermanna953f372010-11-10 00:14:32 +0000893# Only visible if debug level is DEBUG (7) or SPEW (8) as it does additional
894# printk(BIOS_DEBUG, ...) calls.
Peter Stuge5015f792010-11-10 02:00:32 +0000895if DEFAULT_CONSOLE_LOGLEVEL_7 || DEFAULT_CONSOLE_LOGLEVEL_8
Uwe Hermanna953f372010-11-10 00:14:32 +0000896config DEBUG_MALLOC
897 bool "Output verbose malloc debug messages"
898 default n
Uwe Hermanna953f372010-11-10 00:14:32 +0000899 help
900 This option enables additional malloc related debug messages.
901
902 Note: This option will increase the size of the coreboot image.
903
904 If unsure, say N.
Peter Stuge5015f792010-11-10 02:00:32 +0000905endif
Uwe Hermanna953f372010-11-10 00:14:32 +0000906
Cristian Măgherușan-Stanciu9f52ea42011-07-02 00:44:39 +0300907config DEBUG_ACPI
908 def_bool n
909
910# Only visible if debug level is DEBUG (7) or SPEW (8) as it does additional
911# printk(BIOS_DEBUG, ...) calls.
912if DEFAULT_CONSOLE_LOGLEVEL_7 || DEFAULT_CONSOLE_LOGLEVEL_8
913config DEBUG_ACPI
914 bool "Output verbose ACPI debug messages"
915 default n
916 help
917 This option enables additional ACPI related debug messages.
918
919 Note: This option will slightly increase the size of the coreboot image.
920
921 If unsure, say N.
922endif
923
Peter Stuge5015f792010-11-10 02:00:32 +0000924config REALMODE_DEBUG
925 def_bool n
926 depends on PCI_OPTION_ROM_RUN_REALMODE
927
928if DEFAULT_CONSOLE_LOGLEVEL_7 || DEFAULT_CONSOLE_LOGLEVEL_8
Uwe Hermanna953f372010-11-10 00:14:32 +0000929# Only visible if debug level is DEBUG (7) or SPEW (8) as it does additional
930# printk(BIOS_DEBUG, ...) calls.
Myles Watson6c9bc012010-09-07 22:30:15 +0000931config REALMODE_DEBUG
932 bool "Enable debug messages for option ROM execution"
933 default n
Peter Stuge5015f792010-11-10 02:00:32 +0000934 depends on PCI_OPTION_ROM_RUN_REALMODE
Myles Watson6c9bc012010-09-07 22:30:15 +0000935 help
936 This option enables additional x86emu related debug messages.
937
938 Note: This option will increase the time to emulate a ROM.
939
940 If unsure, say N.
Peter Stuge5015f792010-11-10 02:00:32 +0000941endif
Myles Watson6c9bc012010-09-07 22:30:15 +0000942
Uwe Hermann01ce6012010-03-05 10:03:50 +0000943config X86EMU_DEBUG
944 bool "Output verbose x86emu debug messages"
945 default n
946 depends on PCI_OPTION_ROM_RUN_YABEL
947 help
948 This option enables additional x86emu related debug messages.
949
950 Note: This option will increase the size of the coreboot image.
951
952 If unsure, say N.
953
954config X86EMU_DEBUG_JMP
955 bool "Trace JMP/RETF"
956 default n
957 depends on X86EMU_DEBUG
958 help
959 Print information about JMP and RETF opcodes from x86emu.
960
961 Note: This option will increase the size of the coreboot image.
962
963 If unsure, say N.
964
965config X86EMU_DEBUG_TRACE
966 bool "Trace all opcodes"
967 default n
968 depends on X86EMU_DEBUG
969 help
970 Print _all_ opcodes that are executed by x86emu.
Stefan Reinauer14e22772010-04-27 06:56:47 +0000971
Uwe Hermann01ce6012010-03-05 10:03:50 +0000972 WARNING: This will produce a LOT of output and take a long time.
973
974 Note: This option will increase the size of the coreboot image.
975
976 If unsure, say N.
977
978config X86EMU_DEBUG_PNP
979 bool "Log Plug&Play accesses"
980 default n
981 depends on X86EMU_DEBUG
982 help
983 Print Plug And Play accesses made by option ROMs.
984
985 Note: This option will increase the size of the coreboot image.
986
987 If unsure, say N.
988
989config X86EMU_DEBUG_DISK
990 bool "Log Disk I/O"
991 default n
992 depends on X86EMU_DEBUG
993 help
994 Print Disk I/O related messages.
995
996 Note: This option will increase the size of the coreboot image.
997
998 If unsure, say N.
999
1000config X86EMU_DEBUG_PMM
1001 bool "Log PMM"
1002 default n
1003 depends on X86EMU_DEBUG
1004 help
1005 Print messages related to POST Memory Manager (PMM).
1006
1007 Note: This option will increase the size of the coreboot image.
1008
1009 If unsure, say N.
1010
1011
1012config X86EMU_DEBUG_VBE
1013 bool "Debug VESA BIOS Extensions"
1014 default n
1015 depends on X86EMU_DEBUG
1016 help
1017 Print messages related to VESA BIOS Extension (VBE) functions.
1018
1019 Note: This option will increase the size of the coreboot image.
1020
1021 If unsure, say N.
1022
1023config X86EMU_DEBUG_INT10
1024 bool "Redirect INT10 output to console"
1025 default n
1026 depends on X86EMU_DEBUG
1027 help
1028 Let INT10 (i.e. character output) calls print messages to debug output.
1029
1030 Note: This option will increase the size of the coreboot image.
1031
1032 If unsure, say N.
1033
1034config X86EMU_DEBUG_INTERRUPTS
1035 bool "Log intXX calls"
1036 default n
1037 depends on X86EMU_DEBUG
1038 help
1039 Print messages related to interrupt handling.
1040
1041 Note: This option will increase the size of the coreboot image.
1042
1043 If unsure, say N.
1044
1045config X86EMU_DEBUG_CHECK_VMEM_ACCESS
1046 bool "Log special memory accesses"
1047 default n
1048 depends on X86EMU_DEBUG
1049 help
1050 Print messages related to accesses to certain areas of the virtual
1051 memory (e.g. BDA (BIOS Data Area) or interrupt vectors)
1052
1053 Note: This option will increase the size of the coreboot image.
1054
1055 If unsure, say N.
1056
1057config X86EMU_DEBUG_MEM
1058 bool "Log all memory accesses"
1059 default n
1060 depends on X86EMU_DEBUG
1061 help
1062 Print memory accesses made by option ROM.
1063 Note: This also includes accesses to fetch instructions.
1064
1065 Note: This option will increase the size of the coreboot image.
1066
1067 If unsure, say N.
1068
1069config X86EMU_DEBUG_IO
1070 bool "Log IO accesses"
1071 default n
1072 depends on X86EMU_DEBUG
1073 help
1074 Print I/O accesses made by option ROM.
1075
1076 Note: This option will increase the size of the coreboot image.
1077
1078 If unsure, say N.
1079
Stefan Reinauerdfb098d2011-11-17 12:50:54 -08001080config DEBUG_TPM
1081 bool "Output verbose TPM debug messages"
1082 default n
1083 depends on TPM
1084 help
1085 This option enables additional TPM related debug messages.
1086
Stefan Reinauer1c56d9b2012-05-10 11:27:32 -07001087config DEBUG_SPI_FLASH
1088 bool "Output verbose SPI flash debug messages"
1089 default n
1090 depends on SPI_FLASH
1091 help
1092 This option enables additional SPI flash related debug messages.
1093
Stefan Reinauer8e073822012-04-04 00:07:22 +02001094if SOUTHBRIDGE_INTEL_BD82X6X && DEFAULT_CONSOLE_LOGLEVEL_8
1095# Only visible with the right southbridge and loglevel.
1096config DEBUG_INTEL_ME
1097 bool "Verbose logging for Intel Management Engine"
1098 default n
1099 help
1100 Enable verbose logging for Intel Management Engine driver that
1101 is present on Intel 6-series chipsets.
1102endif
1103
Stefan Reinauer5c503922010-03-13 22:07:15 +00001104config LLSHELL
1105 bool "Built-in low-level shell"
1106 default n
1107 help
1108 If enabled, you will have a low level shell to examine your machine.
1109 Put llshell() in your (romstage) code to start the shell.
Stefan Reinauer8677a232010-12-11 20:33:41 +00001110 See src/arch/x86/llshell/llshell.inc for details.
Stefan Reinauer5c503922010-03-13 22:07:15 +00001111
Rudolf Marek7f0e9302011-09-02 23:23:41 +02001112config TRACE
1113 bool "Trace function calls"
1114 default n
1115 help
1116 If enabled, every function will print information to console once
1117 the function is entered. The syntax is ~0xaaaabbbb(0xccccdddd)
1118 the 0xaaaabbbb is the actual function and 0xccccdddd is EIP
1119 of calling function. Please note some printk releated functions
1120 are omitted from trace to have good looking console dumps.
Uwe Hermann168b11b2009-10-07 16:15:40 +00001121endmenu
1122
Myles Watson8f74c582009-10-20 16:10:04 +00001123config LIFT_BSP_APIC_ID
1124 bool
1125 default n
Myles Watsond73c1b52009-10-26 15:14:07 +00001126
1127# These probably belong somewhere else, but they are needed somewhere.
1128config AP_CODE_IN_CAR
1129 bool
1130 default n
1131
Jonathan Kollasche5b75072010-10-07 23:02:06 +00001132config RAMINIT_SYSINFO
1133 bool
1134 default n
1135
Myles Watsond73c1b52009-10-26 15:14:07 +00001136config ENABLE_APIC_EXT_ID
1137 bool
1138 default n
Myles Watson2e672732009-11-12 16:38:03 +00001139
1140config WARNINGS_ARE_ERRORS
1141 bool
Stefan Reinauer6f57b512010-07-08 16:41:05 +00001142 default y
Patrick Georgi436f99b2009-11-27 16:55:13 +00001143
Peter Stuge51eafde2010-10-13 06:23:02 +00001144# The four POWER_BUTTON_DEFAULT_ENABLE, POWER_BUTTON_DEFAULT_DISABLE,
1145# POWER_BUTTON_FORCE_ENABLE and POWER_BUTTON_FORCE_DISABLE options are
1146# mutually exclusive. One of these options must be selected in the
1147# mainboard Kconfig if the chipset supports enabling and disabling of
1148# the power button. Chipset code uses the ENABLE_POWER_BUTTON option set
1149# in mainboard/Kconfig to know if the button should be enabled or not.
1150
1151config POWER_BUTTON_DEFAULT_ENABLE
1152 def_bool n
1153 help
1154 Select when the board has a power button which can optionally be
1155 disabled by the user.
1156
1157config POWER_BUTTON_DEFAULT_DISABLE
1158 def_bool n
1159 help
1160 Select when the board has a power button which can optionally be
1161 enabled by the user, e.g. when the board ships with a jumper over
1162 the power switch contacts.
1163
1164config POWER_BUTTON_FORCE_ENABLE
1165 def_bool n
1166 help
1167 Select when the board requires that the power button is always
1168 enabled.
1169
1170config POWER_BUTTON_FORCE_DISABLE
1171 def_bool n
1172 help
1173 Select when the board requires that the power button is always
1174 disabled, e.g. when it has been hardwired to ground.
1175
1176config POWER_BUTTON_IS_OPTIONAL
1177 bool
1178 default y if POWER_BUTTON_DEFAULT_ENABLE || POWER_BUTTON_DEFAULT_DISABLE
1179 default n if !(POWER_BUTTON_DEFAULT_ENABLE || POWER_BUTTON_DEFAULT_DISABLE)
1180 help
1181 Internal option that controls ENABLE_POWER_BUTTON visibility.
1182
Patrick Georgicc669262010-03-14 21:31:05 +00001183source src/Kconfig.deprecated_options
Stefan Reinauerb89a7612012-03-30 01:01:51 +02001184source src/vendorcode/Kconfig