Angel Pons | c74dae9 | 2020-04-02 23:48:16 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Uwe Hermann | b80dbf0 | 2007-04-22 19:08:13 +0000 | [diff] [blame] | 2 | |
| 3 | /* |
Martin Roth | 99f83bb | 2019-09-15 20:57:18 -0700 | [diff] [blame] | 4 | * Originally based on the Linux kernel (drivers/pci/pci.c). |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 5 | * PCI Bus Services, see include/linux/pci.h for further explanation. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 6 | */ |
| 7 | |
Furquan Shaikh | 76cedd2 | 2020-05-02 10:24:23 -0700 | [diff] [blame] | 8 | #include <acpi/acpi.h> |
Kyösti Mälkki | f1b58b7 | 2019-03-01 13:43:02 +0200 | [diff] [blame] | 9 | #include <device/pci_ops.h> |
Edward O'Callaghan | 6c99250 | 2014-06-20 21:19:06 +1000 | [diff] [blame] | 10 | #include <bootmode.h> |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 11 | #include <console/console.h> |
Furquan Shaikh | 871baf2 | 2020-03-12 17:51:24 -0700 | [diff] [blame] | 12 | #include <cpu/cpu.h> |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 13 | #include <stdlib.h> |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 14 | #include <string.h> |
Edward O'Callaghan | 6c99250 | 2014-06-20 21:19:06 +1000 | [diff] [blame] | 15 | #include <delay.h> |
Edward O'Callaghan | 6c99250 | 2014-06-20 21:19:06 +1000 | [diff] [blame] | 16 | #include <device/cardbus.h> |
Eric Biederman | 5899fd8 | 2003-04-24 06:25:08 +0000 | [diff] [blame] | 17 | #include <device/device.h> |
| 18 | #include <device/pci.h> |
| 19 | #include <device/pci_ids.h> |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 20 | #include <device/pcix.h> |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 21 | #include <device/pciexp.h> |
Edward O'Callaghan | 6c99250 | 2014-06-20 21:19:06 +1000 | [diff] [blame] | 22 | #include <device/hypertransport.h> |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 23 | #include <pc80/i8259.h> |
Philipp Deppenwiese | fea2429 | 2017-10-17 17:02:29 +0200 | [diff] [blame] | 24 | #include <security/vboot/vbnv.h> |
Martin Roth | 5dd4a2a | 2018-03-06 16:10:45 -0700 | [diff] [blame] | 25 | #include <timestamp.h> |
Johanna Schander | db7a3ae | 2019-07-24 10:14:26 +0200 | [diff] [blame] | 26 | #include <types.h> |
| 27 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 28 | u8 pci_moving_config8(struct device *dev, unsigned int reg) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 29 | { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 30 | u8 value, ones, zeroes; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 31 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 32 | value = pci_read_config8(dev, reg); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 33 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 34 | pci_write_config8(dev, reg, 0xff); |
| 35 | ones = pci_read_config8(dev, reg); |
| 36 | |
| 37 | pci_write_config8(dev, reg, 0x00); |
| 38 | zeroes = pci_read_config8(dev, reg); |
| 39 | |
| 40 | pci_write_config8(dev, reg, value); |
| 41 | |
| 42 | return ones ^ zeroes; |
| 43 | } |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 44 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 45 | u16 pci_moving_config16(struct device *dev, unsigned int reg) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 46 | { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 47 | u16 value, ones, zeroes; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 48 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 49 | value = pci_read_config16(dev, reg); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 50 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 51 | pci_write_config16(dev, reg, 0xffff); |
| 52 | ones = pci_read_config16(dev, reg); |
| 53 | |
| 54 | pci_write_config16(dev, reg, 0x0000); |
| 55 | zeroes = pci_read_config16(dev, reg); |
| 56 | |
| 57 | pci_write_config16(dev, reg, value); |
| 58 | |
| 59 | return ones ^ zeroes; |
| 60 | } |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 61 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 62 | u32 pci_moving_config32(struct device *dev, unsigned int reg) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 63 | { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 64 | u32 value, ones, zeroes; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 65 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 66 | value = pci_read_config32(dev, reg); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 67 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 68 | pci_write_config32(dev, reg, 0xffffffff); |
| 69 | ones = pci_read_config32(dev, reg); |
| 70 | |
| 71 | pci_write_config32(dev, reg, 0x00000000); |
| 72 | zeroes = pci_read_config32(dev, reg); |
| 73 | |
| 74 | pci_write_config32(dev, reg, value); |
| 75 | |
| 76 | return ones ^ zeroes; |
| 77 | } |
| 78 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 79 | /** |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 80 | * Given a device and register, read the size of the BAR for that register. |
| 81 | * |
| 82 | * @param dev Pointer to the device structure. |
| 83 | * @param index Address of the PCI configuration register. |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 84 | * @return TODO |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 85 | */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 86 | struct resource *pci_get_resource(struct device *dev, unsigned long index) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 87 | { |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 88 | struct resource *resource; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 89 | unsigned long value, attr; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 90 | resource_t moving, limit; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 91 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 92 | /* Initialize the resources to nothing. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 93 | resource = new_resource(dev, index); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 94 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 95 | /* Get the initial value. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 96 | value = pci_read_config32(dev, index); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 97 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 98 | /* See which bits move. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 99 | moving = pci_moving_config32(dev, index); |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 100 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 101 | /* Initialize attr to the bits that do not move. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 102 | attr = value & ~moving; |
| 103 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 104 | /* If it is a 64bit resource look at the high half as well. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 105 | if (((attr & PCI_BASE_ADDRESS_SPACE_IO) == 0) && |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 106 | ((attr & PCI_BASE_ADDRESS_MEM_LIMIT_MASK) == |
| 107 | PCI_BASE_ADDRESS_MEM_LIMIT_64)) { |
| 108 | /* Find the high bits that move. */ |
| 109 | moving |= |
| 110 | ((resource_t) pci_moving_config32(dev, index + 4)) << 32; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 111 | } |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 112 | |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 113 | /* Find the resource constraints. |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 114 | * Start by finding the bits that move. From there: |
| 115 | * - Size is the least significant bit of the bits that move. |
| 116 | * - Limit is all of the bits that move plus all of the lower bits. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 117 | * See PCI Spec 6.2.5.1. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 118 | */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 119 | limit = 0; |
| 120 | if (moving) { |
| 121 | resource->size = 1; |
| 122 | resource->align = resource->gran = 0; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 123 | while (!(moving & resource->size)) { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 124 | resource->size <<= 1; |
| 125 | resource->align += 1; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 126 | resource->gran += 1; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 127 | } |
| 128 | resource->limit = limit = moving | (resource->size - 1); |
Nico Huber | 8193b06 | 2015-10-21 15:43:41 +0200 | [diff] [blame] | 129 | |
| 130 | if (pci_base_address_is_memory_space(attr)) { |
| 131 | /* Page-align to allow individual mapping of devices. */ |
| 132 | if (resource->align < 12) |
| 133 | resource->align = 12; |
| 134 | } |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 135 | } |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 136 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 137 | /* |
| 138 | * Some broken hardware has read-only registers that do not |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 139 | * really size correctly. |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 140 | * |
| 141 | * Example: the Acer M7229 has BARs 1-4 normally read-only, |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 142 | * so BAR1 at offset 0x10 reads 0x1f1. If you size that register |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 143 | * by writing 0xffffffff to it, it will read back as 0x1f1 -- which |
| 144 | * is a violation of the spec. |
| 145 | * |
| 146 | * We catch this case and ignore it by observing which bits move. |
| 147 | * |
| 148 | * This also catches the common case of unimplemented registers |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 149 | * that always read back as 0. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 150 | */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 151 | if (moving == 0) { |
| 152 | if (value != 0) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 153 | printk(BIOS_DEBUG, "%s register %02lx(%08lx), " |
| 154 | "read-only ignoring it\n", |
| 155 | dev_path(dev), index, value); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 156 | } |
| 157 | resource->flags = 0; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 158 | } else if (attr & PCI_BASE_ADDRESS_SPACE_IO) { |
| 159 | /* An I/O mapped base address. */ |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 160 | resource->flags |= IORESOURCE_IO; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 161 | /* I don't want to deal with 32bit I/O resources. */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 162 | resource->limit = 0xffff; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 163 | } else { |
| 164 | /* A Memory mapped base address. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 165 | attr &= PCI_BASE_ADDRESS_MEM_ATTR_MASK; |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 166 | resource->flags |= IORESOURCE_MEM; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 167 | if (attr & PCI_BASE_ADDRESS_MEM_PREFETCH) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 168 | resource->flags |= IORESOURCE_PREFETCH; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 169 | attr &= PCI_BASE_ADDRESS_MEM_LIMIT_MASK; |
| 170 | if (attr == PCI_BASE_ADDRESS_MEM_LIMIT_32) { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 171 | /* 32bit limit. */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 172 | resource->limit = 0xffffffffUL; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 173 | } else if (attr == PCI_BASE_ADDRESS_MEM_LIMIT_1M) { |
| 174 | /* 1MB limit. */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 175 | resource->limit = 0x000fffffUL; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 176 | } else if (attr == PCI_BASE_ADDRESS_MEM_LIMIT_64) { |
| 177 | /* 64bit limit. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 178 | resource->limit = 0xffffffffffffffffULL; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 179 | resource->flags |= IORESOURCE_PCI64; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 180 | } else { |
| 181 | /* Invalid value. */ |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 182 | printk(BIOS_ERR, "Broken BAR with value %lx\n", attr); |
| 183 | printk(BIOS_ERR, " on dev %s at index %02lx\n", |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 184 | dev_path(dev), index); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 185 | resource->flags = 0; |
| 186 | } |
| 187 | } |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 188 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 189 | /* Don't let the limit exceed which bits can move. */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 190 | if (resource->limit > limit) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 191 | resource->limit = limit; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 192 | |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 193 | return resource; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 194 | } |
| 195 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 196 | /** |
| 197 | * Given a device and an index, read the size of the BAR for that register. |
| 198 | * |
| 199 | * @param dev Pointer to the device structure. |
| 200 | * @param index Address of the PCI configuration register. |
| 201 | */ |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 202 | static void pci_get_rom_resource(struct device *dev, unsigned long index) |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 203 | { |
| 204 | struct resource *resource; |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 205 | unsigned long value; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 206 | resource_t moving; |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 207 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 208 | /* Initialize the resources to nothing. */ |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 209 | resource = new_resource(dev, index); |
| 210 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 211 | /* Get the initial value. */ |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 212 | value = pci_read_config32(dev, index); |
| 213 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 214 | /* See which bits move. */ |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 215 | moving = pci_moving_config32(dev, index); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 216 | |
| 217 | /* Clear the Enable bit. */ |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 218 | moving = moving & ~PCI_ROM_ADDRESS_ENABLE; |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 219 | |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 220 | /* Find the resource constraints. |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 221 | * Start by finding the bits that move. From there: |
| 222 | * - Size is the least significant bit of the bits that move. |
| 223 | * - Limit is all of the bits that move plus all of the lower bits. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 224 | * See PCI Spec 6.2.5.1. |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 225 | */ |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 226 | if (moving) { |
| 227 | resource->size = 1; |
| 228 | resource->align = resource->gran = 0; |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 229 | while (!(moving & resource->size)) { |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 230 | resource->size <<= 1; |
| 231 | resource->align += 1; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 232 | resource->gran += 1; |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 233 | } |
Patrick Georgi | 16cdbb2 | 2009-04-21 20:14:31 +0000 | [diff] [blame] | 234 | resource->limit = moving | (resource->size - 1); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 235 | resource->flags |= IORESOURCE_MEM | IORESOURCE_READONLY; |
| 236 | } else { |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 237 | if (value != 0) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 238 | printk(BIOS_DEBUG, "%s register %02lx(%08lx), " |
| 239 | "read-only ignoring it\n", |
| 240 | dev_path(dev), index, value); |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 241 | } |
| 242 | resource->flags = 0; |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 243 | } |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 244 | compact_resources(dev); |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 245 | } |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 246 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 247 | /** |
Patrick Rudolph | 4e2f95b | 2018-05-16 14:56:22 +0200 | [diff] [blame] | 248 | * Given a device, read the size of the MSI-X table. |
| 249 | * |
| 250 | * @param dev Pointer to the device structure. |
| 251 | * @return MSI-X table size or 0 if not MSI-X capable device |
| 252 | */ |
| 253 | size_t pci_msix_table_size(struct device *dev) |
| 254 | { |
| 255 | const size_t pos = pci_find_capability(dev, PCI_CAP_ID_MSIX); |
| 256 | if (!pos) |
| 257 | return 0; |
| 258 | |
| 259 | const u16 control = pci_read_config16(dev, pos + PCI_MSIX_FLAGS); |
| 260 | return (control & PCI_MSIX_FLAGS_QSIZE) + 1; |
| 261 | } |
| 262 | |
| 263 | /** |
| 264 | * Given a device, return the table offset and bar the MSI-X tables resides in. |
| 265 | * |
| 266 | * @param dev Pointer to the device structure. |
| 267 | * @param offset Returned value gives the offset in bytes inside the PCI BAR. |
| 268 | * @param idx The returned value is the index of the PCI_BASE_ADDRESS register |
| 269 | * the MSI-X table is located in. |
| 270 | * @return Zero on success |
| 271 | */ |
| 272 | int pci_msix_table_bar(struct device *dev, u32 *offset, u8 *idx) |
| 273 | { |
| 274 | const size_t pos = pci_find_capability(dev, PCI_CAP_ID_MSIX); |
| 275 | if (!pos || !offset || !idx) |
| 276 | return 1; |
| 277 | |
| 278 | *offset = pci_read_config32(dev, pos + PCI_MSIX_TABLE); |
| 279 | *idx = (u8)(*offset & PCI_MSIX_PBA_BIR); |
| 280 | *offset &= PCI_MSIX_PBA_OFFSET; |
| 281 | |
| 282 | return 0; |
| 283 | } |
| 284 | |
| 285 | /** |
| 286 | * Given a device, return a msix_entry pointer or NULL if no table was found. |
| 287 | * |
| 288 | * @param dev Pointer to the device structure. |
| 289 | * |
| 290 | * @return NULL on error |
| 291 | */ |
| 292 | struct msix_entry *pci_msix_get_table(struct device *dev) |
| 293 | { |
| 294 | struct resource *res; |
| 295 | u32 offset; |
| 296 | u8 idx; |
| 297 | |
| 298 | if (pci_msix_table_bar(dev, &offset, &idx)) |
| 299 | return NULL; |
| 300 | |
| 301 | if (idx > 5) |
| 302 | return NULL; |
| 303 | |
| 304 | res = probe_resource(dev, idx * 4 + PCI_BASE_ADDRESS_0); |
| 305 | if (!res || !res->base || offset >= res->size) |
| 306 | return NULL; |
| 307 | |
| 308 | if ((res->flags & IORESOURCE_PCI64) && |
| 309 | (uintptr_t)res->base != res->base) |
| 310 | return NULL; |
| 311 | |
| 312 | return (struct msix_entry *)((uintptr_t)res->base + offset); |
| 313 | } |
| 314 | |
| 315 | /** |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 316 | * Read the base address registers for a given device. |
| 317 | * |
| 318 | * @param dev Pointer to the dev structure. |
| 319 | * @param howmany How many registers to read (6 for device, 2 for bridge). |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 320 | */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 321 | static void pci_read_bases(struct device *dev, unsigned int howmany) |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 322 | { |
| 323 | unsigned long index; |
| 324 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 325 | for (index = PCI_BASE_ADDRESS_0; |
| 326 | (index < PCI_BASE_ADDRESS_0 + (howmany << 2));) { |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 327 | struct resource *resource; |
| 328 | resource = pci_get_resource(dev, index); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 329 | index += (resource->flags & IORESOURCE_PCI64) ? 8 : 4; |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 330 | } |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 331 | |
| 332 | compact_resources(dev); |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 333 | } |
| 334 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 335 | static void pci_record_bridge_resource(struct device *dev, resource_t moving, |
Martin Roth | 38ddbfb | 2019-10-23 21:41:00 -0600 | [diff] [blame] | 336 | unsigned int index, unsigned long type) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 337 | { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 338 | struct resource *resource; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 339 | unsigned long gran; |
| 340 | resource_t step; |
| 341 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 342 | resource = NULL; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 343 | |
| 344 | if (!moving) |
| 345 | return; |
| 346 | |
| 347 | /* Initialize the constraints on the current bus. */ |
| 348 | resource = new_resource(dev, index); |
| 349 | resource->size = 0; |
| 350 | gran = 0; |
| 351 | step = 1; |
| 352 | while ((moving & step) == 0) { |
| 353 | gran += 1; |
| 354 | step <<= 1; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 355 | } |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 356 | resource->gran = gran; |
| 357 | resource->align = gran; |
| 358 | resource->limit = moving | (step - 1); |
| 359 | resource->flags = type | IORESOURCE_PCI_BRIDGE | |
| 360 | IORESOURCE_BRIDGE; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 361 | } |
| 362 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 363 | static void pci_bridge_read_bases(struct device *dev) |
| 364 | { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 365 | resource_t moving_base, moving_limit, moving; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 366 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 367 | /* See if the bridge I/O resources are implemented. */ |
| 368 | moving_base = ((u32) pci_moving_config8(dev, PCI_IO_BASE)) << 8; |
| 369 | moving_base |= |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 370 | ((u32) pci_moving_config16(dev, PCI_IO_BASE_UPPER16)) << 16; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 371 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 372 | moving_limit = ((u32) pci_moving_config8(dev, PCI_IO_LIMIT)) << 8; |
| 373 | moving_limit |= |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 374 | ((u32) pci_moving_config16(dev, PCI_IO_LIMIT_UPPER16)) << 16; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 375 | |
| 376 | moving = moving_base & moving_limit; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 377 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 378 | /* Initialize the I/O space constraints on the current bus. */ |
| 379 | pci_record_bridge_resource(dev, moving, PCI_IO_BASE, IORESOURCE_IO); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 380 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 381 | /* See if the bridge prefmem resources are implemented. */ |
| 382 | moving_base = |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 383 | ((resource_t) pci_moving_config16(dev, PCI_PREF_MEMORY_BASE)) << 16; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 384 | moving_base |= |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 385 | ((resource_t) pci_moving_config32(dev, PCI_PREF_BASE_UPPER32)) << 32; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 386 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 387 | moving_limit = |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 388 | ((resource_t) pci_moving_config16(dev, PCI_PREF_MEMORY_LIMIT)) << 16; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 389 | moving_limit |= |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 390 | ((resource_t) pci_moving_config32(dev, PCI_PREF_LIMIT_UPPER32)) << 32; |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 391 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 392 | moving = moving_base & moving_limit; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 393 | /* Initialize the prefetchable memory constraints on the current bus. */ |
| 394 | pci_record_bridge_resource(dev, moving, PCI_PREF_MEMORY_BASE, |
| 395 | IORESOURCE_MEM | IORESOURCE_PREFETCH); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 396 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 397 | /* See if the bridge mem resources are implemented. */ |
| 398 | moving_base = ((u32) pci_moving_config16(dev, PCI_MEMORY_BASE)) << 16; |
| 399 | moving_limit = ((u32) pci_moving_config16(dev, PCI_MEMORY_LIMIT)) << 16; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 400 | |
| 401 | moving = moving_base & moving_limit; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 402 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 403 | /* Initialize the memory resources on the current bus. */ |
| 404 | pci_record_bridge_resource(dev, moving, PCI_MEMORY_BASE, |
| 405 | IORESOURCE_MEM); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 406 | |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 407 | compact_resources(dev); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 408 | } |
| 409 | |
Eric Biederman | 5899fd8 | 2003-04-24 06:25:08 +0000 | [diff] [blame] | 410 | void pci_dev_read_resources(struct device *dev) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 411 | { |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 412 | pci_read_bases(dev, 6); |
| 413 | pci_get_rom_resource(dev, PCI_ROM_ADDRESS); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 414 | } |
| 415 | |
Eric Biederman | 5899fd8 | 2003-04-24 06:25:08 +0000 | [diff] [blame] | 416 | void pci_bus_read_resources(struct device *dev) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 417 | { |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 418 | pci_bridge_read_bases(dev); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 419 | pci_read_bases(dev, 2); |
| 420 | pci_get_rom_resource(dev, PCI_ROM_ADDRESS1); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 421 | } |
| 422 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 423 | void pci_domain_read_resources(struct device *dev) |
| 424 | { |
| 425 | struct resource *res; |
| 426 | |
| 427 | /* Initialize the system-wide I/O space constraints. */ |
| 428 | res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0)); |
| 429 | res->limit = 0xffffUL; |
| 430 | res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | |
| 431 | IORESOURCE_ASSIGNED; |
| 432 | |
| 433 | /* Initialize the system-wide memory resources constraints. */ |
| 434 | res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0)); |
Furquan Shaikh | 871baf2 | 2020-03-12 17:51:24 -0700 | [diff] [blame] | 435 | res->limit = (1ULL << cpu_phys_address_size()) - 1; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 436 | res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | |
| 437 | IORESOURCE_ASSIGNED; |
| 438 | } |
| 439 | |
Raul E Rangel | 5cb34e2 | 2020-05-04 16:41:22 -0600 | [diff] [blame] | 440 | void pci_domain_set_resources(struct device *dev) |
| 441 | { |
| 442 | assign_resources(dev->link_list); |
| 443 | } |
| 444 | |
Nico Huber | 730b261 | 2020-05-20 00:32:50 +0200 | [diff] [blame] | 445 | static void pci_store_resource(const struct device *const dev, |
| 446 | const struct resource *const resource) |
| 447 | { |
| 448 | unsigned long base_lo, base_hi; |
| 449 | |
| 450 | base_lo = resource->base & 0xffffffff; |
| 451 | base_hi = (resource->base >> 32) & 0xffffffff; |
| 452 | |
| 453 | /* |
| 454 | * Some chipsets allow us to set/clear the I/O bit |
| 455 | * (e.g. VIA 82C686A). So set it to be safe. |
| 456 | */ |
| 457 | if (resource->flags & IORESOURCE_IO) |
| 458 | base_lo |= PCI_BASE_ADDRESS_SPACE_IO; |
| 459 | |
| 460 | pci_write_config32(dev, resource->index, base_lo); |
| 461 | if (resource->flags & IORESOURCE_PCI64) |
| 462 | pci_write_config32(dev, resource->index + 4, base_hi); |
| 463 | } |
| 464 | |
| 465 | static void pci_store_bridge_resource(const struct device *const dev, |
| 466 | struct resource *const resource) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 467 | { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 468 | resource_t base, end; |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 469 | |
Nico Huber | 730b261 | 2020-05-20 00:32:50 +0200 | [diff] [blame] | 470 | /* |
| 471 | * PCI bridges have no enable bit. They are disabled if the base of |
| 472 | * the range is greater than the limit. If the size is zero, disable |
| 473 | * by setting the base = limit and end = limit - 2^gran. |
| 474 | */ |
| 475 | if (resource->size == 0) { |
| 476 | base = resource->limit; |
| 477 | end = resource->limit - (1 << resource->gran); |
| 478 | resource->base = base; |
| 479 | } else { |
| 480 | base = resource->base; |
| 481 | end = resource_end(resource); |
| 482 | } |
| 483 | |
| 484 | if (resource->index == PCI_IO_BASE) { |
| 485 | /* Set the I/O ranges. */ |
| 486 | pci_write_config8(dev, PCI_IO_BASE, base >> 8); |
| 487 | pci_write_config16(dev, PCI_IO_BASE_UPPER16, base >> 16); |
| 488 | pci_write_config8(dev, PCI_IO_LIMIT, end >> 8); |
| 489 | pci_write_config16(dev, PCI_IO_LIMIT_UPPER16, end >> 16); |
| 490 | } else if (resource->index == PCI_MEMORY_BASE) { |
| 491 | /* Set the memory range. */ |
| 492 | pci_write_config16(dev, PCI_MEMORY_BASE, base >> 16); |
| 493 | pci_write_config16(dev, PCI_MEMORY_LIMIT, end >> 16); |
| 494 | } else if (resource->index == PCI_PREF_MEMORY_BASE) { |
| 495 | /* Set the prefetchable memory range. */ |
| 496 | pci_write_config16(dev, PCI_PREF_MEMORY_BASE, base >> 16); |
| 497 | pci_write_config32(dev, PCI_PREF_BASE_UPPER32, base >> 32); |
| 498 | pci_write_config16(dev, PCI_PREF_MEMORY_LIMIT, end >> 16); |
| 499 | pci_write_config32(dev, PCI_PREF_LIMIT_UPPER32, end >> 32); |
| 500 | } else { |
| 501 | /* Don't let me think I stored the resource. */ |
| 502 | resource->flags &= ~IORESOURCE_STORED; |
| 503 | printk(BIOS_ERR, "ERROR: invalid resource->index %lx\n", resource->index); |
| 504 | } |
| 505 | } |
| 506 | |
| 507 | static void pci_set_resource(struct device *dev, struct resource *resource) |
| 508 | { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 509 | /* Make certain the resource has actually been assigned a value. */ |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 510 | if (!(resource->flags & IORESOURCE_ASSIGNED)) { |
Nico Huber | f531244 | 2020-05-20 01:02:18 +0200 | [diff] [blame] | 511 | if (resource->flags & IORESOURCE_BRIDGE) { |
| 512 | /* If a bridge resource has no value assigned, |
| 513 | we can treat it like an empty resource. */ |
| 514 | resource->size = 0; |
| 515 | } else { |
| 516 | printk(BIOS_ERR, "ERROR: %s %02lx %s size: 0x%010llx not " |
| 517 | "assigned\n", dev_path(dev), resource->index, |
| 518 | resource_type(resource), resource->size); |
| 519 | return; |
| 520 | } |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 521 | } |
| 522 | |
Myles Watson | eb81a5b | 2009-11-05 20:06:19 +0000 | [diff] [blame] | 523 | /* If this resource is fixed don't worry about it. */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 524 | if (resource->flags & IORESOURCE_FIXED) |
Myles Watson | eb81a5b | 2009-11-05 20:06:19 +0000 | [diff] [blame] | 525 | return; |
Myles Watson | eb81a5b | 2009-11-05 20:06:19 +0000 | [diff] [blame] | 526 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 527 | /* If I have already stored this resource don't worry about it. */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 528 | if (resource->flags & IORESOURCE_STORED) |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 529 | return; |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 530 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 531 | /* If the resource is subtractive don't worry about it. */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 532 | if (resource->flags & IORESOURCE_SUBTRACTIVE) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 533 | return; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 534 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 535 | /* Only handle PCI memory and I/O resources for now. */ |
| 536 | if (!(resource->flags & (IORESOURCE_MEM | IORESOURCE_IO))) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 537 | return; |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 538 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 539 | /* Enable the resources in the command register. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 540 | if (resource->size) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 541 | if (resource->flags & IORESOURCE_MEM) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 542 | dev->command |= PCI_COMMAND_MEMORY; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 543 | if (resource->flags & IORESOURCE_IO) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 544 | dev->command |= PCI_COMMAND_IO; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 545 | if (resource->flags & IORESOURCE_PCI_BRIDGE) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 546 | dev->command |= PCI_COMMAND_MASTER; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 547 | } |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 548 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 549 | /* Now store the resource. */ |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 550 | resource->flags |= IORESOURCE_STORED; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 551 | |
Nico Huber | 730b261 | 2020-05-20 00:32:50 +0200 | [diff] [blame] | 552 | if (resource->flags & IORESOURCE_PCI_BRIDGE) |
| 553 | pci_store_bridge_resource(dev, resource); |
| 554 | else |
| 555 | pci_store_resource(dev, resource); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 556 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 557 | report_resource_stored(dev, resource, ""); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 558 | } |
| 559 | |
Eric Biederman | 5899fd8 | 2003-04-24 06:25:08 +0000 | [diff] [blame] | 560 | void pci_dev_set_resources(struct device *dev) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 561 | { |
Myles Watson | c25cc11 | 2010-05-21 14:33:48 +0000 | [diff] [blame] | 562 | struct resource *res; |
Myles Watson | 894a347 | 2010-06-09 22:41:35 +0000 | [diff] [blame] | 563 | struct bus *bus; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 564 | u8 line; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 565 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 566 | for (res = dev->resource_list; res; res = res->next) |
Myles Watson | c25cc11 | 2010-05-21 14:33:48 +0000 | [diff] [blame] | 567 | pci_set_resource(dev, res); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 568 | |
Myles Watson | 894a347 | 2010-06-09 22:41:35 +0000 | [diff] [blame] | 569 | for (bus = dev->link_list; bus; bus = bus->next) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 570 | if (bus->children) |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 571 | assign_resources(bus); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 572 | } |
| 573 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 574 | /* Set a default latency timer. */ |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 575 | pci_write_config8(dev, PCI_LATENCY_TIMER, 0x40); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 576 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 577 | /* Set a default secondary latency timer. */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 578 | if ((dev->hdr_type & 0x7f) == PCI_HEADER_TYPE_BRIDGE) |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 579 | pci_write_config8(dev, PCI_SEC_LATENCY_TIMER, 0x40); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 580 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 581 | /* Zero the IRQ settings. */ |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 582 | line = pci_read_config8(dev, PCI_INTERRUPT_PIN); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 583 | if (line) |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 584 | pci_write_config8(dev, PCI_INTERRUPT_LINE, 0); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 585 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 586 | /* Set the cache line size, so far 64 bytes is good for everyone. */ |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 587 | pci_write_config8(dev, PCI_CACHE_LINE_SIZE, 64 >> 2); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 588 | } |
| 589 | |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 590 | void pci_dev_enable_resources(struct device *dev) |
| 591 | { |
Kyösti Mälkki | cac0231 | 2019-06-30 08:40:04 +0300 | [diff] [blame] | 592 | const struct pci_operations *ops = NULL; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 593 | u16 command; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 594 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 595 | /* Set the subsystem vendor and device ID for mainboard devices. */ |
Kyösti Mälkki | cac0231 | 2019-06-30 08:40:04 +0300 | [diff] [blame] | 596 | if (dev->ops) |
| 597 | ops = dev->ops->ops_pci; |
Eric Biederman | dbec2d4 | 2004-10-21 10:44:08 +0000 | [diff] [blame] | 598 | if (dev->on_mainboard && ops && ops->set_subsystem) { |
Duncan Laurie | 7e1c83e | 2013-08-09 07:55:10 -0700 | [diff] [blame] | 599 | if (CONFIG_SUBSYSTEM_VENDOR_ID) |
| 600 | dev->subsystem_vendor = CONFIG_SUBSYSTEM_VENDOR_ID; |
Rizwan Qureshi | fd89129 | 2017-04-26 21:00:37 +0530 | [diff] [blame] | 601 | else if (!dev->subsystem_vendor) |
| 602 | dev->subsystem_vendor = pci_read_config16(dev, |
| 603 | PCI_VENDOR_ID); |
Duncan Laurie | 7e1c83e | 2013-08-09 07:55:10 -0700 | [diff] [blame] | 604 | if (CONFIG_SUBSYSTEM_DEVICE_ID) |
| 605 | dev->subsystem_device = CONFIG_SUBSYSTEM_DEVICE_ID; |
Rizwan Qureshi | fd89129 | 2017-04-26 21:00:37 +0530 | [diff] [blame] | 606 | else if (!dev->subsystem_device) |
| 607 | dev->subsystem_device = pci_read_config16(dev, |
| 608 | PCI_DEVICE_ID); |
| 609 | |
Sven Schnelle | 9132102 | 2011-03-01 19:58:47 +0000 | [diff] [blame] | 610 | printk(BIOS_DEBUG, "%s subsystem <- %04x/%04x\n", |
| 611 | dev_path(dev), dev->subsystem_vendor, |
| 612 | dev->subsystem_device); |
| 613 | ops->set_subsystem(dev, dev->subsystem_vendor, |
| 614 | dev->subsystem_device); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 615 | } |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 616 | command = pci_read_config16(dev, PCI_COMMAND); |
| 617 | command |= dev->command; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 618 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 619 | /* v3 has |
| 620 | * command |= (PCI_COMMAND_PARITY + PCI_COMMAND_SERR); // Error check. |
| 621 | */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 622 | |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 623 | printk(BIOS_DEBUG, "%s cmd <- %02x\n", dev_path(dev), command); |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 624 | pci_write_config16(dev, PCI_COMMAND, command); |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 625 | } |
| 626 | |
| 627 | void pci_bus_enable_resources(struct device *dev) |
| 628 | { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 629 | u16 ctrl; |
| 630 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 631 | /* |
| 632 | * Enable I/O in command register if there is VGA card |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 633 | * connected with (even it does not claim I/O resource). |
| 634 | */ |
Myles Watson | 894a347 | 2010-06-09 22:41:35 +0000 | [diff] [blame] | 635 | if (dev->link_list->bridge_ctrl & PCI_BRIDGE_CTL_VGA) |
Li-Ta Lo | 515f6c7 | 2005-01-11 22:48:54 +0000 | [diff] [blame] | 636 | dev->command |= PCI_COMMAND_IO; |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 637 | ctrl = pci_read_config16(dev, PCI_BRIDGE_CONTROL); |
Myles Watson | 894a347 | 2010-06-09 22:41:35 +0000 | [diff] [blame] | 638 | ctrl |= dev->link_list->bridge_ctrl; |
Kyösti Mälkki | 382e216 | 2019-09-21 16:19:32 +0300 | [diff] [blame] | 639 | ctrl |= (PCI_BRIDGE_CTL_PARITY | PCI_BRIDGE_CTL_SERR); /* Error check. */ |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 640 | printk(BIOS_DEBUG, "%s bridge ctrl <- %04x\n", dev_path(dev), ctrl); |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 641 | pci_write_config16(dev, PCI_BRIDGE_CONTROL, ctrl); |
| 642 | |
| 643 | pci_dev_enable_resources(dev); |
| 644 | } |
| 645 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 646 | void pci_bus_reset(struct bus *bus) |
| 647 | { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 648 | u16 ctl; |
| 649 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 650 | ctl = pci_read_config16(bus->dev, PCI_BRIDGE_CONTROL); |
| 651 | ctl |= PCI_BRIDGE_CTL_BUS_RESET; |
| 652 | pci_write_config16(bus->dev, PCI_BRIDGE_CONTROL, ctl); |
| 653 | mdelay(10); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 654 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 655 | ctl &= ~PCI_BRIDGE_CTL_BUS_RESET; |
| 656 | pci_write_config16(bus->dev, PCI_BRIDGE_CONTROL, ctl); |
| 657 | delay(1); |
| 658 | } |
| 659 | |
Elyes HAOUAS | 88030b7 | 2018-09-20 17:26:10 +0200 | [diff] [blame] | 660 | void pci_dev_set_subsystem(struct device *dev, unsigned int vendor, |
| 661 | unsigned int device) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 662 | { |
Subrata Banik | 9514d47 | 2019-03-20 14:56:27 +0530 | [diff] [blame] | 663 | uint8_t offset; |
| 664 | |
| 665 | /* Header type */ |
| 666 | switch (dev->hdr_type & 0x7f) { |
| 667 | case PCI_HEADER_TYPE_NORMAL: |
| 668 | offset = PCI_SUBSYSTEM_VENDOR_ID; |
| 669 | break; |
| 670 | case PCI_HEADER_TYPE_BRIDGE: |
| 671 | offset = pci_find_capability(dev, PCI_CAP_ID_SSVID); |
| 672 | if (!offset) |
| 673 | return; |
| 674 | offset += 4; /* Vendor ID at offset 4 */ |
| 675 | break; |
| 676 | case PCI_HEADER_TYPE_CARDBUS: |
| 677 | offset = PCI_CB_SUBSYSTEM_VENDOR_ID; |
| 678 | break; |
| 679 | default: |
| 680 | return; |
| 681 | } |
| 682 | |
Subrata Banik | 4a0f071 | 2019-03-20 14:29:47 +0530 | [diff] [blame] | 683 | if (!vendor || !device) { |
Subrata Banik | 9514d47 | 2019-03-20 14:56:27 +0530 | [diff] [blame] | 684 | pci_write_config32(dev, offset, |
Subrata Banik | 4a0f071 | 2019-03-20 14:29:47 +0530 | [diff] [blame] | 685 | pci_read_config32(dev, PCI_VENDOR_ID)); |
| 686 | } else { |
Subrata Banik | 9514d47 | 2019-03-20 14:56:27 +0530 | [diff] [blame] | 687 | pci_write_config32(dev, offset, |
Subrata Banik | 4a0f071 | 2019-03-20 14:29:47 +0530 | [diff] [blame] | 688 | ((device & 0xffff) << 16) | (vendor & 0xffff)); |
| 689 | } |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 690 | } |
| 691 | |
Frans Hendriks | b71181a | 2019-10-04 14:06:33 +0200 | [diff] [blame] | 692 | static int should_run_oprom(struct device *dev, struct rom_header *rom) |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 693 | { |
| 694 | static int should_run = -1; |
| 695 | |
Frans Hendriks | b71181a | 2019-10-04 14:06:33 +0200 | [diff] [blame] | 696 | if (CONFIG(VENDORCODE_ELTAN_VBOOT)) |
| 697 | if (rom != NULL) |
| 698 | if (!verified_boot_should_run_oprom(rom)) |
| 699 | return 0; |
| 700 | |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 701 | if (should_run >= 0) |
| 702 | return should_run; |
| 703 | |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 704 | if (CONFIG(ALWAYS_RUN_OPROM)) { |
Aaron Durbin | 1051025 | 2018-01-30 10:04:02 -0700 | [diff] [blame] | 705 | should_run = 1; |
| 706 | return should_run; |
| 707 | } |
| 708 | |
Kyösti Mälkki | 9ab1c10 | 2013-12-22 00:22:49 +0200 | [diff] [blame] | 709 | /* Don't run VGA option ROMs, unless we have to print |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 710 | * something on the screen before the kernel is loaded. |
| 711 | */ |
Furquan Shaikh | 0325dc6 | 2016-07-25 13:02:36 -0700 | [diff] [blame] | 712 | should_run = display_init_required(); |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 713 | |
Kyösti Mälkki | 9ab1c10 | 2013-12-22 00:22:49 +0200 | [diff] [blame] | 714 | if (!should_run) |
| 715 | printk(BIOS_DEBUG, "Not running VGA Option ROM\n"); |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 716 | return should_run; |
| 717 | } |
| 718 | |
| 719 | static int should_load_oprom(struct device *dev) |
| 720 | { |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 721 | /* If S3_VGA_ROM_RUN is disabled, skip running VGA option |
| 722 | * ROMs when coming out of an S3 resume. |
| 723 | */ |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 724 | if (!CONFIG(S3_VGA_ROM_RUN) && acpi_is_wakeup_s3() && |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 725 | ((dev->class >> 8) == PCI_CLASS_DISPLAY_VGA)) |
| 726 | return 0; |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 727 | if (CONFIG(ALWAYS_LOAD_OPROM)) |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 728 | return 1; |
Frans Hendriks | b71181a | 2019-10-04 14:06:33 +0200 | [diff] [blame] | 729 | if (should_run_oprom(dev, NULL)) |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 730 | return 1; |
| 731 | |
| 732 | return 0; |
| 733 | } |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 734 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 735 | /** Default handler: only runs the relevant PCI BIOS. */ |
Li-Ta Lo | 883b879 | 2005-01-10 23:16:22 +0000 | [diff] [blame] | 736 | void pci_dev_init(struct device *dev) |
| 737 | { |
| 738 | struct rom_header *rom, *ram; |
| 739 | |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 740 | if (!CONFIG(VGA_ROM_RUN)) |
Aaron Durbin | fbed9a5 | 2018-01-30 09:58:51 -0700 | [diff] [blame] | 741 | return; |
| 742 | |
Vladimir Serbinenko | b32816e | 2013-12-20 17:47:19 +0100 | [diff] [blame] | 743 | /* Only execute VGA ROMs. */ |
| 744 | if (((dev->class >> 8) != PCI_CLASS_DISPLAY_VGA)) |
Myles Watson | 17aeeca | 2009-10-07 18:41:08 +0000 | [diff] [blame] | 745 | return; |
Roman Kononov | 778a42b | 2007-04-06 18:34:39 +0000 | [diff] [blame] | 746 | |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 747 | if (!should_load_oprom(dev)) |
Stefan Reinauer | 74a0efe | 2012-03-30 17:10:49 -0700 | [diff] [blame] | 748 | return; |
Martin Roth | 5dd4a2a | 2018-03-06 16:10:45 -0700 | [diff] [blame] | 749 | timestamp_add_now(TS_OPROM_INITIALIZE); |
Aaron Durbin | ce872cb | 2013-03-28 15:59:19 -0500 | [diff] [blame] | 750 | |
| 751 | rom = pci_rom_probe(dev); |
| 752 | if (rom == NULL) |
| 753 | return; |
| 754 | |
| 755 | ram = pci_rom_load(dev, rom); |
| 756 | if (ram == NULL) |
| 757 | return; |
Martin Roth | 5dd4a2a | 2018-03-06 16:10:45 -0700 | [diff] [blame] | 758 | timestamp_add_now(TS_OPROM_COPY_END); |
Aaron Durbin | ce872cb | 2013-03-28 15:59:19 -0500 | [diff] [blame] | 759 | |
Frans Hendriks | b71181a | 2019-10-04 14:06:33 +0200 | [diff] [blame] | 760 | if (!should_run_oprom(dev, rom)) |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 761 | return; |
| 762 | |
Stefan Reinauer | d98cf5b | 2008-08-01 11:25:41 +0000 | [diff] [blame] | 763 | run_bios(dev, (unsigned long)ram); |
Johanna Schander | db7a3ae | 2019-07-24 10:14:26 +0200 | [diff] [blame] | 764 | |
Kyösti Mälkki | ab56b3b | 2013-11-28 16:44:51 +0200 | [diff] [blame] | 765 | gfx_set_init_done(1); |
| 766 | printk(BIOS_DEBUG, "VGA Option ROM was run\n"); |
Martin Roth | 5dd4a2a | 2018-03-06 16:10:45 -0700 | [diff] [blame] | 767 | timestamp_add_now(TS_OPROM_END); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 768 | } |
Li-Ta Lo | 883b879 | 2005-01-10 23:16:22 +0000 | [diff] [blame] | 769 | |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 770 | /** Default device operation for PCI devices */ |
Subrata Banik | ffc790b | 2017-12-11 10:29:49 +0530 | [diff] [blame] | 771 | struct pci_operations pci_dev_ops_pci = { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 772 | .set_subsystem = pci_dev_set_subsystem, |
| 773 | }; |
| 774 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 775 | struct device_operations default_pci_ops_dev = { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 776 | .read_resources = pci_dev_read_resources, |
| 777 | .set_resources = pci_dev_set_resources, |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 778 | .enable_resources = pci_dev_enable_resources, |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 779 | #if CONFIG(HAVE_ACPI_TABLES) |
Patrick Rudolph | a5c2ac6 | 2016-03-31 20:04:23 +0200 | [diff] [blame] | 780 | .write_acpi_tables = pci_rom_write_acpi_tables, |
Nico Huber | 68680dd | 2020-03-31 17:34:52 +0200 | [diff] [blame] | 781 | .acpi_fill_ssdt = pci_rom_ssdt, |
Patrick Rudolph | a5c2ac6 | 2016-03-31 20:04:23 +0200 | [diff] [blame] | 782 | #endif |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 783 | .init = pci_dev_init, |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 784 | .ops_pci = &pci_dev_ops_pci, |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 785 | }; |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 786 | |
| 787 | /** Default device operations for PCI bridges */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 788 | struct device_operations default_pci_ops_bus = { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 789 | .read_resources = pci_bus_read_resources, |
| 790 | .set_resources = pci_dev_set_resources, |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 791 | .enable_resources = pci_bus_enable_resources, |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 792 | .scan_bus = pci_scan_bridge, |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 793 | .reset_bus = pci_bus_reset, |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 794 | }; |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 795 | |
Tim Wawrzynczak | dbcf7b1 | 2020-05-13 16:15:08 -0600 | [diff] [blame] | 796 | /** Default device operations for PCI devices marked 'hidden' */ |
| 797 | static struct device_operations default_hidden_pci_ops_dev = { |
| 798 | .read_resources = noop_read_resources, |
| 799 | .set_resources = noop_set_resources, |
| 800 | .scan_bus = scan_static_bus, |
| 801 | }; |
| 802 | |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 803 | /** |
Nico Huber | 061b905 | 2019-09-21 15:58:23 +0200 | [diff] [blame] | 804 | * Check for compatibility to route legacy VGA cycles through a bridge. |
| 805 | * |
| 806 | * Originally, when decoding i/o ports for legacy VGA cycles, bridges |
| 807 | * should only consider the 10 least significant bits of the port address. |
| 808 | * This means all VGA registers were aliased every 1024 ports! |
| 809 | * e.g. 0x3b0 was also decoded as 0x7b0, 0xbb0 etc. |
| 810 | * |
| 811 | * To avoid this mess, a bridge control bit (VGA16) was introduced in |
| 812 | * 2003 to enable decoding of 16-bit port addresses. As we don't want |
| 813 | * to make this any more complex for now, we use this bit if possible |
| 814 | * and only warn if it's not supported (in set_vga_bridge_bits()). |
| 815 | */ |
| 816 | static void pci_bridge_vga_compat(struct bus *const bus) |
| 817 | { |
| 818 | uint16_t bridge_ctrl; |
| 819 | |
| 820 | bridge_ctrl = pci_read_config16(bus->dev, PCI_BRIDGE_CONTROL); |
| 821 | |
| 822 | /* Ensure VGA decoding is disabled during probing (it should |
| 823 | be by default, but we run blobs nowadays) */ |
| 824 | bridge_ctrl &= ~PCI_BRIDGE_CTL_VGA; |
| 825 | pci_write_config16(bus->dev, PCI_BRIDGE_CONTROL, bridge_ctrl); |
| 826 | |
| 827 | /* If the upstream bridge doesn't support VGA16, we don't have to check */ |
| 828 | bus->no_vga16 |= bus->dev->bus->no_vga16; |
| 829 | if (bus->no_vga16) |
| 830 | return; |
| 831 | |
| 832 | /* Test if we can enable 16-bit decoding */ |
| 833 | bridge_ctrl |= PCI_BRIDGE_CTL_VGA16; |
| 834 | pci_write_config16(bus->dev, PCI_BRIDGE_CONTROL, bridge_ctrl); |
| 835 | bridge_ctrl = pci_read_config16(bus->dev, PCI_BRIDGE_CONTROL); |
| 836 | |
| 837 | bus->no_vga16 = !(bridge_ctrl & PCI_BRIDGE_CTL_VGA16); |
| 838 | } |
| 839 | |
| 840 | /** |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 841 | * Detect the type of downstream bridge. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 842 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 843 | * This function is a heuristic to detect which type of bus is downstream |
| 844 | * of a PCI-to-PCI bridge. This functions by looking for various capability |
| 845 | * blocks to figure out the type of downstream bridge. PCI-X, PCI-E, and |
| 846 | * Hypertransport all seem to have appropriate capabilities. |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 847 | * |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 848 | * When only a PCI-Express capability is found the type is examined to see |
| 849 | * which type of bridge we have. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 850 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 851 | * @param dev Pointer to the device structure of the bridge. |
| 852 | * @return Appropriate bridge operations. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 853 | */ |
Aaron Durbin | c30d913 | 2017-08-07 16:55:43 -0600 | [diff] [blame] | 854 | static struct device_operations *get_pci_bridge_ops(struct device *dev) |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 855 | { |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 856 | #if CONFIG(PCIX_PLUGIN_SUPPORT) |
Ronald G. Minnich | 78a1667 | 2012-11-29 16:28:21 -0800 | [diff] [blame] | 857 | unsigned int pcixpos; |
| 858 | pcixpos = pci_find_capability(dev, PCI_CAP_ID_PCIX); |
| 859 | if (pcixpos) { |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 860 | printk(BIOS_DEBUG, "%s subordinate bus PCI-X\n", dev_path(dev)); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 861 | return &default_pcix_ops_bus; |
| 862 | } |
| 863 | #endif |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 864 | #if CONFIG(HYPERTRANSPORT_PLUGIN_SUPPORT) |
Ronald G. Minnich | 78a1667 | 2012-11-29 16:28:21 -0800 | [diff] [blame] | 865 | unsigned int htpos = 0; |
| 866 | while ((htpos = pci_find_next_capability(dev, PCI_CAP_ID_HT, htpos))) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 867 | u16 flags; |
Ronald G. Minnich | 78a1667 | 2012-11-29 16:28:21 -0800 | [diff] [blame] | 868 | flags = pci_read_config16(dev, htpos + PCI_CAP_FLAGS); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 869 | if ((flags >> 13) == 1) { |
| 870 | /* Host or Secondary Interface */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 871 | printk(BIOS_DEBUG, "%s subordinate bus HT\n", |
| 872 | dev_path(dev)); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 873 | return &default_ht_ops_bus; |
| 874 | } |
| 875 | } |
| 876 | #endif |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 877 | #if CONFIG(PCIEXP_PLUGIN_SUPPORT) |
Ronald G. Minnich | 78a1667 | 2012-11-29 16:28:21 -0800 | [diff] [blame] | 878 | unsigned int pciexpos; |
| 879 | pciexpos = pci_find_capability(dev, PCI_CAP_ID_PCIE); |
| 880 | if (pciexpos) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 881 | u16 flags; |
Ronald G. Minnich | 78a1667 | 2012-11-29 16:28:21 -0800 | [diff] [blame] | 882 | flags = pci_read_config16(dev, pciexpos + PCI_EXP_FLAGS); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 883 | switch ((flags & PCI_EXP_FLAGS_TYPE) >> 4) { |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 884 | case PCI_EXP_TYPE_ROOT_PORT: |
| 885 | case PCI_EXP_TYPE_UPSTREAM: |
| 886 | case PCI_EXP_TYPE_DOWNSTREAM: |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 887 | printk(BIOS_DEBUG, "%s subordinate bus PCI Express\n", |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 888 | dev_path(dev)); |
Jeremy Soller | cf2ac54 | 2019-10-09 21:40:36 -0600 | [diff] [blame] | 889 | #if CONFIG(PCIEXP_HOTPLUG) |
| 890 | u16 sltcap; |
| 891 | sltcap = pci_read_config16(dev, pciexpos + PCI_EXP_SLTCAP); |
| 892 | if (sltcap & PCI_EXP_SLTCAP_HPC) { |
| 893 | printk(BIOS_DEBUG, "%s hot-plug capable\n", dev_path(dev)); |
| 894 | return &default_pciexp_hotplug_ops_bus; |
| 895 | } |
| 896 | #endif /* CONFIG(PCIEXP_HOTPLUG) */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 897 | return &default_pciexp_ops_bus; |
| 898 | case PCI_EXP_TYPE_PCI_BRIDGE: |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 899 | printk(BIOS_DEBUG, "%s subordinate PCI\n", |
| 900 | dev_path(dev)); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 901 | return &default_pci_ops_bus; |
| 902 | default: |
| 903 | break; |
| 904 | } |
| 905 | } |
| 906 | #endif |
| 907 | return &default_pci_ops_bus; |
| 908 | } |
| 909 | |
| 910 | /** |
Vadim Bendebury | 8049fc9 | 2012-04-24 12:53:19 -0700 | [diff] [blame] | 911 | * Check if a device id matches a PCI driver entry. |
| 912 | * |
| 913 | * The driver entry can either point at a zero terminated array of acceptable |
| 914 | * device IDs, or include a single device ID. |
| 915 | * |
Martin Roth | 98b698c | 2015-01-06 21:02:52 -0700 | [diff] [blame] | 916 | * @param driver pointer to the PCI driver entry being checked |
| 917 | * @param device_id PCI device ID of the device being matched |
Vadim Bendebury | 8049fc9 | 2012-04-24 12:53:19 -0700 | [diff] [blame] | 918 | */ |
| 919 | static int device_id_match(struct pci_driver *driver, unsigned short device_id) |
| 920 | { |
| 921 | if (driver->devices) { |
| 922 | unsigned short check_id; |
| 923 | const unsigned short *device_list = driver->devices; |
| 924 | while ((check_id = *device_list++) != 0) |
| 925 | if (check_id == device_id) |
| 926 | return 1; |
| 927 | } |
| 928 | |
| 929 | return (driver->device == device_id); |
| 930 | } |
| 931 | |
| 932 | /** |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 933 | * Set up PCI device operation. |
| 934 | * |
| 935 | * Check if it already has a driver. If not, use find_device_operations(), |
| 936 | * or set to a default based on type. |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 937 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 938 | * @param dev Pointer to the device whose pci_ops you want to set. |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 939 | * @see pci_drivers |
| 940 | */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 941 | static void set_pci_ops(struct device *dev) |
| 942 | { |
| 943 | struct pci_driver *driver; |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 944 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 945 | if (dev->ops) |
| 946 | return; |
| 947 | |
| 948 | /* |
| 949 | * Look through the list of setup drivers and find one for |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 950 | * this PCI device. |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 951 | */ |
Aaron Durbin | 0375815 | 2015-09-03 17:23:08 -0500 | [diff] [blame] | 952 | for (driver = &_pci_drivers[0]; driver != &_epci_drivers[0]; driver++) { |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 953 | if ((driver->vendor == dev->vendor) && |
Vadim Bendebury | 8049fc9 | 2012-04-24 12:53:19 -0700 | [diff] [blame] | 954 | device_id_match(driver, dev->device)) { |
Uwe Hermann | 312673c | 2009-10-27 21:49:33 +0000 | [diff] [blame] | 955 | dev->ops = (struct device_operations *)driver->ops; |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 956 | printk(BIOS_SPEW, "%s [%04x/%04x] %sops\n", |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 957 | dev_path(dev), driver->vendor, driver->device, |
| 958 | (driver->ops->scan_bus ? "bus " : "")); |
Eric Biederman | 5899fd8 | 2003-04-24 06:25:08 +0000 | [diff] [blame] | 959 | return; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 960 | } |
| 961 | } |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 962 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 963 | /* If I don't have a specific driver use the default operations. */ |
| 964 | switch (dev->hdr_type & 0x7f) { /* Header type */ |
| 965 | case PCI_HEADER_TYPE_NORMAL: |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 966 | if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) |
| 967 | goto bad; |
| 968 | dev->ops = &default_pci_ops_dev; |
| 969 | break; |
| 970 | case PCI_HEADER_TYPE_BRIDGE: |
| 971 | if ((dev->class >> 8) != PCI_CLASS_BRIDGE_PCI) |
| 972 | goto bad; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 973 | dev->ops = get_pci_bridge_ops(dev); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 974 | break; |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 975 | #if CONFIG(CARDBUS_PLUGIN_SUPPORT) |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 976 | case PCI_HEADER_TYPE_CARDBUS: |
| 977 | dev->ops = &default_cardbus_ops_bus; |
| 978 | break; |
| 979 | #endif |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 980 | default: |
| 981 | bad: |
Li-Ta Lo | 69c5a90 | 2004-04-29 20:08:54 +0000 | [diff] [blame] | 982 | if (dev->enabled) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 983 | printk(BIOS_ERR, "%s [%04x/%04x/%06x] has unknown " |
| 984 | "header type %02x, ignoring.\n", dev_path(dev), |
| 985 | dev->vendor, dev->device, |
| 986 | dev->class >> 8, dev->hdr_type); |
Eric Biederman | 83b991a | 2003-10-11 06:20:25 +0000 | [diff] [blame] | 987 | } |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 988 | } |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 989 | } |
| 990 | |
| 991 | /** |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 992 | * See if we have already allocated a device structure for a given devfn. |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 993 | * |
Kyösti Mälkki | 8712aa1 | 2019-01-09 11:31:25 +0200 | [diff] [blame] | 994 | * Given a PCI bus structure and a devfn number, find the device structure |
| 995 | * corresponding to the devfn, if present. Then move the device structure |
| 996 | * as the last child on the bus. |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 997 | * |
Kyösti Mälkki | 8712aa1 | 2019-01-09 11:31:25 +0200 | [diff] [blame] | 998 | * @param bus Pointer to the bus structure. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 999 | * @param devfn A device/function number. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1000 | * @return Pointer to the device structure found or NULL if we have not |
Li-Ta Lo | 3a81285 | 2004-12-03 22:39:34 +0000 | [diff] [blame] | 1001 | * allocated a device for this devfn yet. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1002 | */ |
Kyösti Mälkki | 8712aa1 | 2019-01-09 11:31:25 +0200 | [diff] [blame] | 1003 | static struct device *pci_scan_get_dev(struct bus *bus, unsigned int devfn) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1004 | { |
Kyösti Mälkki | 8712aa1 | 2019-01-09 11:31:25 +0200 | [diff] [blame] | 1005 | struct device *dev, **prev; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1006 | |
Kyösti Mälkki | 8712aa1 | 2019-01-09 11:31:25 +0200 | [diff] [blame] | 1007 | prev = &bus->children; |
| 1008 | for (dev = bus->children; dev; dev = dev->sibling) { |
Duncan Laurie | bf69622 | 2020-10-18 15:10:00 -0700 | [diff] [blame^] | 1009 | if (dev->path.type == DEVICE_PATH_PCI && dev->path.pci.devfn == devfn) { |
| 1010 | /* Unlink from the list. */ |
| 1011 | *prev = dev->sibling; |
| 1012 | dev->sibling = NULL; |
| 1013 | break; |
Eric Biederman | ad1b35a | 2003-10-14 02:36:51 +0000 | [diff] [blame] | 1014 | } |
Kyösti Mälkki | 8712aa1 | 2019-01-09 11:31:25 +0200 | [diff] [blame] | 1015 | prev = &dev->sibling; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1016 | } |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1017 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1018 | /* |
| 1019 | * Just like alloc_dev() add the device to the list of devices on the |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1020 | * bus. When the list of devices was formed we removed all of the |
| 1021 | * parents children, and now we are interleaving static and dynamic |
| 1022 | * devices in order on the bus. |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 1023 | */ |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1024 | if (dev) { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1025 | struct device *child; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1026 | |
Kyösti Mälkki | 8712aa1 | 2019-01-09 11:31:25 +0200 | [diff] [blame] | 1027 | /* Find the last child on the bus. */ |
| 1028 | for (child = bus->children; child && child->sibling;) |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1029 | child = child->sibling; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1030 | |
Kyösti Mälkki | 8712aa1 | 2019-01-09 11:31:25 +0200 | [diff] [blame] | 1031 | /* Place the device as last on the bus. */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1032 | if (child) |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1033 | child->sibling = dev; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1034 | else |
Kyösti Mälkki | 8712aa1 | 2019-01-09 11:31:25 +0200 | [diff] [blame] | 1035 | bus->children = dev; |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1036 | } |
| 1037 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1038 | return dev; |
| 1039 | } |
| 1040 | |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1041 | /** |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 1042 | * Scan a PCI bus. |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 1043 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1044 | * Determine the existence of a given PCI device. Allocate a new struct device |
| 1045 | * if dev==NULL was passed in and the device exists in hardware. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1046 | * |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 1047 | * @param dev Pointer to the dev structure. |
| 1048 | * @param bus Pointer to the bus structure. |
| 1049 | * @param devfn A device/function number to look at. |
| 1050 | * @return The device structure for the device (if found), NULL otherwise. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1051 | */ |
Aaron Durbin | c30d913 | 2017-08-07 16:55:43 -0600 | [diff] [blame] | 1052 | struct device *pci_probe_dev(struct device *dev, struct bus *bus, |
| 1053 | unsigned int devfn) |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1054 | { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1055 | u32 id, class; |
| 1056 | u8 hdr_type; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1057 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1058 | /* Detect if a device is present. */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1059 | if (!dev) { |
| 1060 | struct device dummy; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1061 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1062 | dummy.bus = bus; |
| 1063 | dummy.path.type = DEVICE_PATH_PCI; |
Stefan Reinauer | 2b34db8 | 2009-02-28 20:10:20 +0000 | [diff] [blame] | 1064 | dummy.path.pci.devfn = devfn; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1065 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1066 | id = pci_read_config32(&dummy, PCI_VENDOR_ID); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1067 | /* |
| 1068 | * Have we found something? Some broken boards return 0 if a |
| 1069 | * slot is empty, but the expected answer is 0xffffffff. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1070 | */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1071 | if (id == 0xffffffff) |
Stefan Reinauer | 7355c75 | 2010-04-02 16:30:25 +0000 | [diff] [blame] | 1072 | return NULL; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1073 | |
Stefan Reinauer | 7355c75 | 2010-04-02 16:30:25 +0000 | [diff] [blame] | 1074 | if ((id == 0x00000000) || (id == 0x0000ffff) || |
| 1075 | (id == 0xffff0000)) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1076 | printk(BIOS_SPEW, "%s, bad id 0x%x\n", |
| 1077 | dev_path(&dummy), id); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1078 | return NULL; |
| 1079 | } |
| 1080 | dev = alloc_dev(bus, &dummy.path); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1081 | } else { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1082 | /* |
| 1083 | * Enable/disable the device. Once we have found the device- |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1084 | * specific operations this operations we will disable the |
| 1085 | * device with those as well. |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1086 | * |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1087 | * This is geared toward devices that have subfunctions |
| 1088 | * that do not show up by default. |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1089 | * |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1090 | * If a device is a stuff option on the motherboard |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1091 | * it may be absent and enable_dev() must cope. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1092 | */ |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1093 | /* Run the magic enable sequence for the device. */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1094 | if (dev->chip_ops && dev->chip_ops->enable_dev) |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1095 | dev->chip_ops->enable_dev(dev); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1096 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1097 | /* Now read the vendor and device ID. */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1098 | id = pci_read_config32(dev, PCI_VENDOR_ID); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1099 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1100 | /* |
| 1101 | * If the device does not have a PCI ID disable it. Possibly |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1102 | * this is because we have already disabled the device. But |
| 1103 | * this also handles optional devices that may not always |
| 1104 | * show up. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1105 | */ |
| 1106 | /* If the chain is fully enumerated quit */ |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1107 | if ((id == 0xffffffff) || (id == 0x00000000) || |
| 1108 | (id == 0x0000ffff) || (id == 0xffff0000)) { |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1109 | if (dev->enabled) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1110 | printk(BIOS_INFO, "PCI: Static device %s not " |
| 1111 | "found, disabling it.\n", dev_path(dev)); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1112 | dev->enabled = 0; |
| 1113 | } |
| 1114 | return dev; |
| 1115 | } |
| 1116 | } |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1117 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1118 | /* Read the rest of the PCI configuration information. */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1119 | hdr_type = pci_read_config8(dev, PCI_HEADER_TYPE); |
| 1120 | class = pci_read_config32(dev, PCI_CLASS_REVISION); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1121 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1122 | /* Store the interesting information in the device structure. */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1123 | dev->vendor = id & 0xffff; |
| 1124 | dev->device = (id >> 16) & 0xffff; |
| 1125 | dev->hdr_type = hdr_type; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1126 | |
| 1127 | /* Class code, the upper 3 bytes of PCI_CLASS_REVISION. */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1128 | dev->class = class >> 8; |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1129 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1130 | /* Architectural/System devices always need to be bus masters. */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1131 | if ((dev->class >> 16) == PCI_BASE_CLASS_SYSTEM) |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1132 | dev->command |= PCI_COMMAND_MASTER; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1133 | |
| 1134 | /* |
| 1135 | * Look at the vendor and device ID, or at least the header type and |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1136 | * class and figure out which set of configuration methods to use. |
| 1137 | * Unless we already have some PCI ops. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1138 | */ |
| 1139 | set_pci_ops(dev); |
| 1140 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1141 | /* Now run the magic enable/disable sequence for the device. */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1142 | if (dev->ops && dev->ops->enable) |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1143 | dev->ops->enable(dev); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1144 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1145 | /* Display the device. */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1146 | printk(BIOS_DEBUG, "%s [%04x/%04x] %s%s\n", dev_path(dev), |
| 1147 | dev->vendor, dev->device, dev->enabled ? "enabled" : "disabled", |
| 1148 | dev->ops ? "" : " No operations"); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1149 | |
| 1150 | return dev; |
| 1151 | } |
| 1152 | |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1153 | /** |
Kyösti Mälkki | c73acdb | 2013-06-15 17:16:56 +0300 | [diff] [blame] | 1154 | * Test for match between romstage and ramstage device instance. |
| 1155 | * |
| 1156 | * @param dev Pointer to the device structure. |
| 1157 | * @param sdev Simple device model identifier, created with PCI_DEV(). |
| 1158 | * @return Non-zero if bus:dev.fn of device matches. |
| 1159 | */ |
Aaron Durbin | c30d913 | 2017-08-07 16:55:43 -0600 | [diff] [blame] | 1160 | unsigned int pci_match_simple_dev(struct device *dev, pci_devfn_t sdev) |
Kyösti Mälkki | c73acdb | 2013-06-15 17:16:56 +0300 | [diff] [blame] | 1161 | { |
| 1162 | return dev->bus->secondary == PCI_DEV2SEGBUS(sdev) && |
| 1163 | dev->path.pci.devfn == PCI_DEV2DEVFN(sdev); |
| 1164 | } |
| 1165 | |
| 1166 | /** |
Tim Wawrzynczak | dbcf7b1 | 2020-05-13 16:15:08 -0600 | [diff] [blame] | 1167 | * PCI devices that are marked as "hidden" do not get probed. However, the same |
| 1168 | * initialization logic is still performed as if it were. This is useful when |
| 1169 | * devices would like to be described in the devicetree.cb file, and/or present |
| 1170 | * static PCI resources to the allocator, but the platform firmware hides the |
| 1171 | * device (makes the device invisible to PCI enumeration) before PCI enumeration |
| 1172 | * takes place. |
| 1173 | * |
| 1174 | * The expected semantics of PCI devices marked as 'hidden': |
| 1175 | * 1) The device is actually present under the specified BDF |
| 1176 | * 2) The device config space can still be accessed somehow, but the Vendor ID |
| 1177 | * indicates there is no device there (it reads as 0xffffffff). |
| 1178 | * 3) The device may still consume PCI resources. Typically, these would have |
| 1179 | * been hardcoded elsewhere. |
| 1180 | * |
| 1181 | * @param dev Pointer to the device structure. |
| 1182 | */ |
| 1183 | static void pci_scan_hidden_device(struct device *dev) |
| 1184 | { |
| 1185 | if (dev->chip_ops && dev->chip_ops->enable_dev) |
| 1186 | dev->chip_ops->enable_dev(dev); |
| 1187 | |
| 1188 | /* |
| 1189 | * If chip_ops->enable_dev did not set dev->ops, then set to a default |
| 1190 | * .ops, because PCI enumeration is effectively being skipped, therefore |
| 1191 | * no PCI driver will bind to this device. However, children may want to |
| 1192 | * be enumerated, so this provides scan_static_bus for the .scan_bus |
| 1193 | * callback. |
| 1194 | */ |
| 1195 | if (dev->ops == NULL) |
| 1196 | dev->ops = &default_hidden_pci_ops_dev; |
| 1197 | |
| 1198 | if (dev->ops->enable) |
| 1199 | dev->ops->enable(dev); |
| 1200 | |
| 1201 | /* Display the device almost as if it were probed normally */ |
| 1202 | printk(BIOS_DEBUG, "%s [0000/%04x] hidden%s\n", dev_path(dev), |
| 1203 | dev->device, dev->ops ? "" : " No operations"); |
| 1204 | } |
| 1205 | |
| 1206 | /** |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 1207 | * Scan a PCI bus. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1208 | * |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 1209 | * Determine the existence of devices and bridges on a PCI bus. If there are |
| 1210 | * bridges on the bus, recursively scan the buses behind the bridges. |
| 1211 | * |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 1212 | * @param bus Pointer to the bus structure. |
| 1213 | * @param min_devfn Minimum devfn to look at in the scan, usually 0x00. |
| 1214 | * @param max_devfn Maximum devfn to look at in the scan, usually 0xff. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1215 | */ |
Martin Roth | 38ddbfb | 2019-10-23 21:41:00 -0600 | [diff] [blame] | 1216 | void pci_scan_bus(struct bus *bus, unsigned int min_devfn, |
| 1217 | unsigned int max_devfn) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1218 | { |
| 1219 | unsigned int devfn; |
Kyösti Mälkki | 8712aa1 | 2019-01-09 11:31:25 +0200 | [diff] [blame] | 1220 | struct device *dev, **prev; |
| 1221 | int once = 0; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1222 | |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 1223 | printk(BIOS_DEBUG, "PCI: pci_scan_bus for bus %02x\n", bus->secondary); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1224 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1225 | /* Maximum sane devfn is 0xFF. */ |
Juhana Helovuo | 50b78b6 | 2010-09-13 14:43:02 +0000 | [diff] [blame] | 1226 | if (max_devfn > 0xff) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1227 | printk(BIOS_ERR, "PCI: pci_scan_bus limits devfn %x - " |
| 1228 | "devfn %x\n", min_devfn, max_devfn); |
| 1229 | printk(BIOS_ERR, "PCI: pci_scan_bus upper limit too big. " |
| 1230 | "Using 0xff.\n"); |
Juhana Helovuo | 50b78b6 | 2010-09-13 14:43:02 +0000 | [diff] [blame] | 1231 | max_devfn=0xff; |
| 1232 | } |
| 1233 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1234 | post_code(0x24); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1235 | |
| 1236 | /* |
| 1237 | * Probe all devices/functions on this bus with some optimization for |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1238 | * non-existence and single function devices. |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 1239 | */ |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1240 | for (devfn = min_devfn; devfn <= max_devfn; devfn++) { |
Ronald G. Minnich | 466ca2c | 2019-10-22 02:02:24 +0000 | [diff] [blame] | 1241 | if (CONFIG(MINIMAL_PCI_SCANNING)) { |
| 1242 | dev = pcidev_path_behind(bus, devfn); |
| 1243 | if (!dev || !dev->mandatory) |
| 1244 | continue; |
| 1245 | } |
| 1246 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1247 | /* First thing setup the device structure. */ |
Kyösti Mälkki | 8712aa1 | 2019-01-09 11:31:25 +0200 | [diff] [blame] | 1248 | dev = pci_scan_get_dev(bus, devfn); |
Li-Ta Lo | 9782f75 | 2004-05-05 21:15:42 +0000 | [diff] [blame] | 1249 | |
Tim Wawrzynczak | dbcf7b1 | 2020-05-13 16:15:08 -0600 | [diff] [blame] | 1250 | /* Devices marked 'hidden' do not get probed */ |
| 1251 | if (dev && dev->hidden) { |
| 1252 | pci_scan_hidden_device(dev); |
| 1253 | |
| 1254 | /* Skip pci_probe_dev, go to next devfn */ |
| 1255 | continue; |
| 1256 | } |
| 1257 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1258 | /* See if a device is present and setup the device structure. */ |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1259 | dev = pci_probe_dev(dev, bus, devfn); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 1260 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1261 | /* |
| 1262 | * If this is not a multi function device, or the device is |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1263 | * not present don't waste time probing another function. |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1264 | * Skip to next device. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1265 | */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1266 | if ((PCI_FUNC(devfn) == 0x00) && (!dev |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1267 | || (dev->enabled && ((dev->hdr_type & 0x80) != 0x80)))) { |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1268 | devfn += 0x07; |
| 1269 | } |
| 1270 | } |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1271 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1272 | post_code(0x25); |
| 1273 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1274 | /* |
| 1275 | * Warn if any leftover static devices are are found. |
| 1276 | * There's probably a problem in devicetree.cb. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1277 | */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1278 | |
Kyösti Mälkki | 8712aa1 | 2019-01-09 11:31:25 +0200 | [diff] [blame] | 1279 | prev = &bus->children; |
| 1280 | for (dev = bus->children; dev; dev = dev->sibling) { |
Duncan Laurie | bf69622 | 2020-10-18 15:10:00 -0700 | [diff] [blame^] | 1281 | |
| 1282 | /* |
| 1283 | * If static device is not PCI then enable it here and don't |
| 1284 | * treat it as a leftover device. |
| 1285 | */ |
| 1286 | if (dev->path.type != DEVICE_PATH_PCI) { |
| 1287 | enable_static_device(dev); |
| 1288 | continue; |
| 1289 | } |
| 1290 | |
Tim Wawrzynczak | dbcf7b1 | 2020-05-13 16:15:08 -0600 | [diff] [blame] | 1291 | /* |
| 1292 | * The device is only considered leftover if it is not hidden |
| 1293 | * and it has a Vendor ID of 0 (the default for a device that |
| 1294 | * could not be probed). |
| 1295 | */ |
| 1296 | if (dev->vendor != 0 || dev->hidden) { |
Kyösti Mälkki | 8712aa1 | 2019-01-09 11:31:25 +0200 | [diff] [blame] | 1297 | prev = &dev->sibling; |
| 1298 | continue; |
| 1299 | } |
| 1300 | |
| 1301 | /* Unlink it from list. */ |
| 1302 | *prev = dev->sibling; |
| 1303 | |
| 1304 | if (!once++) |
| 1305 | printk(BIOS_WARNING, "PCI: Leftover static devices:\n"); |
| 1306 | printk(BIOS_WARNING, "%s\n", dev_path(dev)); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1307 | } |
| 1308 | |
Kyösti Mälkki | 8712aa1 | 2019-01-09 11:31:25 +0200 | [diff] [blame] | 1309 | if (once) |
| 1310 | printk(BIOS_WARNING, "PCI: Check your devicetree.cb.\n"); |
| 1311 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1312 | /* |
| 1313 | * For all children that implement scan_bus() (i.e. bridges) |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 1314 | * scan the bus behind that child. |
| 1315 | */ |
Kyösti Mälkki | de271a8 | 2015-03-18 13:09:47 +0200 | [diff] [blame] | 1316 | |
Kyösti Mälkki | 2d2367c | 2015-02-20 21:28:31 +0200 | [diff] [blame] | 1317 | scan_bridges(bus); |
Kyösti Mälkki | de271a8 | 2015-03-18 13:09:47 +0200 | [diff] [blame] | 1318 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1319 | /* |
| 1320 | * We've scanned the bus and so we know all about what's on the other |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1321 | * side of any bridges that may be on this bus plus any devices. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1322 | * Return how far we've got finding sub-buses. |
| 1323 | */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1324 | post_code(0x55); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1325 | } |
| 1326 | |
Kyösti Mälkki | 3345240 | 2015-02-23 06:58:26 +0200 | [diff] [blame] | 1327 | typedef enum { |
| 1328 | PCI_ROUTE_CLOSE, |
| 1329 | PCI_ROUTE_SCAN, |
| 1330 | PCI_ROUTE_FINAL, |
| 1331 | } scan_state; |
| 1332 | |
| 1333 | static void pci_bridge_route(struct bus *link, scan_state state) |
| 1334 | { |
| 1335 | struct device *dev = link->dev; |
| 1336 | struct bus *parent = dev->bus; |
| 1337 | u32 reg, buses = 0; |
| 1338 | |
Kyösti Mälkki | 757c8b4 | 2015-02-23 06:58:26 +0200 | [diff] [blame] | 1339 | if (state == PCI_ROUTE_SCAN) { |
| 1340 | link->secondary = parent->subordinate + 1; |
Jeremy Soller | cf2ac54 | 2019-10-09 21:40:36 -0600 | [diff] [blame] | 1341 | link->subordinate = link->secondary + dev->hotplug_buses; |
Kyösti Mälkki | 757c8b4 | 2015-02-23 06:58:26 +0200 | [diff] [blame] | 1342 | } |
| 1343 | |
Kyösti Mälkki | 3345240 | 2015-02-23 06:58:26 +0200 | [diff] [blame] | 1344 | if (state == PCI_ROUTE_CLOSE) { |
| 1345 | buses |= 0xfeff << 8; |
| 1346 | } else if (state == PCI_ROUTE_SCAN) { |
Timothy Pearson | 7d8a478 | 2015-10-24 20:34:57 -0500 | [diff] [blame] | 1347 | buses |= parent->secondary & 0xff; |
Kyösti Mälkki | 3345240 | 2015-02-23 06:58:26 +0200 | [diff] [blame] | 1348 | buses |= ((u32) link->secondary & 0xff) << 8; |
Kyösti Mälkki | 757c8b4 | 2015-02-23 06:58:26 +0200 | [diff] [blame] | 1349 | buses |= 0xff << 16; /* MAX PCI_BUS number here */ |
Kyösti Mälkki | 3345240 | 2015-02-23 06:58:26 +0200 | [diff] [blame] | 1350 | } else if (state == PCI_ROUTE_FINAL) { |
| 1351 | buses |= parent->secondary & 0xff; |
| 1352 | buses |= ((u32) link->secondary & 0xff) << 8; |
| 1353 | buses |= ((u32) link->subordinate & 0xff) << 16; |
| 1354 | } |
| 1355 | |
| 1356 | if (state == PCI_ROUTE_SCAN) { |
| 1357 | /* Clear all status bits and turn off memory, I/O and master enables. */ |
| 1358 | link->bridge_cmd = pci_read_config16(dev, PCI_COMMAND); |
| 1359 | pci_write_config16(dev, PCI_COMMAND, 0x0000); |
| 1360 | pci_write_config16(dev, PCI_STATUS, 0xffff); |
| 1361 | } |
| 1362 | |
| 1363 | /* |
| 1364 | * Configure the bus numbers for this bridge: the configuration |
| 1365 | * transactions will not be propagated by the bridge if it is not |
| 1366 | * correctly configured. |
| 1367 | */ |
| 1368 | |
| 1369 | reg = pci_read_config32(dev, PCI_PRIMARY_BUS); |
| 1370 | reg &= 0xff000000; |
| 1371 | reg |= buses; |
| 1372 | pci_write_config32(dev, PCI_PRIMARY_BUS, reg); |
| 1373 | |
| 1374 | if (state == PCI_ROUTE_FINAL) { |
| 1375 | pci_write_config16(dev, PCI_COMMAND, link->bridge_cmd); |
Kyösti Mälkki | 757c8b4 | 2015-02-23 06:58:26 +0200 | [diff] [blame] | 1376 | parent->subordinate = link->subordinate; |
Kyösti Mälkki | 3345240 | 2015-02-23 06:58:26 +0200 | [diff] [blame] | 1377 | } |
| 1378 | } |
| 1379 | |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 1380 | /** |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 1381 | * Scan a PCI bridge and the buses behind the bridge. |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 1382 | * |
| 1383 | * Determine the existence of buses behind the bridge. Set up the bridge |
| 1384 | * according to the result of the scan. |
| 1385 | * |
| 1386 | * This function is the default scan_bus() method for PCI bridge devices. |
| 1387 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1388 | * @param dev Pointer to the bridge device. |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 1389 | * @param do_scan_bus TODO |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1390 | */ |
Kyösti Mälkki | 580e722 | 2015-03-19 21:04:23 +0200 | [diff] [blame] | 1391 | void do_pci_scan_bridge(struct device *dev, |
Kyösti Mälkki | de271a8 | 2015-03-18 13:09:47 +0200 | [diff] [blame] | 1392 | void (*do_scan_bus) (struct bus * bus, |
Martin Roth | 38ddbfb | 2019-10-23 21:41:00 -0600 | [diff] [blame] | 1393 | unsigned int min_devfn, |
| 1394 | unsigned int max_devfn)) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1395 | { |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1396 | struct bus *bus; |
Eric Biederman | 83b991a | 2003-10-11 06:20:25 +0000 | [diff] [blame] | 1397 | |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 1398 | printk(BIOS_SPEW, "%s for %s\n", __func__, dev_path(dev)); |
Li-Ta Lo | 3a81285 | 2004-12-03 22:39:34 +0000 | [diff] [blame] | 1399 | |
Myles Watson | 894a347 | 2010-06-09 22:41:35 +0000 | [diff] [blame] | 1400 | if (dev->link_list == NULL) { |
| 1401 | struct bus *link; |
| 1402 | link = malloc(sizeof(*link)); |
| 1403 | if (link == NULL) |
| 1404 | die("Couldn't allocate a link!\n"); |
| 1405 | memset(link, 0, sizeof(*link)); |
| 1406 | link->dev = dev; |
| 1407 | dev->link_list = link; |
| 1408 | } |
| 1409 | |
| 1410 | bus = dev->link_list; |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1411 | |
Nico Huber | 061b905 | 2019-09-21 15:58:23 +0200 | [diff] [blame] | 1412 | pci_bridge_vga_compat(bus); |
| 1413 | |
Kyösti Mälkki | 3345240 | 2015-02-23 06:58:26 +0200 | [diff] [blame] | 1414 | pci_bridge_route(bus, PCI_ROUTE_SCAN); |
Li-Ta Lo | 3a81285 | 2004-12-03 22:39:34 +0000 | [diff] [blame] | 1415 | |
Kyösti Mälkki | de271a8 | 2015-03-18 13:09:47 +0200 | [diff] [blame] | 1416 | do_scan_bus(bus, 0x00, 0xff); |
Kyösti Mälkki | 3345240 | 2015-02-23 06:58:26 +0200 | [diff] [blame] | 1417 | |
| 1418 | pci_bridge_route(bus, PCI_ROUTE_FINAL); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1419 | } |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 1420 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1421 | /** |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 1422 | * Scan a PCI bridge and the buses behind the bridge. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1423 | * |
| 1424 | * Determine the existence of buses behind the bridge. Set up the bridge |
| 1425 | * according to the result of the scan. |
| 1426 | * |
| 1427 | * This function is the default scan_bus() method for PCI bridge devices. |
| 1428 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1429 | * @param dev Pointer to the bridge device. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1430 | */ |
Kyösti Mälkki | 580e722 | 2015-03-19 21:04:23 +0200 | [diff] [blame] | 1431 | void pci_scan_bridge(struct device *dev) |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1432 | { |
Kyösti Mälkki | 580e722 | 2015-03-19 21:04:23 +0200 | [diff] [blame] | 1433 | do_pci_scan_bridge(dev, pci_scan_bus); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1434 | } |
| 1435 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1436 | /** |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 1437 | * Scan a PCI domain. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1438 | * |
| 1439 | * This function is the default scan_bus() method for PCI domains. |
| 1440 | * |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 1441 | * @param dev Pointer to the domain. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1442 | */ |
Aaron Durbin | c30d913 | 2017-08-07 16:55:43 -0600 | [diff] [blame] | 1443 | void pci_domain_scan_bus(struct device *dev) |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1444 | { |
Kyösti Mälkki | 6f37017 | 2015-03-19 15:26:52 +0200 | [diff] [blame] | 1445 | struct bus *link = dev->link_list; |
Kyösti Mälkki | de271a8 | 2015-03-18 13:09:47 +0200 | [diff] [blame] | 1446 | pci_scan_bus(link, PCI_DEVFN(0, 0), 0xff); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1447 | } |
| 1448 | |
Mike Loptien | 0f5cf5e | 2014-05-12 21:46:31 -0600 | [diff] [blame] | 1449 | /** |
| 1450 | * Take an INT_PIN number (0, 1 - 4) and convert |
| 1451 | * it to a string ("NO PIN", "PIN A" - "PIN D") |
| 1452 | * |
| 1453 | * @param pin PCI Interrupt Pin number (0, 1 - 4) |
| 1454 | * @return A string corresponding to the pin number or "Invalid" |
| 1455 | */ |
| 1456 | const char *pin_to_str(int pin) |
| 1457 | { |
| 1458 | const char *str[5] = { |
| 1459 | "NO PIN", |
| 1460 | "PIN A", |
| 1461 | "PIN B", |
| 1462 | "PIN C", |
| 1463 | "PIN D", |
| 1464 | }; |
| 1465 | |
| 1466 | if (pin >= 0 && pin <= 4) |
| 1467 | return str[pin]; |
| 1468 | else |
| 1469 | return "Invalid PIN, not 0 - 4"; |
| 1470 | } |
| 1471 | |
| 1472 | /** |
| 1473 | * Get the PCI INT_PIN swizzle for a device defined as: |
| 1474 | * pin_parent = (pin_child + devn_child) % 4 + 1 |
| 1475 | * where PIN A = 1 ... PIN_D = 4 |
| 1476 | * |
| 1477 | * Given a PCI device structure 'dev', find the interrupt pin |
| 1478 | * that will be triggered on its parent bridge device when |
| 1479 | * generating an interrupt. For example: Device 1:3.2 may |
| 1480 | * use INT_PIN A but will trigger PIN D on its parent bridge |
| 1481 | * device. In this case, this function will return 4 (PIN D). |
| 1482 | * |
| 1483 | * @param dev A PCI device structure to swizzle interrupt pins for |
Martin Roth | 32bc6b6 | 2015-01-04 16:54:35 -0700 | [diff] [blame] | 1484 | * @param *parent_bridge The PCI device structure for the bridge |
Mike Loptien | 0f5cf5e | 2014-05-12 21:46:31 -0600 | [diff] [blame] | 1485 | * device 'dev' is attached to |
| 1486 | * @return The interrupt pin number (1 - 4) that 'dev' will |
| 1487 | * trigger when generating an interrupt |
| 1488 | */ |
Aaron Durbin | c30d913 | 2017-08-07 16:55:43 -0600 | [diff] [blame] | 1489 | static int swizzle_irq_pins(struct device *dev, struct device **parent_bridge) |
Mike Loptien | 0f5cf5e | 2014-05-12 21:46:31 -0600 | [diff] [blame] | 1490 | { |
Aaron Durbin | c30d913 | 2017-08-07 16:55:43 -0600 | [diff] [blame] | 1491 | struct device *parent; /* Our current device's parent device */ |
| 1492 | struct device *child; /* The child device of the parent */ |
Mike Loptien | 0f5cf5e | 2014-05-12 21:46:31 -0600 | [diff] [blame] | 1493 | uint8_t parent_bus = 0; /* Parent Bus number */ |
| 1494 | uint16_t parent_devfn = 0; /* Parent Device and Function number */ |
| 1495 | uint16_t child_devfn = 0; /* Child Device and Function number */ |
| 1496 | uint8_t swizzled_pin = 0; /* Pin swizzled across a bridge */ |
| 1497 | |
| 1498 | /* Start with PIN A = 0 ... D = 3 */ |
| 1499 | swizzled_pin = pci_read_config8(dev, PCI_INTERRUPT_PIN) - 1; |
| 1500 | |
| 1501 | /* While our current device has parent devices */ |
| 1502 | child = dev; |
| 1503 | for (parent = child->bus->dev; parent; parent = parent->bus->dev) { |
| 1504 | parent_bus = parent->bus->secondary; |
| 1505 | parent_devfn = parent->path.pci.devfn; |
| 1506 | child_devfn = child->path.pci.devfn; |
| 1507 | |
| 1508 | /* Swizzle the INT_PIN for any bridges not on root bus */ |
| 1509 | swizzled_pin = (PCI_SLOT(child_devfn) + swizzled_pin) % 4; |
| 1510 | printk(BIOS_SPEW, "\tWith INT_PIN swizzled to %s\n" |
| 1511 | "\tAttached to bridge device %01X:%02Xh.%02Xh\n", |
| 1512 | pin_to_str(swizzled_pin + 1), parent_bus, |
| 1513 | PCI_SLOT(parent_devfn), PCI_FUNC(parent_devfn)); |
| 1514 | |
| 1515 | /* Continue until we find the root bus */ |
| 1516 | if (parent_bus > 0) { |
| 1517 | /* |
| 1518 | * We will go on to the next parent so this parent |
| 1519 | * becomes the child |
| 1520 | */ |
| 1521 | child = parent; |
| 1522 | continue; |
| 1523 | } else { |
| 1524 | /* |
| 1525 | * Found the root bridge device, |
| 1526 | * fill in the structure and exit |
| 1527 | */ |
| 1528 | *parent_bridge = parent; |
| 1529 | break; |
| 1530 | } |
| 1531 | } |
| 1532 | |
| 1533 | /* End with PIN A = 1 ... D = 4 */ |
| 1534 | return swizzled_pin + 1; |
| 1535 | } |
| 1536 | |
| 1537 | /** |
| 1538 | * Given a device structure 'dev', find its interrupt pin |
| 1539 | * and its parent bridge 'parent_bdg' device structure. |
| 1540 | * If it is behind a bridge, it will return the interrupt |
| 1541 | * pin number (1 - 4) of the parent bridge that the device |
| 1542 | * interrupt pin has been swizzled to, otherwise it will |
| 1543 | * return the interrupt pin that is programmed into the |
| 1544 | * PCI config space of the target device. If 'dev' is |
| 1545 | * behind a bridge, it will fill in 'parent_bdg' with the |
| 1546 | * device structure of the bridge it is behind, otherwise |
| 1547 | * it will copy 'dev' into 'parent_bdg'. |
| 1548 | * |
| 1549 | * @param dev A PCI device structure to get interrupt pins for. |
| 1550 | * @param *parent_bdg The PCI device structure for the bridge |
| 1551 | * device 'dev' is attached to. |
| 1552 | * @return The interrupt pin number (1 - 4) that 'dev' will |
| 1553 | * trigger when generating an interrupt. |
| 1554 | * Errors: -1 is returned if the device is not enabled |
| 1555 | * -2 is returned if a parent bridge could not be found. |
| 1556 | */ |
Aaron Durbin | c30d913 | 2017-08-07 16:55:43 -0600 | [diff] [blame] | 1557 | int get_pci_irq_pins(struct device *dev, struct device **parent_bdg) |
Mike Loptien | 0f5cf5e | 2014-05-12 21:46:31 -0600 | [diff] [blame] | 1558 | { |
| 1559 | uint8_t bus = 0; /* The bus this device is on */ |
| 1560 | uint16_t devfn = 0; /* This device's device and function numbers */ |
| 1561 | uint8_t int_pin = 0; /* Interrupt pin used by the device */ |
| 1562 | uint8_t target_pin = 0; /* Interrupt pin we want to assign an IRQ to */ |
| 1563 | |
| 1564 | /* Make sure this device is enabled */ |
| 1565 | if (!(dev->enabled && (dev->path.type == DEVICE_PATH_PCI))) |
| 1566 | return -1; |
| 1567 | |
| 1568 | bus = dev->bus->secondary; |
| 1569 | devfn = dev->path.pci.devfn; |
| 1570 | |
| 1571 | /* Get and validate the interrupt pin used. Only 1-4 are allowed */ |
| 1572 | int_pin = pci_read_config8(dev, PCI_INTERRUPT_PIN); |
| 1573 | if (int_pin < 1 || int_pin > 4) |
| 1574 | return -1; |
| 1575 | |
| 1576 | printk(BIOS_SPEW, "PCI IRQ: Found device %01X:%02X.%02X using %s\n", |
| 1577 | bus, PCI_SLOT(devfn), PCI_FUNC(devfn), pin_to_str(int_pin)); |
| 1578 | |
| 1579 | /* If this device is on a bridge, swizzle its INT_PIN */ |
| 1580 | if (bus) { |
| 1581 | /* Swizzle its INT_PINs */ |
| 1582 | target_pin = swizzle_irq_pins(dev, parent_bdg); |
| 1583 | |
| 1584 | /* Make sure the swizzle returned valid structures */ |
| 1585 | if (parent_bdg == NULL) { |
| 1586 | printk(BIOS_WARNING, |
| 1587 | "Warning: Could not find parent bridge for this device!\n"); |
| 1588 | return -2; |
| 1589 | } |
| 1590 | } else { /* Device is not behind a bridge */ |
| 1591 | target_pin = int_pin; /* Return its own interrupt pin */ |
| 1592 | *parent_bdg = dev; /* Return its own structure */ |
| 1593 | } |
| 1594 | |
| 1595 | /* Target pin is the interrupt pin we want to assign an IRQ to */ |
| 1596 | return target_pin; |
| 1597 | } |
| 1598 | |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 1599 | #if CONFIG(PC80_SYSTEM) |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1600 | /** |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 1601 | * Assign IRQ numbers. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1602 | * |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1603 | * This function assigns IRQs for all functions contained within the indicated |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1604 | * device address. If the device does not exist or does not require interrupts |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1605 | * then this function has no effect. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1606 | * |
| 1607 | * This function should be called for each PCI slot in your system. |
| 1608 | * |
Kyösti Mälkki | c19d6a6 | 2019-07-04 21:39:28 +0300 | [diff] [blame] | 1609 | * @param dev Pointer to dev structure. |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 1610 | * @param pIntAtoD An array of IRQ #s that are assigned to PINTA through PINTD |
| 1611 | * of this slot. The particular IRQ #s that are passed in depend on the |
| 1612 | * routing inside your southbridge and on your board. |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1613 | */ |
Kyösti Mälkki | c19d6a6 | 2019-07-04 21:39:28 +0300 | [diff] [blame] | 1614 | void pci_assign_irqs(struct device *dev, const unsigned char pIntAtoD[4]) |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1615 | { |
Kyösti Mälkki | c19d6a6 | 2019-07-04 21:39:28 +0300 | [diff] [blame] | 1616 | u8 slot, line, irq; |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1617 | |
Kyösti Mälkki | c19d6a6 | 2019-07-04 21:39:28 +0300 | [diff] [blame] | 1618 | /* Each device may contain up to eight functions. */ |
| 1619 | slot = dev->path.pci.devfn >> 3; |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1620 | |
Kyösti Mälkki | c19d6a6 | 2019-07-04 21:39:28 +0300 | [diff] [blame] | 1621 | for (; dev ; dev = dev->sibling) { |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1622 | |
Kyösti Mälkki | c19d6a6 | 2019-07-04 21:39:28 +0300 | [diff] [blame] | 1623 | if (dev->path.pci.devfn >> 3 != slot) |
| 1624 | break; |
| 1625 | |
| 1626 | line = pci_read_config8(dev, PCI_INTERRUPT_PIN); |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1627 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1628 | /* PCI spec says all values except 1..4 are reserved. */ |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1629 | if ((line < 1) || (line > 4)) |
| 1630 | continue; |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1631 | |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1632 | irq = pIntAtoD[line - 1]; |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1633 | |
Kyösti Mälkki | c19d6a6 | 2019-07-04 21:39:28 +0300 | [diff] [blame] | 1634 | printk(BIOS_DEBUG, "Assigning IRQ %d to %s\n", irq, dev_path(dev)); |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1635 | |
Kyösti Mälkki | c19d6a6 | 2019-07-04 21:39:28 +0300 | [diff] [blame] | 1636 | pci_write_config8(dev, PCI_INTERRUPT_LINE, pIntAtoD[line - 1]); |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1637 | |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 1638 | #if CONFIG(PC80_SYSTEM) |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1639 | /* Change to level triggered. */ |
| 1640 | i8259_configure_irq_trigger(pIntAtoD[line - 1], |
| 1641 | IRQ_LEVEL_TRIGGERED); |
Stefan Reinauer | 5fb6216 | 2010-12-16 23:52:04 +0000 | [diff] [blame] | 1642 | #endif |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1643 | } |
| 1644 | } |
John Zhao | 95b4ece0 | 2020-05-04 15:58:48 -0700 | [diff] [blame] | 1645 | |
| 1646 | void pci_dev_disable_bus_master(const struct device *dev) |
| 1647 | { |
| 1648 | pci_update_config16(dev, PCI_COMMAND, ~PCI_COMMAND_MASTER, 0x0); |
| 1649 | } |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1650 | #endif |
Furquan Shaikh | 494f319 | 2020-10-03 16:23:55 -0700 | [diff] [blame] | 1651 | |
| 1652 | bool pci_dev_is_wake_source(const struct device *dev) |
| 1653 | { |
| 1654 | unsigned int pm_cap; |
| 1655 | uint16_t pmcs; |
| 1656 | |
| 1657 | if (dev->path.type != DEVICE_PATH_PCI) |
| 1658 | return false; |
| 1659 | |
| 1660 | pm_cap = pci_find_capability(dev, PCI_CAP_ID_PM); |
| 1661 | if (!pm_cap) |
| 1662 | return false; |
| 1663 | |
| 1664 | pmcs = pci_read_config16(dev, pm_cap + PCI_PM_CTRL); |
| 1665 | |
| 1666 | /* PCI Device is a wake source if PME_ENABLE and PME_STATUS are set in PMCS register. */ |
| 1667 | return (pmcs & PCI_PM_CTRL_PME_ENABLE) && (pmcs & PCI_PM_CTRL_PME_STATUS); |
| 1668 | } |