Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1 | /* |
Stefan Reinauer | 7e61e45 | 2008-01-18 10:35:56 +0000 | [diff] [blame] | 2 | * This file is part of the coreboot project. |
Uwe Hermann | b80dbf0 | 2007-04-22 19:08:13 +0000 | [diff] [blame] | 3 | * |
| 4 | * It was originally based on the Linux kernel (drivers/pci/pci.c). |
Martin Roth | bb5953d | 2016-04-11 20:53:39 -0600 | [diff] [blame] | 5 | * Copyright 1993 -- 1997 Drew Eckhardt, Frederic Potter, |
| 6 | * David Mosberger-Tang |
Uwe Hermann | b80dbf0 | 2007-04-22 19:08:13 +0000 | [diff] [blame] | 7 | * |
Martin Roth | bb5953d | 2016-04-11 20:53:39 -0600 | [diff] [blame] | 8 | * Copyright 1997 -- 1999 Martin Mares <mj@atrey.karlin.mff.cuni.cz> |
| 9 | * |
Uwe Hermann | b80dbf0 | 2007-04-22 19:08:13 +0000 | [diff] [blame] | 10 | * Copyright (C) 2003-2004 Linux Networx |
| 11 | * (Written by Eric Biederman <ebiederman@lnxi.com> for Linux Networx) |
| 12 | * Copyright (C) 2003-2006 Ronald G. Minnich <rminnich@gmail.com> |
| 13 | * Copyright (C) 2004-2005 Li-Ta Lo <ollie@lanl.gov> |
| 14 | * Copyright (C) 2005-2006 Tyan |
| 15 | * (Written by Yinghai Lu <yhlu@tyan.com> for Tyan) |
Patrick Georgi | 16cdbb2 | 2009-04-21 20:14:31 +0000 | [diff] [blame] | 16 | * Copyright (C) 2005-2009 coresystems GmbH |
| 17 | * (Written by Stefan Reinauer <stepan@coresystems.de> for coresystems GmbH) |
Mike Loptien | 0f5cf5e | 2014-05-12 21:46:31 -0600 | [diff] [blame] | 18 | * Copyright (C) 2014 Sage Electronic Engineering, LLC. |
Martin Roth | bb5953d | 2016-04-11 20:53:39 -0600 | [diff] [blame] | 19 | * |
| 20 | * This program is free software; you can redistribute it and/or modify |
| 21 | * it under the terms of the GNU General Public License as published by |
| 22 | * the Free Software Foundation; version 2 of the License. |
| 23 | * |
| 24 | * This program is distributed in the hope that it will be useful, |
| 25 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 26 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 27 | * GNU General Public License for more details. |
Uwe Hermann | b80dbf0 | 2007-04-22 19:08:13 +0000 | [diff] [blame] | 28 | */ |
| 29 | |
| 30 | /* |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 31 | * PCI Bus Services, see include/linux/pci.h for further explanation. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 32 | */ |
| 33 | |
Edward O'Callaghan | 6c99250 | 2014-06-20 21:19:06 +1000 | [diff] [blame] | 34 | #include <arch/acpi.h> |
| 35 | #include <arch/io.h> |
Kyösti Mälkki | f1b58b7 | 2019-03-01 13:43:02 +0200 | [diff] [blame^] | 36 | #include <device/pci_ops.h> |
Edward O'Callaghan | 6c99250 | 2014-06-20 21:19:06 +1000 | [diff] [blame] | 37 | #include <bootmode.h> |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 38 | #include <console/console.h> |
| 39 | #include <stdlib.h> |
| 40 | #include <stdint.h> |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 41 | #include <string.h> |
Edward O'Callaghan | 6c99250 | 2014-06-20 21:19:06 +1000 | [diff] [blame] | 42 | #include <delay.h> |
Edward O'Callaghan | 6c99250 | 2014-06-20 21:19:06 +1000 | [diff] [blame] | 43 | #include <device/cardbus.h> |
Eric Biederman | 5899fd8 | 2003-04-24 06:25:08 +0000 | [diff] [blame] | 44 | #include <device/device.h> |
| 45 | #include <device/pci.h> |
| 46 | #include <device/pci_ids.h> |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 47 | #include <device/pcix.h> |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 48 | #include <device/pciexp.h> |
Edward O'Callaghan | 6c99250 | 2014-06-20 21:19:06 +1000 | [diff] [blame] | 49 | #include <device/hypertransport.h> |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 50 | #include <pc80/i8259.h> |
Philipp Deppenwiese | fea2429 | 2017-10-17 17:02:29 +0200 | [diff] [blame] | 51 | #include <security/vboot/vbnv.h> |
Martin Roth | 5dd4a2a | 2018-03-06 16:10:45 -0700 | [diff] [blame] | 52 | #include <timestamp.h> |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 53 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 54 | u8 pci_moving_config8(struct device *dev, unsigned int reg) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 55 | { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 56 | u8 value, ones, zeroes; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 57 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 58 | value = pci_read_config8(dev, reg); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 59 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 60 | pci_write_config8(dev, reg, 0xff); |
| 61 | ones = pci_read_config8(dev, reg); |
| 62 | |
| 63 | pci_write_config8(dev, reg, 0x00); |
| 64 | zeroes = pci_read_config8(dev, reg); |
| 65 | |
| 66 | pci_write_config8(dev, reg, value); |
| 67 | |
| 68 | return ones ^ zeroes; |
| 69 | } |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 70 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 71 | u16 pci_moving_config16(struct device *dev, unsigned int reg) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 72 | { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 73 | u16 value, ones, zeroes; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 74 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 75 | value = pci_read_config16(dev, reg); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 76 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 77 | pci_write_config16(dev, reg, 0xffff); |
| 78 | ones = pci_read_config16(dev, reg); |
| 79 | |
| 80 | pci_write_config16(dev, reg, 0x0000); |
| 81 | zeroes = pci_read_config16(dev, reg); |
| 82 | |
| 83 | pci_write_config16(dev, reg, value); |
| 84 | |
| 85 | return ones ^ zeroes; |
| 86 | } |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 87 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 88 | u32 pci_moving_config32(struct device *dev, unsigned int reg) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 89 | { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 90 | u32 value, ones, zeroes; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 91 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 92 | value = pci_read_config32(dev, reg); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 93 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 94 | pci_write_config32(dev, reg, 0xffffffff); |
| 95 | ones = pci_read_config32(dev, reg); |
| 96 | |
| 97 | pci_write_config32(dev, reg, 0x00000000); |
| 98 | zeroes = pci_read_config32(dev, reg); |
| 99 | |
| 100 | pci_write_config32(dev, reg, value); |
| 101 | |
| 102 | return ones ^ zeroes; |
| 103 | } |
| 104 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 105 | /** |
| 106 | * Given a device, a capability type, and a last position, return the next |
| 107 | * matching capability. Always start at the head of the list. |
| 108 | * |
| 109 | * @param dev Pointer to the device structure. |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 110 | * @param cap PCI_CAP_LIST_ID of the PCI capability we're looking for. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 111 | * @param last Location of the PCI capability register to start from. |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 112 | * @return The next matching capability. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 113 | */ |
| 114 | unsigned pci_find_next_capability(struct device *dev, unsigned cap, |
| 115 | unsigned last) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 116 | { |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 117 | unsigned pos = 0; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 118 | u16 status; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 119 | unsigned reps = 48; |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 120 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 121 | status = pci_read_config16(dev, PCI_STATUS); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 122 | if (!(status & PCI_STATUS_CAP_LIST)) |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 123 | return 0; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 124 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 125 | switch (dev->hdr_type & 0x7f) { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 126 | case PCI_HEADER_TYPE_NORMAL: |
| 127 | case PCI_HEADER_TYPE_BRIDGE: |
| 128 | pos = PCI_CAPABILITY_LIST; |
| 129 | break; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 130 | case PCI_HEADER_TYPE_CARDBUS: |
| 131 | pos = PCI_CB_CAPABILITY_LIST; |
| 132 | break; |
| 133 | default: |
| 134 | return 0; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 135 | } |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 136 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 137 | pos = pci_read_config8(dev, pos); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 138 | while (reps-- && (pos >= 0x40)) { /* Loop through the linked list. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 139 | int this_cap; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 140 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 141 | pos &= ~3; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 142 | this_cap = pci_read_config8(dev, pos + PCI_CAP_LIST_ID); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 143 | printk(BIOS_SPEW, "Capability: type 0x%02x @ 0x%02x\n", |
| 144 | this_cap, pos); |
| 145 | if (this_cap == 0xff) |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 146 | break; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 147 | |
| 148 | if (!last && (this_cap == cap)) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 149 | return pos; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 150 | |
| 151 | if (last == pos) |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 152 | last = 0; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 153 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 154 | pos = pci_read_config8(dev, pos + PCI_CAP_LIST_NEXT); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 155 | } |
| 156 | return 0; |
| 157 | } |
| 158 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 159 | /** |
| 160 | * Given a device, and a capability type, return the next matching |
| 161 | * capability. Always start at the head of the list. |
| 162 | * |
| 163 | * @param dev Pointer to the device structure. |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 164 | * @param cap PCI_CAP_LIST_ID of the PCI capability we're looking for. |
| 165 | * @return The next matching capability. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 166 | */ |
Aaron Durbin | c30d913 | 2017-08-07 16:55:43 -0600 | [diff] [blame] | 167 | unsigned int pci_find_capability(struct device *dev, unsigned int cap) |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 168 | { |
| 169 | return pci_find_next_capability(dev, cap, 0); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 170 | } |
| 171 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 172 | /** |
| 173 | * Given a device and register, read the size of the BAR for that register. |
| 174 | * |
| 175 | * @param dev Pointer to the device structure. |
| 176 | * @param index Address of the PCI configuration register. |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 177 | * @return TODO |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 178 | */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 179 | struct resource *pci_get_resource(struct device *dev, unsigned long index) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 180 | { |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 181 | struct resource *resource; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 182 | unsigned long value, attr; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 183 | resource_t moving, limit; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 184 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 185 | /* Initialize the resources to nothing. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 186 | resource = new_resource(dev, index); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 187 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 188 | /* Get the initial value. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 189 | value = pci_read_config32(dev, index); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 190 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 191 | /* See which bits move. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 192 | moving = pci_moving_config32(dev, index); |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 193 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 194 | /* Initialize attr to the bits that do not move. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 195 | attr = value & ~moving; |
| 196 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 197 | /* If it is a 64bit resource look at the high half as well. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 198 | if (((attr & PCI_BASE_ADDRESS_SPACE_IO) == 0) && |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 199 | ((attr & PCI_BASE_ADDRESS_MEM_LIMIT_MASK) == |
| 200 | PCI_BASE_ADDRESS_MEM_LIMIT_64)) { |
| 201 | /* Find the high bits that move. */ |
| 202 | moving |= |
| 203 | ((resource_t) pci_moving_config32(dev, index + 4)) << 32; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 204 | } |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 205 | |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 206 | /* Find the resource constraints. |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 207 | * Start by finding the bits that move. From there: |
| 208 | * - Size is the least significant bit of the bits that move. |
| 209 | * - Limit is all of the bits that move plus all of the lower bits. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 210 | * See PCI Spec 6.2.5.1. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 211 | */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 212 | limit = 0; |
| 213 | if (moving) { |
| 214 | resource->size = 1; |
| 215 | resource->align = resource->gran = 0; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 216 | while (!(moving & resource->size)) { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 217 | resource->size <<= 1; |
| 218 | resource->align += 1; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 219 | resource->gran += 1; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 220 | } |
| 221 | resource->limit = limit = moving | (resource->size - 1); |
Nico Huber | 8193b06 | 2015-10-21 15:43:41 +0200 | [diff] [blame] | 222 | |
| 223 | if (pci_base_address_is_memory_space(attr)) { |
| 224 | /* Page-align to allow individual mapping of devices. */ |
| 225 | if (resource->align < 12) |
| 226 | resource->align = 12; |
| 227 | } |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 228 | } |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 229 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 230 | /* |
| 231 | * Some broken hardware has read-only registers that do not |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 232 | * really size correctly. |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 233 | * |
| 234 | * Example: the Acer M7229 has BARs 1-4 normally read-only, |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 235 | * so BAR1 at offset 0x10 reads 0x1f1. If you size that register |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 236 | * by writing 0xffffffff to it, it will read back as 0x1f1 -- which |
| 237 | * is a violation of the spec. |
| 238 | * |
| 239 | * We catch this case and ignore it by observing which bits move. |
| 240 | * |
| 241 | * This also catches the common case of unimplemented registers |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 242 | * that always read back as 0. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 243 | */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 244 | if (moving == 0) { |
| 245 | if (value != 0) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 246 | printk(BIOS_DEBUG, "%s register %02lx(%08lx), " |
| 247 | "read-only ignoring it\n", |
| 248 | dev_path(dev), index, value); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 249 | } |
| 250 | resource->flags = 0; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 251 | } else if (attr & PCI_BASE_ADDRESS_SPACE_IO) { |
| 252 | /* An I/O mapped base address. */ |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 253 | resource->flags |= IORESOURCE_IO; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 254 | /* I don't want to deal with 32bit I/O resources. */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 255 | resource->limit = 0xffff; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 256 | } else { |
| 257 | /* A Memory mapped base address. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 258 | attr &= PCI_BASE_ADDRESS_MEM_ATTR_MASK; |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 259 | resource->flags |= IORESOURCE_MEM; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 260 | if (attr & PCI_BASE_ADDRESS_MEM_PREFETCH) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 261 | resource->flags |= IORESOURCE_PREFETCH; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 262 | attr &= PCI_BASE_ADDRESS_MEM_LIMIT_MASK; |
| 263 | if (attr == PCI_BASE_ADDRESS_MEM_LIMIT_32) { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 264 | /* 32bit limit. */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 265 | resource->limit = 0xffffffffUL; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 266 | } else if (attr == PCI_BASE_ADDRESS_MEM_LIMIT_1M) { |
| 267 | /* 1MB limit. */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 268 | resource->limit = 0x000fffffUL; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 269 | } else if (attr == PCI_BASE_ADDRESS_MEM_LIMIT_64) { |
| 270 | /* 64bit limit. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 271 | resource->limit = 0xffffffffffffffffULL; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 272 | resource->flags |= IORESOURCE_PCI64; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 273 | } else { |
| 274 | /* Invalid value. */ |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 275 | printk(BIOS_ERR, "Broken BAR with value %lx\n", attr); |
| 276 | printk(BIOS_ERR, " on dev %s at index %02lx\n", |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 277 | dev_path(dev), index); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 278 | resource->flags = 0; |
| 279 | } |
| 280 | } |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 281 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 282 | /* Don't let the limit exceed which bits can move. */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 283 | if (resource->limit > limit) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 284 | resource->limit = limit; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 285 | |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 286 | return resource; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 287 | } |
| 288 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 289 | /** |
| 290 | * Given a device and an index, read the size of the BAR for that register. |
| 291 | * |
| 292 | * @param dev Pointer to the device structure. |
| 293 | * @param index Address of the PCI configuration register. |
| 294 | */ |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 295 | static void pci_get_rom_resource(struct device *dev, unsigned long index) |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 296 | { |
| 297 | struct resource *resource; |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 298 | unsigned long value; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 299 | resource_t moving; |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 300 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 301 | /* Initialize the resources to nothing. */ |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 302 | resource = new_resource(dev, index); |
| 303 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 304 | /* Get the initial value. */ |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 305 | value = pci_read_config32(dev, index); |
| 306 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 307 | /* See which bits move. */ |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 308 | moving = pci_moving_config32(dev, index); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 309 | |
| 310 | /* Clear the Enable bit. */ |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 311 | moving = moving & ~PCI_ROM_ADDRESS_ENABLE; |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 312 | |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 313 | /* Find the resource constraints. |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 314 | * Start by finding the bits that move. From there: |
| 315 | * - Size is the least significant bit of the bits that move. |
| 316 | * - Limit is all of the bits that move plus all of the lower bits. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 317 | * See PCI Spec 6.2.5.1. |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 318 | */ |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 319 | if (moving) { |
| 320 | resource->size = 1; |
| 321 | resource->align = resource->gran = 0; |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 322 | while (!(moving & resource->size)) { |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 323 | resource->size <<= 1; |
| 324 | resource->align += 1; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 325 | resource->gran += 1; |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 326 | } |
Patrick Georgi | 16cdbb2 | 2009-04-21 20:14:31 +0000 | [diff] [blame] | 327 | resource->limit = moving | (resource->size - 1); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 328 | resource->flags |= IORESOURCE_MEM | IORESOURCE_READONLY; |
| 329 | } else { |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 330 | if (value != 0) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 331 | printk(BIOS_DEBUG, "%s register %02lx(%08lx), " |
| 332 | "read-only ignoring it\n", |
| 333 | dev_path(dev), index, value); |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 334 | } |
| 335 | resource->flags = 0; |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 336 | } |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 337 | compact_resources(dev); |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 338 | } |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 339 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 340 | /** |
Patrick Rudolph | 4e2f95b | 2018-05-16 14:56:22 +0200 | [diff] [blame] | 341 | * Given a device, read the size of the MSI-X table. |
| 342 | * |
| 343 | * @param dev Pointer to the device structure. |
| 344 | * @return MSI-X table size or 0 if not MSI-X capable device |
| 345 | */ |
| 346 | size_t pci_msix_table_size(struct device *dev) |
| 347 | { |
| 348 | const size_t pos = pci_find_capability(dev, PCI_CAP_ID_MSIX); |
| 349 | if (!pos) |
| 350 | return 0; |
| 351 | |
| 352 | const u16 control = pci_read_config16(dev, pos + PCI_MSIX_FLAGS); |
| 353 | return (control & PCI_MSIX_FLAGS_QSIZE) + 1; |
| 354 | } |
| 355 | |
| 356 | /** |
| 357 | * Given a device, return the table offset and bar the MSI-X tables resides in. |
| 358 | * |
| 359 | * @param dev Pointer to the device structure. |
| 360 | * @param offset Returned value gives the offset in bytes inside the PCI BAR. |
| 361 | * @param idx The returned value is the index of the PCI_BASE_ADDRESS register |
| 362 | * the MSI-X table is located in. |
| 363 | * @return Zero on success |
| 364 | */ |
| 365 | int pci_msix_table_bar(struct device *dev, u32 *offset, u8 *idx) |
| 366 | { |
| 367 | const size_t pos = pci_find_capability(dev, PCI_CAP_ID_MSIX); |
| 368 | if (!pos || !offset || !idx) |
| 369 | return 1; |
| 370 | |
| 371 | *offset = pci_read_config32(dev, pos + PCI_MSIX_TABLE); |
| 372 | *idx = (u8)(*offset & PCI_MSIX_PBA_BIR); |
| 373 | *offset &= PCI_MSIX_PBA_OFFSET; |
| 374 | |
| 375 | return 0; |
| 376 | } |
| 377 | |
| 378 | /** |
| 379 | * Given a device, return a msix_entry pointer or NULL if no table was found. |
| 380 | * |
| 381 | * @param dev Pointer to the device structure. |
| 382 | * |
| 383 | * @return NULL on error |
| 384 | */ |
| 385 | struct msix_entry *pci_msix_get_table(struct device *dev) |
| 386 | { |
| 387 | struct resource *res; |
| 388 | u32 offset; |
| 389 | u8 idx; |
| 390 | |
| 391 | if (pci_msix_table_bar(dev, &offset, &idx)) |
| 392 | return NULL; |
| 393 | |
| 394 | if (idx > 5) |
| 395 | return NULL; |
| 396 | |
| 397 | res = probe_resource(dev, idx * 4 + PCI_BASE_ADDRESS_0); |
| 398 | if (!res || !res->base || offset >= res->size) |
| 399 | return NULL; |
| 400 | |
| 401 | if ((res->flags & IORESOURCE_PCI64) && |
| 402 | (uintptr_t)res->base != res->base) |
| 403 | return NULL; |
| 404 | |
| 405 | return (struct msix_entry *)((uintptr_t)res->base + offset); |
| 406 | } |
| 407 | |
| 408 | /** |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 409 | * Read the base address registers for a given device. |
| 410 | * |
| 411 | * @param dev Pointer to the dev structure. |
| 412 | * @param howmany How many registers to read (6 for device, 2 for bridge). |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 413 | */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 414 | static void pci_read_bases(struct device *dev, unsigned int howmany) |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 415 | { |
| 416 | unsigned long index; |
| 417 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 418 | for (index = PCI_BASE_ADDRESS_0; |
| 419 | (index < PCI_BASE_ADDRESS_0 + (howmany << 2));) { |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 420 | struct resource *resource; |
| 421 | resource = pci_get_resource(dev, index); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 422 | index += (resource->flags & IORESOURCE_PCI64) ? 8 : 4; |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 423 | } |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 424 | |
| 425 | compact_resources(dev); |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 426 | } |
| 427 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 428 | static void pci_record_bridge_resource(struct device *dev, resource_t moving, |
| 429 | unsigned index, unsigned long type) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 430 | { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 431 | struct resource *resource; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 432 | unsigned long gran; |
| 433 | resource_t step; |
| 434 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 435 | resource = NULL; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 436 | |
| 437 | if (!moving) |
| 438 | return; |
| 439 | |
| 440 | /* Initialize the constraints on the current bus. */ |
| 441 | resource = new_resource(dev, index); |
| 442 | resource->size = 0; |
| 443 | gran = 0; |
| 444 | step = 1; |
| 445 | while ((moving & step) == 0) { |
| 446 | gran += 1; |
| 447 | step <<= 1; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 448 | } |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 449 | resource->gran = gran; |
| 450 | resource->align = gran; |
| 451 | resource->limit = moving | (step - 1); |
| 452 | resource->flags = type | IORESOURCE_PCI_BRIDGE | |
| 453 | IORESOURCE_BRIDGE; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 454 | } |
| 455 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 456 | static void pci_bridge_read_bases(struct device *dev) |
| 457 | { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 458 | resource_t moving_base, moving_limit, moving; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 459 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 460 | /* See if the bridge I/O resources are implemented. */ |
| 461 | moving_base = ((u32) pci_moving_config8(dev, PCI_IO_BASE)) << 8; |
| 462 | moving_base |= |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 463 | ((u32) pci_moving_config16(dev, PCI_IO_BASE_UPPER16)) << 16; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 464 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 465 | moving_limit = ((u32) pci_moving_config8(dev, PCI_IO_LIMIT)) << 8; |
| 466 | moving_limit |= |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 467 | ((u32) pci_moving_config16(dev, PCI_IO_LIMIT_UPPER16)) << 16; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 468 | |
| 469 | moving = moving_base & moving_limit; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 470 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 471 | /* Initialize the I/O space constraints on the current bus. */ |
| 472 | pci_record_bridge_resource(dev, moving, PCI_IO_BASE, IORESOURCE_IO); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 473 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 474 | /* See if the bridge prefmem resources are implemented. */ |
| 475 | moving_base = |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 476 | ((resource_t) pci_moving_config16(dev, PCI_PREF_MEMORY_BASE)) << 16; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 477 | moving_base |= |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 478 | ((resource_t) pci_moving_config32(dev, PCI_PREF_BASE_UPPER32)) << 32; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 479 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 480 | moving_limit = |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 481 | ((resource_t) pci_moving_config16(dev, PCI_PREF_MEMORY_LIMIT)) << 16; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 482 | moving_limit |= |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 483 | ((resource_t) pci_moving_config32(dev, PCI_PREF_LIMIT_UPPER32)) << 32; |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 484 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 485 | moving = moving_base & moving_limit; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 486 | /* Initialize the prefetchable memory constraints on the current bus. */ |
| 487 | pci_record_bridge_resource(dev, moving, PCI_PREF_MEMORY_BASE, |
| 488 | IORESOURCE_MEM | IORESOURCE_PREFETCH); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 489 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 490 | /* See if the bridge mem resources are implemented. */ |
| 491 | moving_base = ((u32) pci_moving_config16(dev, PCI_MEMORY_BASE)) << 16; |
| 492 | moving_limit = ((u32) pci_moving_config16(dev, PCI_MEMORY_LIMIT)) << 16; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 493 | |
| 494 | moving = moving_base & moving_limit; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 495 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 496 | /* Initialize the memory resources on the current bus. */ |
| 497 | pci_record_bridge_resource(dev, moving, PCI_MEMORY_BASE, |
| 498 | IORESOURCE_MEM); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 499 | |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 500 | compact_resources(dev); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 501 | } |
| 502 | |
Eric Biederman | 5899fd8 | 2003-04-24 06:25:08 +0000 | [diff] [blame] | 503 | void pci_dev_read_resources(struct device *dev) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 504 | { |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 505 | pci_read_bases(dev, 6); |
| 506 | pci_get_rom_resource(dev, PCI_ROM_ADDRESS); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 507 | } |
| 508 | |
Eric Biederman | 5899fd8 | 2003-04-24 06:25:08 +0000 | [diff] [blame] | 509 | void pci_bus_read_resources(struct device *dev) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 510 | { |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 511 | pci_bridge_read_bases(dev); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 512 | pci_read_bases(dev, 2); |
| 513 | pci_get_rom_resource(dev, PCI_ROM_ADDRESS1); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 514 | } |
| 515 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 516 | void pci_domain_read_resources(struct device *dev) |
| 517 | { |
| 518 | struct resource *res; |
| 519 | |
| 520 | /* Initialize the system-wide I/O space constraints. */ |
| 521 | res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0)); |
| 522 | res->limit = 0xffffUL; |
| 523 | res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | |
| 524 | IORESOURCE_ASSIGNED; |
| 525 | |
| 526 | /* Initialize the system-wide memory resources constraints. */ |
| 527 | res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0)); |
| 528 | res->limit = 0xffffffffULL; |
| 529 | res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | |
| 530 | IORESOURCE_ASSIGNED; |
| 531 | } |
| 532 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 533 | static void pci_set_resource(struct device *dev, struct resource *resource) |
| 534 | { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 535 | resource_t base, end; |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 536 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 537 | /* Make certain the resource has actually been assigned a value. */ |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 538 | if (!(resource->flags & IORESOURCE_ASSIGNED)) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 539 | printk(BIOS_ERR, "ERROR: %s %02lx %s size: 0x%010llx not " |
| 540 | "assigned\n", dev_path(dev), resource->index, |
| 541 | resource_type(resource), resource->size); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 542 | return; |
| 543 | } |
| 544 | |
Myles Watson | eb81a5b | 2009-11-05 20:06:19 +0000 | [diff] [blame] | 545 | /* If this resource is fixed don't worry about it. */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 546 | if (resource->flags & IORESOURCE_FIXED) |
Myles Watson | eb81a5b | 2009-11-05 20:06:19 +0000 | [diff] [blame] | 547 | return; |
Myles Watson | eb81a5b | 2009-11-05 20:06:19 +0000 | [diff] [blame] | 548 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 549 | /* If I have already stored this resource don't worry about it. */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 550 | if (resource->flags & IORESOURCE_STORED) |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 551 | return; |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 552 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 553 | /* If the resource is subtractive don't worry about it. */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 554 | if (resource->flags & IORESOURCE_SUBTRACTIVE) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 555 | return; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 556 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 557 | /* Only handle PCI memory and I/O resources for now. */ |
| 558 | if (!(resource->flags & (IORESOURCE_MEM | IORESOURCE_IO))) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 559 | return; |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 560 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 561 | /* Enable the resources in the command register. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 562 | if (resource->size) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 563 | if (resource->flags & IORESOURCE_MEM) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 564 | dev->command |= PCI_COMMAND_MEMORY; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 565 | if (resource->flags & IORESOURCE_IO) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 566 | dev->command |= PCI_COMMAND_IO; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 567 | if (resource->flags & IORESOURCE_PCI_BRIDGE) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 568 | dev->command |= PCI_COMMAND_MASTER; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 569 | } |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 570 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 571 | /* Get the base address. */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 572 | base = resource->base; |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 573 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 574 | /* Get the end. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 575 | end = resource_end(resource); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 576 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 577 | /* Now store the resource. */ |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 578 | resource->flags |= IORESOURCE_STORED; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 579 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 580 | /* |
| 581 | * PCI bridges have no enable bit. They are disabled if the base of |
| 582 | * the range is greater than the limit. If the size is zero, disable |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 583 | * by setting the base = limit and end = limit - 2^gran. |
| 584 | */ |
| 585 | if (resource->size == 0 && (resource->flags & IORESOURCE_PCI_BRIDGE)) { |
| 586 | base = resource->limit; |
| 587 | end = resource->limit - (1 << resource->gran); |
| 588 | resource->base = base; |
| 589 | } |
| 590 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 591 | if (!(resource->flags & IORESOURCE_PCI_BRIDGE)) { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 592 | unsigned long base_lo, base_hi; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 593 | |
| 594 | /* |
| 595 | * Some chipsets allow us to set/clear the I/O bit |
| 596 | * (e.g. VIA 82C686A). So set it to be safe. |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 597 | */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 598 | base_lo = base & 0xffffffff; |
| 599 | base_hi = (base >> 32) & 0xffffffff; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 600 | if (resource->flags & IORESOURCE_IO) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 601 | base_lo |= PCI_BASE_ADDRESS_SPACE_IO; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 602 | pci_write_config32(dev, resource->index, base_lo); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 603 | if (resource->flags & IORESOURCE_PCI64) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 604 | pci_write_config32(dev, resource->index + 4, base_hi); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 605 | } else if (resource->index == PCI_IO_BASE) { |
| 606 | /* Set the I/O ranges. */ |
| 607 | pci_write_config8(dev, PCI_IO_BASE, base >> 8); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 608 | pci_write_config16(dev, PCI_IO_BASE_UPPER16, base >> 16); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 609 | pci_write_config8(dev, PCI_IO_LIMIT, end >> 8); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 610 | pci_write_config16(dev, PCI_IO_LIMIT_UPPER16, end >> 16); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 611 | } else if (resource->index == PCI_MEMORY_BASE) { |
| 612 | /* Set the memory range. */ |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 613 | pci_write_config16(dev, PCI_MEMORY_BASE, base >> 16); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 614 | pci_write_config16(dev, PCI_MEMORY_LIMIT, end >> 16); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 615 | } else if (resource->index == PCI_PREF_MEMORY_BASE) { |
| 616 | /* Set the prefetchable memory range. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 617 | pci_write_config16(dev, PCI_PREF_MEMORY_BASE, base >> 16); |
| 618 | pci_write_config32(dev, PCI_PREF_BASE_UPPER32, base >> 32); |
| 619 | pci_write_config16(dev, PCI_PREF_MEMORY_LIMIT, end >> 16); |
| 620 | pci_write_config32(dev, PCI_PREF_LIMIT_UPPER32, end >> 32); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 621 | } else { |
| 622 | /* Don't let me think I stored the resource. */ |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 623 | resource->flags &= ~IORESOURCE_STORED; |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 624 | printk(BIOS_ERR, "ERROR: invalid resource->index %lx\n", |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 625 | resource->index); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 626 | } |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 627 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 628 | report_resource_stored(dev, resource, ""); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 629 | } |
| 630 | |
Eric Biederman | 5899fd8 | 2003-04-24 06:25:08 +0000 | [diff] [blame] | 631 | void pci_dev_set_resources(struct device *dev) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 632 | { |
Myles Watson | c25cc11 | 2010-05-21 14:33:48 +0000 | [diff] [blame] | 633 | struct resource *res; |
Myles Watson | 894a347 | 2010-06-09 22:41:35 +0000 | [diff] [blame] | 634 | struct bus *bus; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 635 | u8 line; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 636 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 637 | for (res = dev->resource_list; res; res = res->next) |
Myles Watson | c25cc11 | 2010-05-21 14:33:48 +0000 | [diff] [blame] | 638 | pci_set_resource(dev, res); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 639 | |
Myles Watson | 894a347 | 2010-06-09 22:41:35 +0000 | [diff] [blame] | 640 | for (bus = dev->link_list; bus; bus = bus->next) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 641 | if (bus->children) |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 642 | assign_resources(bus); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 643 | } |
| 644 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 645 | /* Set a default latency timer. */ |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 646 | pci_write_config8(dev, PCI_LATENCY_TIMER, 0x40); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 647 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 648 | /* Set a default secondary latency timer. */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 649 | if ((dev->hdr_type & 0x7f) == PCI_HEADER_TYPE_BRIDGE) |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 650 | pci_write_config8(dev, PCI_SEC_LATENCY_TIMER, 0x40); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 651 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 652 | /* Zero the IRQ settings. */ |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 653 | line = pci_read_config8(dev, PCI_INTERRUPT_PIN); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 654 | if (line) |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 655 | pci_write_config8(dev, PCI_INTERRUPT_LINE, 0); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 656 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 657 | /* Set the cache line size, so far 64 bytes is good for everyone. */ |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 658 | pci_write_config8(dev, PCI_CACHE_LINE_SIZE, 64 >> 2); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 659 | } |
| 660 | |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 661 | void pci_dev_enable_resources(struct device *dev) |
| 662 | { |
Eric Biederman | a9e632c | 2004-11-18 22:38:08 +0000 | [diff] [blame] | 663 | const struct pci_operations *ops; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 664 | u16 command; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 665 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 666 | /* Set the subsystem vendor and device ID for mainboard devices. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 667 | ops = ops_pci(dev); |
Eric Biederman | dbec2d4 | 2004-10-21 10:44:08 +0000 | [diff] [blame] | 668 | if (dev->on_mainboard && ops && ops->set_subsystem) { |
Duncan Laurie | 7e1c83e | 2013-08-09 07:55:10 -0700 | [diff] [blame] | 669 | if (CONFIG_SUBSYSTEM_VENDOR_ID) |
| 670 | dev->subsystem_vendor = CONFIG_SUBSYSTEM_VENDOR_ID; |
Rizwan Qureshi | fd89129 | 2017-04-26 21:00:37 +0530 | [diff] [blame] | 671 | else if (!dev->subsystem_vendor) |
| 672 | dev->subsystem_vendor = pci_read_config16(dev, |
| 673 | PCI_VENDOR_ID); |
Duncan Laurie | 7e1c83e | 2013-08-09 07:55:10 -0700 | [diff] [blame] | 674 | if (CONFIG_SUBSYSTEM_DEVICE_ID) |
| 675 | dev->subsystem_device = CONFIG_SUBSYSTEM_DEVICE_ID; |
Rizwan Qureshi | fd89129 | 2017-04-26 21:00:37 +0530 | [diff] [blame] | 676 | else if (!dev->subsystem_device) |
| 677 | dev->subsystem_device = pci_read_config16(dev, |
| 678 | PCI_DEVICE_ID); |
| 679 | |
Sven Schnelle | 9132102 | 2011-03-01 19:58:47 +0000 | [diff] [blame] | 680 | printk(BIOS_DEBUG, "%s subsystem <- %04x/%04x\n", |
| 681 | dev_path(dev), dev->subsystem_vendor, |
| 682 | dev->subsystem_device); |
| 683 | ops->set_subsystem(dev, dev->subsystem_vendor, |
| 684 | dev->subsystem_device); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 685 | } |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 686 | command = pci_read_config16(dev, PCI_COMMAND); |
| 687 | command |= dev->command; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 688 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 689 | /* v3 has |
| 690 | * command |= (PCI_COMMAND_PARITY + PCI_COMMAND_SERR); // Error check. |
| 691 | */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 692 | |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 693 | printk(BIOS_DEBUG, "%s cmd <- %02x\n", dev_path(dev), command); |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 694 | pci_write_config16(dev, PCI_COMMAND, command); |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 695 | } |
| 696 | |
| 697 | void pci_bus_enable_resources(struct device *dev) |
| 698 | { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 699 | u16 ctrl; |
| 700 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 701 | /* |
| 702 | * Enable I/O in command register if there is VGA card |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 703 | * connected with (even it does not claim I/O resource). |
| 704 | */ |
Myles Watson | 894a347 | 2010-06-09 22:41:35 +0000 | [diff] [blame] | 705 | if (dev->link_list->bridge_ctrl & PCI_BRIDGE_CTL_VGA) |
Li-Ta Lo | 515f6c7 | 2005-01-11 22:48:54 +0000 | [diff] [blame] | 706 | dev->command |= PCI_COMMAND_IO; |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 707 | ctrl = pci_read_config16(dev, PCI_BRIDGE_CONTROL); |
Myles Watson | 894a347 | 2010-06-09 22:41:35 +0000 | [diff] [blame] | 708 | ctrl |= dev->link_list->bridge_ctrl; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 709 | ctrl |= (PCI_BRIDGE_CTL_PARITY + PCI_BRIDGE_CTL_SERR); /* Error check. */ |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 710 | printk(BIOS_DEBUG, "%s bridge ctrl <- %04x\n", dev_path(dev), ctrl); |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 711 | pci_write_config16(dev, PCI_BRIDGE_CONTROL, ctrl); |
| 712 | |
| 713 | pci_dev_enable_resources(dev); |
| 714 | } |
| 715 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 716 | void pci_bus_reset(struct bus *bus) |
| 717 | { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 718 | u16 ctl; |
| 719 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 720 | ctl = pci_read_config16(bus->dev, PCI_BRIDGE_CONTROL); |
| 721 | ctl |= PCI_BRIDGE_CTL_BUS_RESET; |
| 722 | pci_write_config16(bus->dev, PCI_BRIDGE_CONTROL, ctl); |
| 723 | mdelay(10); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 724 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 725 | ctl &= ~PCI_BRIDGE_CTL_BUS_RESET; |
| 726 | pci_write_config16(bus->dev, PCI_BRIDGE_CONTROL, ctl); |
| 727 | delay(1); |
| 728 | } |
| 729 | |
Elyes HAOUAS | 88030b7 | 2018-09-20 17:26:10 +0200 | [diff] [blame] | 730 | void pci_dev_set_subsystem(struct device *dev, unsigned int vendor, |
| 731 | unsigned int device) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 732 | { |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 733 | pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 734 | ((device & 0xffff) << 16) | (vendor & 0xffff)); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 735 | } |
| 736 | |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 737 | static int should_run_oprom(struct device *dev) |
| 738 | { |
| 739 | static int should_run = -1; |
| 740 | |
| 741 | if (should_run >= 0) |
| 742 | return should_run; |
| 743 | |
Aaron Durbin | 1051025 | 2018-01-30 10:04:02 -0700 | [diff] [blame] | 744 | if (IS_ENABLED(CONFIG_ALWAYS_RUN_OPROM)) { |
| 745 | should_run = 1; |
| 746 | return should_run; |
| 747 | } |
| 748 | |
Kyösti Mälkki | 9ab1c10 | 2013-12-22 00:22:49 +0200 | [diff] [blame] | 749 | /* Don't run VGA option ROMs, unless we have to print |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 750 | * something on the screen before the kernel is loaded. |
| 751 | */ |
Furquan Shaikh | 0325dc6 | 2016-07-25 13:02:36 -0700 | [diff] [blame] | 752 | should_run = display_init_required(); |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 753 | |
Aaron Durbin | fbed9a5 | 2018-01-30 09:58:51 -0700 | [diff] [blame] | 754 | if (!should_run && IS_ENABLED(CONFIG_CHROMEOS)) |
Kyösti Mälkki | 9ab1c10 | 2013-12-22 00:22:49 +0200 | [diff] [blame] | 755 | should_run = vboot_wants_oprom(); |
Aaron Durbin | fbed9a5 | 2018-01-30 09:58:51 -0700 | [diff] [blame] | 756 | |
Kyösti Mälkki | 9ab1c10 | 2013-12-22 00:22:49 +0200 | [diff] [blame] | 757 | if (!should_run) |
| 758 | printk(BIOS_DEBUG, "Not running VGA Option ROM\n"); |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 759 | return should_run; |
| 760 | } |
| 761 | |
| 762 | static int should_load_oprom(struct device *dev) |
| 763 | { |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 764 | /* If S3_VGA_ROM_RUN is disabled, skip running VGA option |
| 765 | * ROMs when coming out of an S3 resume. |
| 766 | */ |
Kyösti Mälkki | 58ceb00 | 2014-06-20 06:21:01 +0300 | [diff] [blame] | 767 | if (!IS_ENABLED(CONFIG_S3_VGA_ROM_RUN) && acpi_is_wakeup_s3() && |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 768 | ((dev->class >> 8) == PCI_CLASS_DISPLAY_VGA)) |
| 769 | return 0; |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 770 | if (IS_ENABLED(CONFIG_ALWAYS_LOAD_OPROM)) |
| 771 | return 1; |
| 772 | if (should_run_oprom(dev)) |
| 773 | return 1; |
| 774 | |
| 775 | return 0; |
| 776 | } |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 777 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 778 | /** Default handler: only runs the relevant PCI BIOS. */ |
Li-Ta Lo | 883b879 | 2005-01-10 23:16:22 +0000 | [diff] [blame] | 779 | void pci_dev_init(struct device *dev) |
| 780 | { |
| 781 | struct rom_header *rom, *ram; |
| 782 | |
Aaron Durbin | fbed9a5 | 2018-01-30 09:58:51 -0700 | [diff] [blame] | 783 | if (!IS_ENABLED(CONFIG_VGA_ROM_RUN)) |
| 784 | return; |
| 785 | |
Vladimir Serbinenko | b32816e | 2013-12-20 17:47:19 +0100 | [diff] [blame] | 786 | /* Only execute VGA ROMs. */ |
| 787 | if (((dev->class >> 8) != PCI_CLASS_DISPLAY_VGA)) |
Myles Watson | 17aeeca | 2009-10-07 18:41:08 +0000 | [diff] [blame] | 788 | return; |
Roman Kononov | 778a42b | 2007-04-06 18:34:39 +0000 | [diff] [blame] | 789 | |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 790 | if (!should_load_oprom(dev)) |
Stefan Reinauer | 74a0efe | 2012-03-30 17:10:49 -0700 | [diff] [blame] | 791 | return; |
Martin Roth | 5dd4a2a | 2018-03-06 16:10:45 -0700 | [diff] [blame] | 792 | timestamp_add_now(TS_OPROM_INITIALIZE); |
Aaron Durbin | ce872cb | 2013-03-28 15:59:19 -0500 | [diff] [blame] | 793 | |
| 794 | rom = pci_rom_probe(dev); |
| 795 | if (rom == NULL) |
| 796 | return; |
| 797 | |
| 798 | ram = pci_rom_load(dev, rom); |
| 799 | if (ram == NULL) |
| 800 | return; |
Martin Roth | 5dd4a2a | 2018-03-06 16:10:45 -0700 | [diff] [blame] | 801 | timestamp_add_now(TS_OPROM_COPY_END); |
Aaron Durbin | ce872cb | 2013-03-28 15:59:19 -0500 | [diff] [blame] | 802 | |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 803 | if (!should_run_oprom(dev)) |
| 804 | return; |
| 805 | |
Stefan Reinauer | d98cf5b | 2008-08-01 11:25:41 +0000 | [diff] [blame] | 806 | run_bios(dev, (unsigned long)ram); |
Kyösti Mälkki | ab56b3b | 2013-11-28 16:44:51 +0200 | [diff] [blame] | 807 | gfx_set_init_done(1); |
| 808 | printk(BIOS_DEBUG, "VGA Option ROM was run\n"); |
Martin Roth | 5dd4a2a | 2018-03-06 16:10:45 -0700 | [diff] [blame] | 809 | timestamp_add_now(TS_OPROM_END); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 810 | } |
Li-Ta Lo | 883b879 | 2005-01-10 23:16:22 +0000 | [diff] [blame] | 811 | |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 812 | /** Default device operation for PCI devices */ |
Subrata Banik | ffc790b | 2017-12-11 10:29:49 +0530 | [diff] [blame] | 813 | struct pci_operations pci_dev_ops_pci = { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 814 | .set_subsystem = pci_dev_set_subsystem, |
| 815 | }; |
| 816 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 817 | struct device_operations default_pci_ops_dev = { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 818 | .read_resources = pci_dev_read_resources, |
| 819 | .set_resources = pci_dev_set_resources, |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 820 | .enable_resources = pci_dev_enable_resources, |
Patrick Rudolph | a5c2ac6 | 2016-03-31 20:04:23 +0200 | [diff] [blame] | 821 | #if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) |
| 822 | .write_acpi_tables = pci_rom_write_acpi_tables, |
Patrick Rudolph | 00c0cd2 | 2017-06-06 19:30:55 +0200 | [diff] [blame] | 823 | .acpi_fill_ssdt_generator = pci_rom_ssdt, |
Patrick Rudolph | a5c2ac6 | 2016-03-31 20:04:23 +0200 | [diff] [blame] | 824 | #endif |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 825 | .init = pci_dev_init, |
| 826 | .scan_bus = 0, |
| 827 | .enable = 0, |
| 828 | .ops_pci = &pci_dev_ops_pci, |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 829 | }; |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 830 | |
| 831 | /** Default device operations for PCI bridges */ |
Eric Biederman | a9e632c | 2004-11-18 22:38:08 +0000 | [diff] [blame] | 832 | static struct pci_operations pci_bus_ops_pci = { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 833 | .set_subsystem = 0, |
| 834 | }; |
Li-Ta Lo | 883b879 | 2005-01-10 23:16:22 +0000 | [diff] [blame] | 835 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 836 | struct device_operations default_pci_ops_bus = { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 837 | .read_resources = pci_bus_read_resources, |
| 838 | .set_resources = pci_dev_set_resources, |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 839 | .enable_resources = pci_bus_enable_resources, |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 840 | .init = 0, |
| 841 | .scan_bus = pci_scan_bridge, |
| 842 | .enable = 0, |
| 843 | .reset_bus = pci_bus_reset, |
| 844 | .ops_pci = &pci_bus_ops_pci, |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 845 | }; |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 846 | |
| 847 | /** |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 848 | * Detect the type of downstream bridge. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 849 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 850 | * This function is a heuristic to detect which type of bus is downstream |
| 851 | * of a PCI-to-PCI bridge. This functions by looking for various capability |
| 852 | * blocks to figure out the type of downstream bridge. PCI-X, PCI-E, and |
| 853 | * Hypertransport all seem to have appropriate capabilities. |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 854 | * |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 855 | * When only a PCI-Express capability is found the type is examined to see |
| 856 | * which type of bridge we have. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 857 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 858 | * @param dev Pointer to the device structure of the bridge. |
| 859 | * @return Appropriate bridge operations. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 860 | */ |
Aaron Durbin | c30d913 | 2017-08-07 16:55:43 -0600 | [diff] [blame] | 861 | static struct device_operations *get_pci_bridge_ops(struct device *dev) |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 862 | { |
Martin Roth | b3b114c | 2017-06-24 14:00:01 -0600 | [diff] [blame] | 863 | #if IS_ENABLED(CONFIG_PCIX_PLUGIN_SUPPORT) |
Ronald G. Minnich | 78a1667 | 2012-11-29 16:28:21 -0800 | [diff] [blame] | 864 | unsigned int pcixpos; |
| 865 | pcixpos = pci_find_capability(dev, PCI_CAP_ID_PCIX); |
| 866 | if (pcixpos) { |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 867 | printk(BIOS_DEBUG, "%s subordinate bus PCI-X\n", dev_path(dev)); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 868 | return &default_pcix_ops_bus; |
| 869 | } |
| 870 | #endif |
Martin Roth | b3b114c | 2017-06-24 14:00:01 -0600 | [diff] [blame] | 871 | #if IS_ENABLED(CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT) |
Ronald G. Minnich | 78a1667 | 2012-11-29 16:28:21 -0800 | [diff] [blame] | 872 | unsigned int htpos = 0; |
| 873 | while ((htpos = pci_find_next_capability(dev, PCI_CAP_ID_HT, htpos))) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 874 | u16 flags; |
Ronald G. Minnich | 78a1667 | 2012-11-29 16:28:21 -0800 | [diff] [blame] | 875 | flags = pci_read_config16(dev, htpos + PCI_CAP_FLAGS); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 876 | if ((flags >> 13) == 1) { |
| 877 | /* Host or Secondary Interface */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 878 | printk(BIOS_DEBUG, "%s subordinate bus HT\n", |
| 879 | dev_path(dev)); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 880 | return &default_ht_ops_bus; |
| 881 | } |
| 882 | } |
| 883 | #endif |
Martin Roth | b3b114c | 2017-06-24 14:00:01 -0600 | [diff] [blame] | 884 | #if IS_ENABLED(CONFIG_PCIEXP_PLUGIN_SUPPORT) |
Ronald G. Minnich | 78a1667 | 2012-11-29 16:28:21 -0800 | [diff] [blame] | 885 | unsigned int pciexpos; |
| 886 | pciexpos = pci_find_capability(dev, PCI_CAP_ID_PCIE); |
| 887 | if (pciexpos) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 888 | u16 flags; |
Ronald G. Minnich | 78a1667 | 2012-11-29 16:28:21 -0800 | [diff] [blame] | 889 | flags = pci_read_config16(dev, pciexpos + PCI_EXP_FLAGS); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 890 | switch ((flags & PCI_EXP_FLAGS_TYPE) >> 4) { |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 891 | case PCI_EXP_TYPE_ROOT_PORT: |
| 892 | case PCI_EXP_TYPE_UPSTREAM: |
| 893 | case PCI_EXP_TYPE_DOWNSTREAM: |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 894 | printk(BIOS_DEBUG, "%s subordinate bus PCI Express\n", |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 895 | dev_path(dev)); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 896 | return &default_pciexp_ops_bus; |
| 897 | case PCI_EXP_TYPE_PCI_BRIDGE: |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 898 | printk(BIOS_DEBUG, "%s subordinate PCI\n", |
| 899 | dev_path(dev)); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 900 | return &default_pci_ops_bus; |
| 901 | default: |
| 902 | break; |
| 903 | } |
| 904 | } |
| 905 | #endif |
| 906 | return &default_pci_ops_bus; |
| 907 | } |
| 908 | |
| 909 | /** |
Vadim Bendebury | 8049fc9 | 2012-04-24 12:53:19 -0700 | [diff] [blame] | 910 | * Check if a device id matches a PCI driver entry. |
| 911 | * |
| 912 | * The driver entry can either point at a zero terminated array of acceptable |
| 913 | * device IDs, or include a single device ID. |
| 914 | * |
Martin Roth | 98b698c | 2015-01-06 21:02:52 -0700 | [diff] [blame] | 915 | * @param driver pointer to the PCI driver entry being checked |
| 916 | * @param device_id PCI device ID of the device being matched |
Vadim Bendebury | 8049fc9 | 2012-04-24 12:53:19 -0700 | [diff] [blame] | 917 | */ |
| 918 | static int device_id_match(struct pci_driver *driver, unsigned short device_id) |
| 919 | { |
| 920 | if (driver->devices) { |
| 921 | unsigned short check_id; |
| 922 | const unsigned short *device_list = driver->devices; |
| 923 | while ((check_id = *device_list++) != 0) |
| 924 | if (check_id == device_id) |
| 925 | return 1; |
| 926 | } |
| 927 | |
| 928 | return (driver->device == device_id); |
| 929 | } |
| 930 | |
| 931 | /** |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 932 | * Set up PCI device operation. |
| 933 | * |
| 934 | * Check if it already has a driver. If not, use find_device_operations(), |
| 935 | * or set to a default based on type. |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 936 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 937 | * @param dev Pointer to the device whose pci_ops you want to set. |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 938 | * @see pci_drivers |
| 939 | */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 940 | static void set_pci_ops(struct device *dev) |
| 941 | { |
| 942 | struct pci_driver *driver; |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 943 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 944 | if (dev->ops) |
| 945 | return; |
| 946 | |
| 947 | /* |
| 948 | * Look through the list of setup drivers and find one for |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 949 | * this PCI device. |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 950 | */ |
Aaron Durbin | 0375815 | 2015-09-03 17:23:08 -0500 | [diff] [blame] | 951 | for (driver = &_pci_drivers[0]; driver != &_epci_drivers[0]; driver++) { |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 952 | if ((driver->vendor == dev->vendor) && |
Vadim Bendebury | 8049fc9 | 2012-04-24 12:53:19 -0700 | [diff] [blame] | 953 | device_id_match(driver, dev->device)) { |
Uwe Hermann | 312673c | 2009-10-27 21:49:33 +0000 | [diff] [blame] | 954 | dev->ops = (struct device_operations *)driver->ops; |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 955 | printk(BIOS_SPEW, "%s [%04x/%04x] %sops\n", |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 956 | dev_path(dev), driver->vendor, driver->device, |
| 957 | (driver->ops->scan_bus ? "bus " : "")); |
Eric Biederman | 5899fd8 | 2003-04-24 06:25:08 +0000 | [diff] [blame] | 958 | return; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 959 | } |
| 960 | } |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 961 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 962 | /* If I don't have a specific driver use the default operations. */ |
| 963 | switch (dev->hdr_type & 0x7f) { /* Header type */ |
| 964 | case PCI_HEADER_TYPE_NORMAL: |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 965 | if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) |
| 966 | goto bad; |
| 967 | dev->ops = &default_pci_ops_dev; |
| 968 | break; |
| 969 | case PCI_HEADER_TYPE_BRIDGE: |
| 970 | if ((dev->class >> 8) != PCI_CLASS_BRIDGE_PCI) |
| 971 | goto bad; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 972 | dev->ops = get_pci_bridge_ops(dev); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 973 | break; |
Martin Roth | b3b114c | 2017-06-24 14:00:01 -0600 | [diff] [blame] | 974 | #if IS_ENABLED(CONFIG_CARDBUS_PLUGIN_SUPPORT) |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 975 | case PCI_HEADER_TYPE_CARDBUS: |
| 976 | dev->ops = &default_cardbus_ops_bus; |
| 977 | break; |
| 978 | #endif |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 979 | default: |
| 980 | bad: |
Li-Ta Lo | 69c5a90 | 2004-04-29 20:08:54 +0000 | [diff] [blame] | 981 | if (dev->enabled) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 982 | printk(BIOS_ERR, "%s [%04x/%04x/%06x] has unknown " |
| 983 | "header type %02x, ignoring.\n", dev_path(dev), |
| 984 | dev->vendor, dev->device, |
| 985 | dev->class >> 8, dev->hdr_type); |
Eric Biederman | 83b991a | 2003-10-11 06:20:25 +0000 | [diff] [blame] | 986 | } |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 987 | } |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 988 | } |
| 989 | |
| 990 | /** |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 991 | * See if we have already allocated a device structure for a given devfn. |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 992 | * |
Kyösti Mälkki | 8712aa1 | 2019-01-09 11:31:25 +0200 | [diff] [blame] | 993 | * Given a PCI bus structure and a devfn number, find the device structure |
| 994 | * corresponding to the devfn, if present. Then move the device structure |
| 995 | * as the last child on the bus. |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 996 | * |
Kyösti Mälkki | 8712aa1 | 2019-01-09 11:31:25 +0200 | [diff] [blame] | 997 | * @param bus Pointer to the bus structure. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 998 | * @param devfn A device/function number. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 999 | * @return Pointer to the device structure found or NULL if we have not |
Li-Ta Lo | 3a81285 | 2004-12-03 22:39:34 +0000 | [diff] [blame] | 1000 | * allocated a device for this devfn yet. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1001 | */ |
Kyösti Mälkki | 8712aa1 | 2019-01-09 11:31:25 +0200 | [diff] [blame] | 1002 | static struct device *pci_scan_get_dev(struct bus *bus, unsigned int devfn) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1003 | { |
Kyösti Mälkki | 8712aa1 | 2019-01-09 11:31:25 +0200 | [diff] [blame] | 1004 | struct device *dev, **prev; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1005 | |
Kyösti Mälkki | 8712aa1 | 2019-01-09 11:31:25 +0200 | [diff] [blame] | 1006 | prev = &bus->children; |
| 1007 | for (dev = bus->children; dev; dev = dev->sibling) { |
| 1008 | if (dev->path.type == DEVICE_PATH_PCI) { |
| 1009 | if (dev->path.pci.devfn == devfn) { |
| 1010 | /* Unlink from the list. */ |
| 1011 | *prev = dev->sibling; |
| 1012 | dev->sibling = NULL; |
| 1013 | break; |
| 1014 | } |
| 1015 | } else { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1016 | printk(BIOS_ERR, "child %s not a PCI device\n", |
Kyösti Mälkki | 8712aa1 | 2019-01-09 11:31:25 +0200 | [diff] [blame] | 1017 | dev_path(dev)); |
Eric Biederman | ad1b35a | 2003-10-14 02:36:51 +0000 | [diff] [blame] | 1018 | } |
Kyösti Mälkki | 8712aa1 | 2019-01-09 11:31:25 +0200 | [diff] [blame] | 1019 | prev = &dev->sibling; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1020 | } |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1021 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1022 | /* |
| 1023 | * Just like alloc_dev() add the device to the list of devices on the |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1024 | * bus. When the list of devices was formed we removed all of the |
| 1025 | * parents children, and now we are interleaving static and dynamic |
| 1026 | * devices in order on the bus. |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 1027 | */ |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1028 | if (dev) { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1029 | struct device *child; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1030 | |
Kyösti Mälkki | 8712aa1 | 2019-01-09 11:31:25 +0200 | [diff] [blame] | 1031 | /* Find the last child on the bus. */ |
| 1032 | for (child = bus->children; child && child->sibling;) |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1033 | child = child->sibling; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1034 | |
Kyösti Mälkki | 8712aa1 | 2019-01-09 11:31:25 +0200 | [diff] [blame] | 1035 | /* Place the device as last on the bus. */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1036 | if (child) |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1037 | child->sibling = dev; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1038 | else |
Kyösti Mälkki | 8712aa1 | 2019-01-09 11:31:25 +0200 | [diff] [blame] | 1039 | bus->children = dev; |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1040 | } |
| 1041 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1042 | return dev; |
| 1043 | } |
| 1044 | |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1045 | /** |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 1046 | * Scan a PCI bus. |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 1047 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1048 | * Determine the existence of a given PCI device. Allocate a new struct device |
| 1049 | * if dev==NULL was passed in and the device exists in hardware. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1050 | * |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 1051 | * @param dev Pointer to the dev structure. |
| 1052 | * @param bus Pointer to the bus structure. |
| 1053 | * @param devfn A device/function number to look at. |
| 1054 | * @return The device structure for the device (if found), NULL otherwise. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1055 | */ |
Aaron Durbin | c30d913 | 2017-08-07 16:55:43 -0600 | [diff] [blame] | 1056 | struct device *pci_probe_dev(struct device *dev, struct bus *bus, |
| 1057 | unsigned int devfn) |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1058 | { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1059 | u32 id, class; |
| 1060 | u8 hdr_type; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1061 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1062 | /* Detect if a device is present. */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1063 | if (!dev) { |
| 1064 | struct device dummy; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1065 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1066 | dummy.bus = bus; |
| 1067 | dummy.path.type = DEVICE_PATH_PCI; |
Stefan Reinauer | 2b34db8 | 2009-02-28 20:10:20 +0000 | [diff] [blame] | 1068 | dummy.path.pci.devfn = devfn; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1069 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1070 | id = pci_read_config32(&dummy, PCI_VENDOR_ID); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1071 | /* |
| 1072 | * Have we found something? Some broken boards return 0 if a |
| 1073 | * slot is empty, but the expected answer is 0xffffffff. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1074 | */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1075 | if (id == 0xffffffff) |
Stefan Reinauer | 7355c75 | 2010-04-02 16:30:25 +0000 | [diff] [blame] | 1076 | return NULL; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1077 | |
Stefan Reinauer | 7355c75 | 2010-04-02 16:30:25 +0000 | [diff] [blame] | 1078 | if ((id == 0x00000000) || (id == 0x0000ffff) || |
| 1079 | (id == 0xffff0000)) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1080 | printk(BIOS_SPEW, "%s, bad id 0x%x\n", |
| 1081 | dev_path(&dummy), id); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1082 | return NULL; |
| 1083 | } |
| 1084 | dev = alloc_dev(bus, &dummy.path); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1085 | } else { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1086 | /* |
| 1087 | * Enable/disable the device. Once we have found the device- |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1088 | * specific operations this operations we will disable the |
| 1089 | * device with those as well. |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1090 | * |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1091 | * This is geared toward devices that have subfunctions |
| 1092 | * that do not show up by default. |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1093 | * |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1094 | * If a device is a stuff option on the motherboard |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1095 | * it may be absent and enable_dev() must cope. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1096 | */ |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1097 | /* Run the magic enable sequence for the device. */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1098 | if (dev->chip_ops && dev->chip_ops->enable_dev) |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1099 | dev->chip_ops->enable_dev(dev); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1100 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1101 | /* Now read the vendor and device ID. */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1102 | id = pci_read_config32(dev, PCI_VENDOR_ID); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1103 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1104 | /* |
| 1105 | * If the device does not have a PCI ID disable it. Possibly |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1106 | * this is because we have already disabled the device. But |
| 1107 | * this also handles optional devices that may not always |
| 1108 | * show up. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1109 | */ |
| 1110 | /* If the chain is fully enumerated quit */ |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1111 | if ((id == 0xffffffff) || (id == 0x00000000) || |
| 1112 | (id == 0x0000ffff) || (id == 0xffff0000)) { |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1113 | if (dev->enabled) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1114 | printk(BIOS_INFO, "PCI: Static device %s not " |
| 1115 | "found, disabling it.\n", dev_path(dev)); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1116 | dev->enabled = 0; |
| 1117 | } |
| 1118 | return dev; |
| 1119 | } |
| 1120 | } |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1121 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1122 | /* Read the rest of the PCI configuration information. */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1123 | hdr_type = pci_read_config8(dev, PCI_HEADER_TYPE); |
| 1124 | class = pci_read_config32(dev, PCI_CLASS_REVISION); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1125 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1126 | /* Store the interesting information in the device structure. */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1127 | dev->vendor = id & 0xffff; |
| 1128 | dev->device = (id >> 16) & 0xffff; |
| 1129 | dev->hdr_type = hdr_type; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1130 | |
| 1131 | /* Class code, the upper 3 bytes of PCI_CLASS_REVISION. */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1132 | dev->class = class >> 8; |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1133 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1134 | /* Architectural/System devices always need to be bus masters. */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1135 | if ((dev->class >> 16) == PCI_BASE_CLASS_SYSTEM) |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1136 | dev->command |= PCI_COMMAND_MASTER; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1137 | |
| 1138 | /* |
| 1139 | * Look at the vendor and device ID, or at least the header type and |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1140 | * class and figure out which set of configuration methods to use. |
| 1141 | * Unless we already have some PCI ops. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1142 | */ |
| 1143 | set_pci_ops(dev); |
| 1144 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1145 | /* Now run the magic enable/disable sequence for the device. */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1146 | if (dev->ops && dev->ops->enable) |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1147 | dev->ops->enable(dev); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1148 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1149 | /* Display the device. */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1150 | printk(BIOS_DEBUG, "%s [%04x/%04x] %s%s\n", dev_path(dev), |
| 1151 | dev->vendor, dev->device, dev->enabled ? "enabled" : "disabled", |
| 1152 | dev->ops ? "" : " No operations"); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1153 | |
| 1154 | return dev; |
| 1155 | } |
| 1156 | |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1157 | /** |
Kyösti Mälkki | c73acdb | 2013-06-15 17:16:56 +0300 | [diff] [blame] | 1158 | * Test for match between romstage and ramstage device instance. |
| 1159 | * |
| 1160 | * @param dev Pointer to the device structure. |
| 1161 | * @param sdev Simple device model identifier, created with PCI_DEV(). |
| 1162 | * @return Non-zero if bus:dev.fn of device matches. |
| 1163 | */ |
Aaron Durbin | c30d913 | 2017-08-07 16:55:43 -0600 | [diff] [blame] | 1164 | unsigned int pci_match_simple_dev(struct device *dev, pci_devfn_t sdev) |
Kyösti Mälkki | c73acdb | 2013-06-15 17:16:56 +0300 | [diff] [blame] | 1165 | { |
| 1166 | return dev->bus->secondary == PCI_DEV2SEGBUS(sdev) && |
| 1167 | dev->path.pci.devfn == PCI_DEV2DEVFN(sdev); |
| 1168 | } |
| 1169 | |
| 1170 | /** |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 1171 | * Scan a PCI bus. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1172 | * |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 1173 | * Determine the existence of devices and bridges on a PCI bus. If there are |
| 1174 | * bridges on the bus, recursively scan the buses behind the bridges. |
| 1175 | * |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 1176 | * @param bus Pointer to the bus structure. |
| 1177 | * @param min_devfn Minimum devfn to look at in the scan, usually 0x00. |
| 1178 | * @param max_devfn Maximum devfn to look at in the scan, usually 0xff. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1179 | */ |
Kyösti Mälkki | de271a8 | 2015-03-18 13:09:47 +0200 | [diff] [blame] | 1180 | void pci_scan_bus(struct bus *bus, unsigned min_devfn, |
| 1181 | unsigned max_devfn) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1182 | { |
| 1183 | unsigned int devfn; |
Kyösti Mälkki | 8712aa1 | 2019-01-09 11:31:25 +0200 | [diff] [blame] | 1184 | struct device *dev, **prev; |
| 1185 | int once = 0; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1186 | |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 1187 | printk(BIOS_DEBUG, "PCI: pci_scan_bus for bus %02x\n", bus->secondary); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1188 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1189 | /* Maximum sane devfn is 0xFF. */ |
Juhana Helovuo | 50b78b6 | 2010-09-13 14:43:02 +0000 | [diff] [blame] | 1190 | if (max_devfn > 0xff) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1191 | printk(BIOS_ERR, "PCI: pci_scan_bus limits devfn %x - " |
| 1192 | "devfn %x\n", min_devfn, max_devfn); |
| 1193 | printk(BIOS_ERR, "PCI: pci_scan_bus upper limit too big. " |
| 1194 | "Using 0xff.\n"); |
Juhana Helovuo | 50b78b6 | 2010-09-13 14:43:02 +0000 | [diff] [blame] | 1195 | max_devfn=0xff; |
| 1196 | } |
| 1197 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1198 | post_code(0x24); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1199 | |
| 1200 | /* |
| 1201 | * Probe all devices/functions on this bus with some optimization for |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1202 | * non-existence and single function devices. |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 1203 | */ |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1204 | for (devfn = min_devfn; devfn <= max_devfn; devfn++) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1205 | /* First thing setup the device structure. */ |
Kyösti Mälkki | 8712aa1 | 2019-01-09 11:31:25 +0200 | [diff] [blame] | 1206 | dev = pci_scan_get_dev(bus, devfn); |
Li-Ta Lo | 9782f75 | 2004-05-05 21:15:42 +0000 | [diff] [blame] | 1207 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1208 | /* See if a device is present and setup the device structure. */ |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1209 | dev = pci_probe_dev(dev, bus, devfn); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 1210 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1211 | /* |
| 1212 | * If this is not a multi function device, or the device is |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1213 | * not present don't waste time probing another function. |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1214 | * Skip to next device. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1215 | */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1216 | if ((PCI_FUNC(devfn) == 0x00) && (!dev |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1217 | || (dev->enabled && ((dev->hdr_type & 0x80) != 0x80)))) { |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1218 | devfn += 0x07; |
| 1219 | } |
| 1220 | } |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1221 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1222 | post_code(0x25); |
| 1223 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1224 | /* |
| 1225 | * Warn if any leftover static devices are are found. |
| 1226 | * There's probably a problem in devicetree.cb. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1227 | */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1228 | |
Kyösti Mälkki | 8712aa1 | 2019-01-09 11:31:25 +0200 | [diff] [blame] | 1229 | prev = &bus->children; |
| 1230 | for (dev = bus->children; dev; dev = dev->sibling) { |
| 1231 | /* If we read valid vendor id, it is not leftover device. */ |
| 1232 | if (dev->vendor != 0) { |
| 1233 | prev = &dev->sibling; |
| 1234 | continue; |
| 1235 | } |
| 1236 | |
| 1237 | /* Unlink it from list. */ |
| 1238 | *prev = dev->sibling; |
| 1239 | |
| 1240 | if (!once++) |
| 1241 | printk(BIOS_WARNING, "PCI: Leftover static devices:\n"); |
| 1242 | printk(BIOS_WARNING, "%s\n", dev_path(dev)); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1243 | } |
| 1244 | |
Kyösti Mälkki | 8712aa1 | 2019-01-09 11:31:25 +0200 | [diff] [blame] | 1245 | if (once) |
| 1246 | printk(BIOS_WARNING, "PCI: Check your devicetree.cb.\n"); |
| 1247 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1248 | /* |
| 1249 | * For all children that implement scan_bus() (i.e. bridges) |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 1250 | * scan the bus behind that child. |
| 1251 | */ |
Kyösti Mälkki | de271a8 | 2015-03-18 13:09:47 +0200 | [diff] [blame] | 1252 | |
Kyösti Mälkki | 2d2367c | 2015-02-20 21:28:31 +0200 | [diff] [blame] | 1253 | scan_bridges(bus); |
Kyösti Mälkki | de271a8 | 2015-03-18 13:09:47 +0200 | [diff] [blame] | 1254 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1255 | /* |
| 1256 | * We've scanned the bus and so we know all about what's on the other |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1257 | * side of any bridges that may be on this bus plus any devices. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1258 | * Return how far we've got finding sub-buses. |
| 1259 | */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1260 | post_code(0x55); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1261 | } |
| 1262 | |
Kyösti Mälkki | 3345240 | 2015-02-23 06:58:26 +0200 | [diff] [blame] | 1263 | typedef enum { |
| 1264 | PCI_ROUTE_CLOSE, |
| 1265 | PCI_ROUTE_SCAN, |
| 1266 | PCI_ROUTE_FINAL, |
| 1267 | } scan_state; |
| 1268 | |
| 1269 | static void pci_bridge_route(struct bus *link, scan_state state) |
| 1270 | { |
| 1271 | struct device *dev = link->dev; |
| 1272 | struct bus *parent = dev->bus; |
| 1273 | u32 reg, buses = 0; |
| 1274 | |
Kyösti Mälkki | 757c8b4 | 2015-02-23 06:58:26 +0200 | [diff] [blame] | 1275 | if (state == PCI_ROUTE_SCAN) { |
| 1276 | link->secondary = parent->subordinate + 1; |
| 1277 | link->subordinate = link->secondary; |
| 1278 | } |
| 1279 | |
Kyösti Mälkki | 3345240 | 2015-02-23 06:58:26 +0200 | [diff] [blame] | 1280 | if (state == PCI_ROUTE_CLOSE) { |
| 1281 | buses |= 0xfeff << 8; |
| 1282 | } else if (state == PCI_ROUTE_SCAN) { |
Timothy Pearson | 7d8a478 | 2015-10-24 20:34:57 -0500 | [diff] [blame] | 1283 | buses |= parent->secondary & 0xff; |
Kyösti Mälkki | 3345240 | 2015-02-23 06:58:26 +0200 | [diff] [blame] | 1284 | buses |= ((u32) link->secondary & 0xff) << 8; |
Kyösti Mälkki | 757c8b4 | 2015-02-23 06:58:26 +0200 | [diff] [blame] | 1285 | buses |= 0xff << 16; /* MAX PCI_BUS number here */ |
Kyösti Mälkki | 3345240 | 2015-02-23 06:58:26 +0200 | [diff] [blame] | 1286 | } else if (state == PCI_ROUTE_FINAL) { |
| 1287 | buses |= parent->secondary & 0xff; |
| 1288 | buses |= ((u32) link->secondary & 0xff) << 8; |
| 1289 | buses |= ((u32) link->subordinate & 0xff) << 16; |
| 1290 | } |
| 1291 | |
| 1292 | if (state == PCI_ROUTE_SCAN) { |
| 1293 | /* Clear all status bits and turn off memory, I/O and master enables. */ |
| 1294 | link->bridge_cmd = pci_read_config16(dev, PCI_COMMAND); |
| 1295 | pci_write_config16(dev, PCI_COMMAND, 0x0000); |
| 1296 | pci_write_config16(dev, PCI_STATUS, 0xffff); |
| 1297 | } |
| 1298 | |
| 1299 | /* |
| 1300 | * Configure the bus numbers for this bridge: the configuration |
| 1301 | * transactions will not be propagated by the bridge if it is not |
| 1302 | * correctly configured. |
| 1303 | */ |
| 1304 | |
| 1305 | reg = pci_read_config32(dev, PCI_PRIMARY_BUS); |
| 1306 | reg &= 0xff000000; |
| 1307 | reg |= buses; |
| 1308 | pci_write_config32(dev, PCI_PRIMARY_BUS, reg); |
| 1309 | |
| 1310 | if (state == PCI_ROUTE_FINAL) { |
| 1311 | pci_write_config16(dev, PCI_COMMAND, link->bridge_cmd); |
Kyösti Mälkki | 757c8b4 | 2015-02-23 06:58:26 +0200 | [diff] [blame] | 1312 | parent->subordinate = link->subordinate; |
Kyösti Mälkki | 3345240 | 2015-02-23 06:58:26 +0200 | [diff] [blame] | 1313 | } |
| 1314 | } |
| 1315 | |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 1316 | /** |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 1317 | * Scan a PCI bridge and the buses behind the bridge. |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 1318 | * |
| 1319 | * Determine the existence of buses behind the bridge. Set up the bridge |
| 1320 | * according to the result of the scan. |
| 1321 | * |
| 1322 | * This function is the default scan_bus() method for PCI bridge devices. |
| 1323 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1324 | * @param dev Pointer to the bridge device. |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 1325 | * @param do_scan_bus TODO |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1326 | */ |
Kyösti Mälkki | 580e722 | 2015-03-19 21:04:23 +0200 | [diff] [blame] | 1327 | void do_pci_scan_bridge(struct device *dev, |
Kyösti Mälkki | de271a8 | 2015-03-18 13:09:47 +0200 | [diff] [blame] | 1328 | void (*do_scan_bus) (struct bus * bus, |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1329 | unsigned min_devfn, |
Kyösti Mälkki | de271a8 | 2015-03-18 13:09:47 +0200 | [diff] [blame] | 1330 | unsigned max_devfn)) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1331 | { |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1332 | struct bus *bus; |
Eric Biederman | 83b991a | 2003-10-11 06:20:25 +0000 | [diff] [blame] | 1333 | |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 1334 | printk(BIOS_SPEW, "%s for %s\n", __func__, dev_path(dev)); |
Li-Ta Lo | 3a81285 | 2004-12-03 22:39:34 +0000 | [diff] [blame] | 1335 | |
Myles Watson | 894a347 | 2010-06-09 22:41:35 +0000 | [diff] [blame] | 1336 | if (dev->link_list == NULL) { |
| 1337 | struct bus *link; |
| 1338 | link = malloc(sizeof(*link)); |
| 1339 | if (link == NULL) |
| 1340 | die("Couldn't allocate a link!\n"); |
| 1341 | memset(link, 0, sizeof(*link)); |
| 1342 | link->dev = dev; |
| 1343 | dev->link_list = link; |
| 1344 | } |
| 1345 | |
| 1346 | bus = dev->link_list; |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1347 | |
Kyösti Mälkki | 3345240 | 2015-02-23 06:58:26 +0200 | [diff] [blame] | 1348 | pci_bridge_route(bus, PCI_ROUTE_SCAN); |
Li-Ta Lo | 3a81285 | 2004-12-03 22:39:34 +0000 | [diff] [blame] | 1349 | |
Kyösti Mälkki | de271a8 | 2015-03-18 13:09:47 +0200 | [diff] [blame] | 1350 | do_scan_bus(bus, 0x00, 0xff); |
Kyösti Mälkki | 3345240 | 2015-02-23 06:58:26 +0200 | [diff] [blame] | 1351 | |
| 1352 | pci_bridge_route(bus, PCI_ROUTE_FINAL); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1353 | } |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 1354 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1355 | /** |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 1356 | * Scan a PCI bridge and the buses behind the bridge. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1357 | * |
| 1358 | * Determine the existence of buses behind the bridge. Set up the bridge |
| 1359 | * according to the result of the scan. |
| 1360 | * |
| 1361 | * This function is the default scan_bus() method for PCI bridge devices. |
| 1362 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1363 | * @param dev Pointer to the bridge device. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1364 | */ |
Kyösti Mälkki | 580e722 | 2015-03-19 21:04:23 +0200 | [diff] [blame] | 1365 | void pci_scan_bridge(struct device *dev) |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1366 | { |
Kyösti Mälkki | 580e722 | 2015-03-19 21:04:23 +0200 | [diff] [blame] | 1367 | do_pci_scan_bridge(dev, pci_scan_bus); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1368 | } |
| 1369 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1370 | /** |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 1371 | * Scan a PCI domain. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1372 | * |
| 1373 | * This function is the default scan_bus() method for PCI domains. |
| 1374 | * |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 1375 | * @param dev Pointer to the domain. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1376 | */ |
Aaron Durbin | c30d913 | 2017-08-07 16:55:43 -0600 | [diff] [blame] | 1377 | void pci_domain_scan_bus(struct device *dev) |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1378 | { |
Kyösti Mälkki | 6f37017 | 2015-03-19 15:26:52 +0200 | [diff] [blame] | 1379 | struct bus *link = dev->link_list; |
Kyösti Mälkki | de271a8 | 2015-03-18 13:09:47 +0200 | [diff] [blame] | 1380 | pci_scan_bus(link, PCI_DEVFN(0, 0), 0xff); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1381 | } |
| 1382 | |
Mike Loptien | 0f5cf5e | 2014-05-12 21:46:31 -0600 | [diff] [blame] | 1383 | /** |
| 1384 | * Take an INT_PIN number (0, 1 - 4) and convert |
| 1385 | * it to a string ("NO PIN", "PIN A" - "PIN D") |
| 1386 | * |
| 1387 | * @param pin PCI Interrupt Pin number (0, 1 - 4) |
| 1388 | * @return A string corresponding to the pin number or "Invalid" |
| 1389 | */ |
| 1390 | const char *pin_to_str(int pin) |
| 1391 | { |
| 1392 | const char *str[5] = { |
| 1393 | "NO PIN", |
| 1394 | "PIN A", |
| 1395 | "PIN B", |
| 1396 | "PIN C", |
| 1397 | "PIN D", |
| 1398 | }; |
| 1399 | |
| 1400 | if (pin >= 0 && pin <= 4) |
| 1401 | return str[pin]; |
| 1402 | else |
| 1403 | return "Invalid PIN, not 0 - 4"; |
| 1404 | } |
| 1405 | |
| 1406 | /** |
| 1407 | * Get the PCI INT_PIN swizzle for a device defined as: |
| 1408 | * pin_parent = (pin_child + devn_child) % 4 + 1 |
| 1409 | * where PIN A = 1 ... PIN_D = 4 |
| 1410 | * |
| 1411 | * Given a PCI device structure 'dev', find the interrupt pin |
| 1412 | * that will be triggered on its parent bridge device when |
| 1413 | * generating an interrupt. For example: Device 1:3.2 may |
| 1414 | * use INT_PIN A but will trigger PIN D on its parent bridge |
| 1415 | * device. In this case, this function will return 4 (PIN D). |
| 1416 | * |
| 1417 | * @param dev A PCI device structure to swizzle interrupt pins for |
Martin Roth | 32bc6b6 | 2015-01-04 16:54:35 -0700 | [diff] [blame] | 1418 | * @param *parent_bridge The PCI device structure for the bridge |
Mike Loptien | 0f5cf5e | 2014-05-12 21:46:31 -0600 | [diff] [blame] | 1419 | * device 'dev' is attached to |
| 1420 | * @return The interrupt pin number (1 - 4) that 'dev' will |
| 1421 | * trigger when generating an interrupt |
| 1422 | */ |
Aaron Durbin | c30d913 | 2017-08-07 16:55:43 -0600 | [diff] [blame] | 1423 | static int swizzle_irq_pins(struct device *dev, struct device **parent_bridge) |
Mike Loptien | 0f5cf5e | 2014-05-12 21:46:31 -0600 | [diff] [blame] | 1424 | { |
Aaron Durbin | c30d913 | 2017-08-07 16:55:43 -0600 | [diff] [blame] | 1425 | struct device *parent; /* Our current device's parent device */ |
| 1426 | struct device *child; /* The child device of the parent */ |
Mike Loptien | 0f5cf5e | 2014-05-12 21:46:31 -0600 | [diff] [blame] | 1427 | uint8_t parent_bus = 0; /* Parent Bus number */ |
| 1428 | uint16_t parent_devfn = 0; /* Parent Device and Function number */ |
| 1429 | uint16_t child_devfn = 0; /* Child Device and Function number */ |
| 1430 | uint8_t swizzled_pin = 0; /* Pin swizzled across a bridge */ |
| 1431 | |
| 1432 | /* Start with PIN A = 0 ... D = 3 */ |
| 1433 | swizzled_pin = pci_read_config8(dev, PCI_INTERRUPT_PIN) - 1; |
| 1434 | |
| 1435 | /* While our current device has parent devices */ |
| 1436 | child = dev; |
| 1437 | for (parent = child->bus->dev; parent; parent = parent->bus->dev) { |
| 1438 | parent_bus = parent->bus->secondary; |
| 1439 | parent_devfn = parent->path.pci.devfn; |
| 1440 | child_devfn = child->path.pci.devfn; |
| 1441 | |
| 1442 | /* Swizzle the INT_PIN for any bridges not on root bus */ |
| 1443 | swizzled_pin = (PCI_SLOT(child_devfn) + swizzled_pin) % 4; |
| 1444 | printk(BIOS_SPEW, "\tWith INT_PIN swizzled to %s\n" |
| 1445 | "\tAttached to bridge device %01X:%02Xh.%02Xh\n", |
| 1446 | pin_to_str(swizzled_pin + 1), parent_bus, |
| 1447 | PCI_SLOT(parent_devfn), PCI_FUNC(parent_devfn)); |
| 1448 | |
| 1449 | /* Continue until we find the root bus */ |
| 1450 | if (parent_bus > 0) { |
| 1451 | /* |
| 1452 | * We will go on to the next parent so this parent |
| 1453 | * becomes the child |
| 1454 | */ |
| 1455 | child = parent; |
| 1456 | continue; |
| 1457 | } else { |
| 1458 | /* |
| 1459 | * Found the root bridge device, |
| 1460 | * fill in the structure and exit |
| 1461 | */ |
| 1462 | *parent_bridge = parent; |
| 1463 | break; |
| 1464 | } |
| 1465 | } |
| 1466 | |
| 1467 | /* End with PIN A = 1 ... D = 4 */ |
| 1468 | return swizzled_pin + 1; |
| 1469 | } |
| 1470 | |
| 1471 | /** |
| 1472 | * Given a device structure 'dev', find its interrupt pin |
| 1473 | * and its parent bridge 'parent_bdg' device structure. |
| 1474 | * If it is behind a bridge, it will return the interrupt |
| 1475 | * pin number (1 - 4) of the parent bridge that the device |
| 1476 | * interrupt pin has been swizzled to, otherwise it will |
| 1477 | * return the interrupt pin that is programmed into the |
| 1478 | * PCI config space of the target device. If 'dev' is |
| 1479 | * behind a bridge, it will fill in 'parent_bdg' with the |
| 1480 | * device structure of the bridge it is behind, otherwise |
| 1481 | * it will copy 'dev' into 'parent_bdg'. |
| 1482 | * |
| 1483 | * @param dev A PCI device structure to get interrupt pins for. |
| 1484 | * @param *parent_bdg The PCI device structure for the bridge |
| 1485 | * device 'dev' is attached to. |
| 1486 | * @return The interrupt pin number (1 - 4) that 'dev' will |
| 1487 | * trigger when generating an interrupt. |
| 1488 | * Errors: -1 is returned if the device is not enabled |
| 1489 | * -2 is returned if a parent bridge could not be found. |
| 1490 | */ |
Aaron Durbin | c30d913 | 2017-08-07 16:55:43 -0600 | [diff] [blame] | 1491 | int get_pci_irq_pins(struct device *dev, struct device **parent_bdg) |
Mike Loptien | 0f5cf5e | 2014-05-12 21:46:31 -0600 | [diff] [blame] | 1492 | { |
| 1493 | uint8_t bus = 0; /* The bus this device is on */ |
| 1494 | uint16_t devfn = 0; /* This device's device and function numbers */ |
| 1495 | uint8_t int_pin = 0; /* Interrupt pin used by the device */ |
| 1496 | uint8_t target_pin = 0; /* Interrupt pin we want to assign an IRQ to */ |
| 1497 | |
| 1498 | /* Make sure this device is enabled */ |
| 1499 | if (!(dev->enabled && (dev->path.type == DEVICE_PATH_PCI))) |
| 1500 | return -1; |
| 1501 | |
| 1502 | bus = dev->bus->secondary; |
| 1503 | devfn = dev->path.pci.devfn; |
| 1504 | |
| 1505 | /* Get and validate the interrupt pin used. Only 1-4 are allowed */ |
| 1506 | int_pin = pci_read_config8(dev, PCI_INTERRUPT_PIN); |
| 1507 | if (int_pin < 1 || int_pin > 4) |
| 1508 | return -1; |
| 1509 | |
| 1510 | printk(BIOS_SPEW, "PCI IRQ: Found device %01X:%02X.%02X using %s\n", |
| 1511 | bus, PCI_SLOT(devfn), PCI_FUNC(devfn), pin_to_str(int_pin)); |
| 1512 | |
| 1513 | /* If this device is on a bridge, swizzle its INT_PIN */ |
| 1514 | if (bus) { |
| 1515 | /* Swizzle its INT_PINs */ |
| 1516 | target_pin = swizzle_irq_pins(dev, parent_bdg); |
| 1517 | |
| 1518 | /* Make sure the swizzle returned valid structures */ |
| 1519 | if (parent_bdg == NULL) { |
| 1520 | printk(BIOS_WARNING, |
| 1521 | "Warning: Could not find parent bridge for this device!\n"); |
| 1522 | return -2; |
| 1523 | } |
| 1524 | } else { /* Device is not behind a bridge */ |
| 1525 | target_pin = int_pin; /* Return its own interrupt pin */ |
| 1526 | *parent_bdg = dev; /* Return its own structure */ |
| 1527 | } |
| 1528 | |
| 1529 | /* Target pin is the interrupt pin we want to assign an IRQ to */ |
| 1530 | return target_pin; |
| 1531 | } |
| 1532 | |
Martin Roth | b3b114c | 2017-06-24 14:00:01 -0600 | [diff] [blame] | 1533 | #if IS_ENABLED(CONFIG_PC80_SYSTEM) |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1534 | /** |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 1535 | * Assign IRQ numbers. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1536 | * |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1537 | * This function assigns IRQs for all functions contained within the indicated |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1538 | * device address. If the device does not exist or does not require interrupts |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1539 | * then this function has no effect. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1540 | * |
| 1541 | * This function should be called for each PCI slot in your system. |
| 1542 | * |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 1543 | * @param bus Pointer to the bus structure. |
| 1544 | * @param slot TODO |
| 1545 | * @param pIntAtoD An array of IRQ #s that are assigned to PINTA through PINTD |
| 1546 | * of this slot. The particular IRQ #s that are passed in depend on the |
| 1547 | * routing inside your southbridge and on your board. |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1548 | */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1549 | void pci_assign_irqs(unsigned bus, unsigned slot, |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1550 | const unsigned char pIntAtoD[4]) |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1551 | { |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1552 | unsigned int funct; |
Aaron Durbin | c30d913 | 2017-08-07 16:55:43 -0600 | [diff] [blame] | 1553 | struct device *pdev; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1554 | u8 line, irq; |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1555 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1556 | /* Each slot may contain up to eight functions. */ |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1557 | for (funct = 0; funct < 8; funct++) { |
| 1558 | pdev = dev_find_slot(bus, (slot << 3) + funct); |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1559 | |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1560 | if (!pdev) |
| 1561 | continue; |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1562 | |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1563 | line = pci_read_config8(pdev, PCI_INTERRUPT_PIN); |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1564 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1565 | /* PCI spec says all values except 1..4 are reserved. */ |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1566 | if ((line < 1) || (line > 4)) |
| 1567 | continue; |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1568 | |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1569 | irq = pIntAtoD[line - 1]; |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1570 | |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 1571 | printk(BIOS_DEBUG, "Assigning IRQ %d to %d:%x.%d\n", |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1572 | irq, bus, slot, funct); |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1573 | |
Stefan Reinauer | 14e2277 | 2010-04-27 06:56:47 +0000 | [diff] [blame] | 1574 | pci_write_config8(pdev, PCI_INTERRUPT_LINE, |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1575 | pIntAtoD[line - 1]); |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1576 | |
| 1577 | #ifdef PARANOID_IRQ_ASSIGNMENTS |
Myles Watson | 17aeeca | 2009-10-07 18:41:08 +0000 | [diff] [blame] | 1578 | irq = pci_read_config8(pdev, PCI_INTERRUPT_LINE); |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 1579 | printk(BIOS_DEBUG, " Readback = %d\n", irq); |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1580 | #endif |
| 1581 | |
Martin Roth | b3b114c | 2017-06-24 14:00:01 -0600 | [diff] [blame] | 1582 | #if IS_ENABLED(CONFIG_PC80_SYSTEM) |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1583 | /* Change to level triggered. */ |
| 1584 | i8259_configure_irq_trigger(pIntAtoD[line - 1], |
| 1585 | IRQ_LEVEL_TRIGGERED); |
Stefan Reinauer | 5fb6216 | 2010-12-16 23:52:04 +0000 | [diff] [blame] | 1586 | #endif |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1587 | } |
| 1588 | } |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1589 | #endif |