Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1 | /* |
Stefan Reinauer | 7e61e45 | 2008-01-18 10:35:56 +0000 | [diff] [blame] | 2 | * This file is part of the coreboot project. |
Uwe Hermann | b80dbf0 | 2007-04-22 19:08:13 +0000 | [diff] [blame] | 3 | * |
| 4 | * It was originally based on the Linux kernel (drivers/pci/pci.c). |
| 5 | * |
| 6 | * Modifications are: |
| 7 | * Copyright (C) 2003-2004 Linux Networx |
| 8 | * (Written by Eric Biederman <ebiederman@lnxi.com> for Linux Networx) |
| 9 | * Copyright (C) 2003-2006 Ronald G. Minnich <rminnich@gmail.com> |
| 10 | * Copyright (C) 2004-2005 Li-Ta Lo <ollie@lanl.gov> |
| 11 | * Copyright (C) 2005-2006 Tyan |
| 12 | * (Written by Yinghai Lu <yhlu@tyan.com> for Tyan) |
Patrick Georgi | 16cdbb2 | 2009-04-21 20:14:31 +0000 | [diff] [blame] | 13 | * Copyright (C) 2005-2009 coresystems GmbH |
| 14 | * (Written by Stefan Reinauer <stepan@coresystems.de> for coresystems GmbH) |
Uwe Hermann | b80dbf0 | 2007-04-22 19:08:13 +0000 | [diff] [blame] | 15 | */ |
| 16 | |
| 17 | /* |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 18 | * PCI Bus Services, see include/linux/pci.h for further explanation. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 19 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 20 | * Copyright 1993 -- 1997 Drew Eckhardt, Frederic Potter, |
| 21 | * David Mosberger-Tang |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 22 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 23 | * Copyright 1997 -- 1999 Martin Mares <mj@atrey.karlin.mff.cuni.cz> |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 24 | */ |
| 25 | |
| 26 | #include <console/console.h> |
| 27 | #include <stdlib.h> |
| 28 | #include <stdint.h> |
| 29 | #include <bitops.h> |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 30 | #include <string.h> |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 31 | #include <arch/io.h> |
Eric Biederman | 5899fd8 | 2003-04-24 06:25:08 +0000 | [diff] [blame] | 32 | #include <device/device.h> |
| 33 | #include <device/pci.h> |
| 34 | #include <device/pci_ids.h> |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 35 | #include <delay.h> |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 36 | #if CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT == 1 |
| 37 | #include <device/hypertransport.h> |
| 38 | #endif |
| 39 | #if CONFIG_PCIX_PLUGIN_SUPPORT == 1 |
| 40 | #include <device/pcix.h> |
| 41 | #endif |
| 42 | #if CONFIG_PCIEXP_PLUGIN_SUPPORT == 1 |
| 43 | #include <device/pciexp.h> |
| 44 | #endif |
Stefan Reinauer | ec75a57 | 2009-03-16 15:27:00 +0000 | [diff] [blame] | 45 | #if CONFIG_AGP_PLUGIN_SUPPORT == 1 |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 46 | #include <device/agp.h> |
| 47 | #endif |
| 48 | #if CONFIG_CARDBUS_PLUGIN_SUPPORT == 1 |
| 49 | #include <device/cardbus.h> |
| 50 | #endif |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 51 | #define CONFIG_PC80_SYSTEM 1 |
| 52 | #if CONFIG_PC80_SYSTEM == 1 |
| 53 | #include <pc80/i8259.h> |
| 54 | #endif |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 55 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 56 | u8 pci_moving_config8(struct device *dev, unsigned int reg) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 57 | { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 58 | u8 value, ones, zeroes; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 59 | value = pci_read_config8(dev, reg); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 60 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 61 | pci_write_config8(dev, reg, 0xff); |
| 62 | ones = pci_read_config8(dev, reg); |
| 63 | |
| 64 | pci_write_config8(dev, reg, 0x00); |
| 65 | zeroes = pci_read_config8(dev, reg); |
| 66 | |
| 67 | pci_write_config8(dev, reg, value); |
| 68 | |
| 69 | return ones ^ zeroes; |
| 70 | } |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 71 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 72 | u16 pci_moving_config16(struct device * dev, unsigned int reg) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 73 | { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 74 | u16 value, ones, zeroes; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 75 | value = pci_read_config16(dev, reg); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 76 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 77 | pci_write_config16(dev, reg, 0xffff); |
| 78 | ones = pci_read_config16(dev, reg); |
| 79 | |
| 80 | pci_write_config16(dev, reg, 0x0000); |
| 81 | zeroes = pci_read_config16(dev, reg); |
| 82 | |
| 83 | pci_write_config16(dev, reg, value); |
| 84 | |
| 85 | return ones ^ zeroes; |
| 86 | } |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 87 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 88 | u32 pci_moving_config32(struct device * dev, unsigned int reg) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 89 | { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 90 | u32 value, ones, zeroes; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 91 | value = pci_read_config32(dev, reg); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 92 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 93 | pci_write_config32(dev, reg, 0xffffffff); |
| 94 | ones = pci_read_config32(dev, reg); |
| 95 | |
| 96 | pci_write_config32(dev, reg, 0x00000000); |
| 97 | zeroes = pci_read_config32(dev, reg); |
| 98 | |
| 99 | pci_write_config32(dev, reg, value); |
| 100 | |
| 101 | return ones ^ zeroes; |
| 102 | } |
| 103 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 104 | /** |
| 105 | * Given a device, a capability type, and a last position, return the next |
| 106 | * matching capability. Always start at the head of the list. |
| 107 | * |
| 108 | * @param dev Pointer to the device structure. |
| 109 | * @param cap_type PCI_CAP_LIST_ID of the PCI capability we're looking for. |
| 110 | * @param last Location of the PCI capability register to start from. |
| 111 | */ |
| 112 | unsigned pci_find_next_capability(struct device *dev, unsigned cap, |
| 113 | unsigned last) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 114 | { |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 115 | unsigned pos = 0; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 116 | unsigned status; |
| 117 | unsigned reps = 48; |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 118 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 119 | status = pci_read_config16(dev, PCI_STATUS); |
| 120 | if (!(status & PCI_STATUS_CAP_LIST)) { |
| 121 | return 0; |
| 122 | } |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 123 | switch (dev->hdr_type & 0x7f) { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 124 | case PCI_HEADER_TYPE_NORMAL: |
| 125 | case PCI_HEADER_TYPE_BRIDGE: |
| 126 | pos = PCI_CAPABILITY_LIST; |
| 127 | break; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 128 | case PCI_HEADER_TYPE_CARDBUS: |
| 129 | pos = PCI_CB_CAPABILITY_LIST; |
| 130 | break; |
| 131 | default: |
| 132 | return 0; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 133 | } |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 134 | pos = pci_read_config8(dev, pos); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 135 | while (reps-- && (pos >= 0x40)) { /* Loop through the linked list. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 136 | int this_cap; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 137 | pos &= ~3; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 138 | this_cap = pci_read_config8(dev, pos + PCI_CAP_LIST_ID); |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 139 | printk(BIOS_SPEW, "Capability: type 0x%02x @ 0x%02x\n", this_cap, |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 140 | pos); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 141 | if (this_cap == 0xff) { |
| 142 | break; |
| 143 | } |
| 144 | if (!last && (this_cap == cap)) { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 145 | return pos; |
| 146 | } |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 147 | if (last == pos) { |
| 148 | last = 0; |
| 149 | } |
| 150 | pos = pci_read_config8(dev, pos + PCI_CAP_LIST_NEXT); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 151 | } |
| 152 | return 0; |
| 153 | } |
| 154 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 155 | /** |
| 156 | * Given a device, and a capability type, return the next matching |
| 157 | * capability. Always start at the head of the list. |
| 158 | * |
| 159 | * @param dev Pointer to the device structure. |
| 160 | * @param cap_type PCI_CAP_LIST_ID of the PCI capability we're looking for. |
| 161 | */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 162 | unsigned pci_find_capability(device_t dev, unsigned cap) |
| 163 | { |
| 164 | return pci_find_next_capability(dev, cap, 0); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 165 | } |
| 166 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 167 | /** |
| 168 | * Given a device and register, read the size of the BAR for that register. |
| 169 | * |
| 170 | * @param dev Pointer to the device structure. |
| 171 | * @param index Address of the PCI configuration register. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 172 | */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 173 | struct resource *pci_get_resource(struct device *dev, unsigned long index) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 174 | { |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 175 | struct resource *resource; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 176 | unsigned long value, attr; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 177 | resource_t moving, limit; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 178 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 179 | /* Initialize the resources to nothing. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 180 | resource = new_resource(dev, index); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 181 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 182 | /* Get the initial value. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 183 | value = pci_read_config32(dev, index); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 184 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 185 | /* See which bits move. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 186 | moving = pci_moving_config32(dev, index); |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 187 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 188 | /* Initialize attr to the bits that do not move. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 189 | attr = value & ~moving; |
| 190 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 191 | /* If it is a 64bit resource look at the high half as well. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 192 | if (((attr & PCI_BASE_ADDRESS_SPACE_IO) == 0) && |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 193 | ((attr & PCI_BASE_ADDRESS_MEM_LIMIT_MASK) == |
| 194 | PCI_BASE_ADDRESS_MEM_LIMIT_64)) { |
| 195 | /* Find the high bits that move. */ |
| 196 | moving |= |
| 197 | ((resource_t) pci_moving_config32(dev, index + 4)) << 32; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 198 | } |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 199 | /* Find the resource constraints. |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 200 | * Start by finding the bits that move. From there: |
| 201 | * - Size is the least significant bit of the bits that move. |
| 202 | * - Limit is all of the bits that move plus all of the lower bits. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 203 | * See PCI Spec 6.2.5.1. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 204 | */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 205 | limit = 0; |
| 206 | if (moving) { |
| 207 | resource->size = 1; |
| 208 | resource->align = resource->gran = 0; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 209 | while (!(moving & resource->size)) { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 210 | resource->size <<= 1; |
| 211 | resource->align += 1; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 212 | resource->gran += 1; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 213 | } |
| 214 | resource->limit = limit = moving | (resource->size - 1); |
| 215 | } |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 216 | |
| 217 | /* Some broken hardware has read-only registers that do not |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 218 | * really size correctly. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 219 | * Example: the Acer M7229 has BARs 1-4 normally read-only. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 220 | * so BAR1 at offset 0x10 reads 0x1f1. If you size that register |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 221 | * by writing 0xffffffff to it, it will read back as 0x1f1 -- a |
| 222 | * violation of the spec. |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 223 | * We catch this case and ignore it by observing which bits move, |
| 224 | * This also catches the common case unimplemented registers |
| 225 | * that always read back as 0. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 226 | */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 227 | if (moving == 0) { |
| 228 | if (value != 0) { |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 229 | printk(BIOS_DEBUG, "%s register %02lx(%08lx), read-only ignoring it\n", |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 230 | dev_path(dev), index, value); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 231 | } |
| 232 | resource->flags = 0; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 233 | } else if (attr & PCI_BASE_ADDRESS_SPACE_IO) { |
| 234 | /* An I/O mapped base address. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 235 | attr &= PCI_BASE_ADDRESS_IO_ATTR_MASK; |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 236 | resource->flags |= IORESOURCE_IO; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 237 | /* I don't want to deal with 32bit I/O resources. */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 238 | resource->limit = 0xffff; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 239 | } else { |
| 240 | /* A Memory mapped base address. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 241 | attr &= PCI_BASE_ADDRESS_MEM_ATTR_MASK; |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 242 | resource->flags |= IORESOURCE_MEM; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 243 | if (attr & PCI_BASE_ADDRESS_MEM_PREFETCH) { |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 244 | resource->flags |= IORESOURCE_PREFETCH; |
| 245 | } |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 246 | attr &= PCI_BASE_ADDRESS_MEM_LIMIT_MASK; |
| 247 | if (attr == PCI_BASE_ADDRESS_MEM_LIMIT_32) { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 248 | /* 32bit limit. */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 249 | resource->limit = 0xffffffffUL; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 250 | } else if (attr == PCI_BASE_ADDRESS_MEM_LIMIT_1M) { |
| 251 | /* 1MB limit. */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 252 | resource->limit = 0x000fffffUL; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 253 | } else if (attr == PCI_BASE_ADDRESS_MEM_LIMIT_64) { |
| 254 | /* 64bit limit. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 255 | resource->limit = 0xffffffffffffffffULL; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 256 | resource->flags |= IORESOURCE_PCI64; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 257 | } else { |
| 258 | /* Invalid value. */ |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 259 | printk(BIOS_ERR, "Broken BAR with value %lx\n", attr); |
| 260 | printk(BIOS_ERR, " on dev %s at index %02lx\n", |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 261 | dev_path(dev), index); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 262 | resource->flags = 0; |
| 263 | } |
| 264 | } |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 265 | /* Don't let the limit exceed which bits can move. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 266 | if (resource->limit > limit) { |
| 267 | resource->limit = limit; |
| 268 | } |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 269 | |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 270 | return resource; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 271 | } |
| 272 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 273 | /** |
| 274 | * Given a device and an index, read the size of the BAR for that register. |
| 275 | * |
| 276 | * @param dev Pointer to the device structure. |
| 277 | * @param index Address of the PCI configuration register. |
| 278 | */ |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 279 | static void pci_get_rom_resource(struct device *dev, unsigned long index) |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 280 | { |
| 281 | struct resource *resource; |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 282 | unsigned long value; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 283 | resource_t moving; |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 284 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 285 | /* Initialize the resources to nothing. */ |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 286 | resource = new_resource(dev, index); |
| 287 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 288 | /* Get the initial value. */ |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 289 | value = pci_read_config32(dev, index); |
| 290 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 291 | /* See which bits move. */ |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 292 | moving = pci_moving_config32(dev, index); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 293 | |
| 294 | /* Clear the Enable bit. */ |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 295 | moving = moving & ~PCI_ROM_ADDRESS_ENABLE; |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 296 | |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 297 | /* Find the resource constraints. |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 298 | * Start by finding the bits that move. From there: |
| 299 | * - Size is the least significant bit of the bits that move. |
| 300 | * - Limit is all of the bits that move plus all of the lower bits. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 301 | * See PCI Spec 6.2.5.1. |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 302 | */ |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 303 | if (moving) { |
| 304 | resource->size = 1; |
| 305 | resource->align = resource->gran = 0; |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 306 | while (!(moving & resource->size)) { |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 307 | resource->size <<= 1; |
| 308 | resource->align += 1; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 309 | resource->gran += 1; |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 310 | } |
Patrick Georgi | 16cdbb2 | 2009-04-21 20:14:31 +0000 | [diff] [blame] | 311 | resource->limit = moving | (resource->size - 1); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 312 | resource->flags |= IORESOURCE_MEM | IORESOURCE_READONLY; |
| 313 | } else { |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 314 | if (value != 0) { |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 315 | printk(BIOS_DEBUG, "%s register %02lx(%08lx), read-only ignoring it\n", |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 316 | dev_path(dev), index, value); |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 317 | } |
| 318 | resource->flags = 0; |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 319 | } |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 320 | compact_resources(dev); |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 321 | } |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 322 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 323 | /** |
| 324 | * Read the base address registers for a given device. |
| 325 | * |
| 326 | * @param dev Pointer to the dev structure. |
| 327 | * @param howmany How many registers to read (6 for device, 2 for bridge). |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 328 | */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 329 | static void pci_read_bases(struct device *dev, unsigned int howmany) |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 330 | { |
| 331 | unsigned long index; |
| 332 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 333 | for (index = PCI_BASE_ADDRESS_0; |
| 334 | (index < PCI_BASE_ADDRESS_0 + (howmany << 2));) { |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 335 | struct resource *resource; |
| 336 | resource = pci_get_resource(dev, index); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 337 | index += (resource->flags & IORESOURCE_PCI64) ? 8 : 4; |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 338 | } |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 339 | |
| 340 | compact_resources(dev); |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 341 | } |
| 342 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 343 | static void pci_record_bridge_resource(struct device *dev, resource_t moving, |
| 344 | unsigned index, unsigned long type) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 345 | { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 346 | /* Initialize the constraints on the current bus. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 347 | struct resource *resource; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 348 | resource = NULL; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 349 | if (moving) { |
| 350 | unsigned long gran; |
| 351 | resource_t step; |
| 352 | resource = new_resource(dev, index); |
| 353 | resource->size = 0; |
| 354 | gran = 0; |
| 355 | step = 1; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 356 | while ((moving & step) == 0) { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 357 | gran += 1; |
| 358 | step <<= 1; |
| 359 | } |
| 360 | resource->gran = gran; |
| 361 | resource->align = gran; |
| 362 | resource->limit = moving | (step - 1); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 363 | resource->flags = type | IORESOURCE_PCI_BRIDGE | |
| 364 | IORESOURCE_BRIDGE; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 365 | } |
| 366 | return; |
| 367 | } |
| 368 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 369 | static void pci_bridge_read_bases(struct device *dev) |
| 370 | { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 371 | resource_t moving_base, moving_limit, moving; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 372 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 373 | /* See if the bridge I/O resources are implemented. */ |
| 374 | moving_base = ((u32) pci_moving_config8(dev, PCI_IO_BASE)) << 8; |
| 375 | moving_base |= |
| 376 | ((u32) pci_moving_config16(dev, PCI_IO_BASE_UPPER16)) << 16; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 377 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 378 | moving_limit = ((u32) pci_moving_config8(dev, PCI_IO_LIMIT)) << 8; |
| 379 | moving_limit |= |
| 380 | ((u32) pci_moving_config16(dev, PCI_IO_LIMIT_UPPER16)) << 16; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 381 | |
| 382 | moving = moving_base & moving_limit; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 383 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 384 | /* Initialize the I/O space constraints on the current bus. */ |
| 385 | pci_record_bridge_resource(dev, moving, PCI_IO_BASE, IORESOURCE_IO); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 386 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 387 | /* See if the bridge prefmem resources are implemented. */ |
| 388 | moving_base = |
| 389 | ((resource_t) pci_moving_config16(dev, PCI_PREF_MEMORY_BASE)) << 16; |
| 390 | moving_base |= |
| 391 | ((resource_t) pci_moving_config32(dev, PCI_PREF_BASE_UPPER32)) << |
| 392 | 32; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 393 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 394 | moving_limit = |
| 395 | ((resource_t) pci_moving_config16(dev, PCI_PREF_MEMORY_LIMIT)) << |
| 396 | 16; |
| 397 | moving_limit |= |
| 398 | ((resource_t) pci_moving_config32(dev, PCI_PREF_LIMIT_UPPER32)) << |
| 399 | 32; |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 400 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 401 | moving = moving_base & moving_limit; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 402 | /* Initialize the prefetchable memory constraints on the current bus. */ |
| 403 | pci_record_bridge_resource(dev, moving, PCI_PREF_MEMORY_BASE, |
| 404 | IORESOURCE_MEM | IORESOURCE_PREFETCH); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 405 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 406 | /* See if the bridge mem resources are implemented. */ |
| 407 | moving_base = ((u32) pci_moving_config16(dev, PCI_MEMORY_BASE)) << 16; |
| 408 | moving_limit = ((u32) pci_moving_config16(dev, PCI_MEMORY_LIMIT)) << 16; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 409 | |
| 410 | moving = moving_base & moving_limit; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 411 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 412 | /* Initialize the memory resources on the current bus. */ |
| 413 | pci_record_bridge_resource(dev, moving, PCI_MEMORY_BASE, |
| 414 | IORESOURCE_MEM); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 415 | |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 416 | compact_resources(dev); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 417 | } |
| 418 | |
Eric Biederman | 5899fd8 | 2003-04-24 06:25:08 +0000 | [diff] [blame] | 419 | void pci_dev_read_resources(struct device *dev) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 420 | { |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 421 | pci_read_bases(dev, 6); |
| 422 | pci_get_rom_resource(dev, PCI_ROM_ADDRESS); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 423 | } |
| 424 | |
Eric Biederman | 5899fd8 | 2003-04-24 06:25:08 +0000 | [diff] [blame] | 425 | void pci_bus_read_resources(struct device *dev) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 426 | { |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 427 | pci_bridge_read_bases(dev); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 428 | pci_read_bases(dev, 2); |
| 429 | pci_get_rom_resource(dev, PCI_ROM_ADDRESS1); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 430 | } |
| 431 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 432 | void pci_domain_read_resources(struct device *dev) |
| 433 | { |
| 434 | struct resource *res; |
| 435 | |
| 436 | /* Initialize the system-wide I/O space constraints. */ |
| 437 | res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0)); |
| 438 | res->limit = 0xffffUL; |
| 439 | res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | |
| 440 | IORESOURCE_ASSIGNED; |
| 441 | |
| 442 | /* Initialize the system-wide memory resources constraints. */ |
| 443 | res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0)); |
| 444 | res->limit = 0xffffffffULL; |
| 445 | res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | |
| 446 | IORESOURCE_ASSIGNED; |
| 447 | } |
| 448 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 449 | static void pci_set_resource(struct device *dev, struct resource *resource) |
| 450 | { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 451 | resource_t base, end; |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 452 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 453 | /* Make certain the resource has actually been assigned a value. */ |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 454 | if (!(resource->flags & IORESOURCE_ASSIGNED)) { |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 455 | printk(BIOS_ERR, "ERROR: %s %02lx %s size: 0x%010llx not assigned\n", |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 456 | dev_path(dev), resource->index, |
| 457 | resource_type(resource), resource->size); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 458 | return; |
| 459 | } |
| 460 | |
Myles Watson | eb81a5b | 2009-11-05 20:06:19 +0000 | [diff] [blame] | 461 | /* If this resource is fixed don't worry about it. */ |
| 462 | if (resource->flags & IORESOURCE_FIXED) { |
| 463 | return; |
| 464 | } |
| 465 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 466 | /* If I have already stored this resource don't worry about it. */ |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 467 | if (resource->flags & IORESOURCE_STORED) { |
| 468 | return; |
| 469 | } |
| 470 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 471 | /* If the resource is subtractive don't worry about it. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 472 | if (resource->flags & IORESOURCE_SUBTRACTIVE) { |
| 473 | return; |
| 474 | } |
| 475 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 476 | /* Only handle PCI memory and I/O resources for now. */ |
| 477 | if (!(resource->flags & (IORESOURCE_MEM | IORESOURCE_IO))) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 478 | return; |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 479 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 480 | /* Enable the resources in the command register. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 481 | if (resource->size) { |
| 482 | if (resource->flags & IORESOURCE_MEM) { |
| 483 | dev->command |= PCI_COMMAND_MEMORY; |
| 484 | } |
| 485 | if (resource->flags & IORESOURCE_IO) { |
| 486 | dev->command |= PCI_COMMAND_IO; |
| 487 | } |
| 488 | if (resource->flags & IORESOURCE_PCI_BRIDGE) { |
| 489 | dev->command |= PCI_COMMAND_MASTER; |
| 490 | } |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 491 | } |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 492 | /* Get the base address. */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 493 | base = resource->base; |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 494 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 495 | /* Get the end. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 496 | end = resource_end(resource); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 497 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 498 | /* Now store the resource. */ |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 499 | resource->flags |= IORESOURCE_STORED; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 500 | |
| 501 | /* PCI Bridges have no enable bit. They are disabled if the base of |
| 502 | * the range is greater than the limit. If the size is zero, disable |
| 503 | * by setting the base = limit and end = limit - 2^gran. |
| 504 | */ |
| 505 | if (resource->size == 0 && (resource->flags & IORESOURCE_PCI_BRIDGE)) { |
| 506 | base = resource->limit; |
| 507 | end = resource->limit - (1 << resource->gran); |
| 508 | resource->base = base; |
| 509 | } |
| 510 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 511 | if (!(resource->flags & IORESOURCE_PCI_BRIDGE)) { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 512 | unsigned long base_lo, base_hi; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 513 | /* Some chipsets allow us to set/clear the I/O bit |
| 514 | * (e.g. VIA 82c686a). So set it to be safe. |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 515 | */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 516 | base_lo = base & 0xffffffff; |
| 517 | base_hi = (base >> 32) & 0xffffffff; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 518 | if (resource->flags & IORESOURCE_IO) { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 519 | base_lo |= PCI_BASE_ADDRESS_SPACE_IO; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 520 | } |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 521 | pci_write_config32(dev, resource->index, base_lo); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 522 | if (resource->flags & IORESOURCE_PCI64) { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 523 | pci_write_config32(dev, resource->index + 4, base_hi); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 524 | } |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 525 | } else if (resource->index == PCI_IO_BASE) { |
| 526 | /* Set the I/O ranges. */ |
| 527 | pci_write_config8(dev, PCI_IO_BASE, base >> 8); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 528 | pci_write_config16(dev, PCI_IO_BASE_UPPER16, base >> 16); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 529 | pci_write_config8(dev, PCI_IO_LIMIT, end >> 8); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 530 | pci_write_config16(dev, PCI_IO_LIMIT_UPPER16, end >> 16); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 531 | } else if (resource->index == PCI_MEMORY_BASE) { |
| 532 | /* Set the memory range. */ |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 533 | pci_write_config16(dev, PCI_MEMORY_BASE, base >> 16); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 534 | pci_write_config16(dev, PCI_MEMORY_LIMIT, end >> 16); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 535 | } else if (resource->index == PCI_PREF_MEMORY_BASE) { |
| 536 | /* Set the prefetchable memory range. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 537 | pci_write_config16(dev, PCI_PREF_MEMORY_BASE, base >> 16); |
| 538 | pci_write_config32(dev, PCI_PREF_BASE_UPPER32, base >> 32); |
| 539 | pci_write_config16(dev, PCI_PREF_MEMORY_LIMIT, end >> 16); |
| 540 | pci_write_config32(dev, PCI_PREF_LIMIT_UPPER32, end >> 32); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 541 | } else { |
| 542 | /* Don't let me think I stored the resource. */ |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 543 | resource->flags &= ~IORESOURCE_STORED; |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 544 | printk(BIOS_ERR, "ERROR: invalid resource->index %lx\n", |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 545 | resource->index); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 546 | } |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 547 | report_resource_stored(dev, resource, ""); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 548 | return; |
| 549 | } |
| 550 | |
Eric Biederman | 5899fd8 | 2003-04-24 06:25:08 +0000 | [diff] [blame] | 551 | void pci_dev_set_resources(struct device *dev) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 552 | { |
Myles Watson | c25cc11 | 2010-05-21 14:33:48 +0000 | [diff] [blame] | 553 | struct resource *res; |
Myles Watson | 894a347 | 2010-06-09 22:41:35 +0000 | [diff] [blame^] | 554 | struct bus *bus; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 555 | u8 line; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 556 | |
Myles Watson | c25cc11 | 2010-05-21 14:33:48 +0000 | [diff] [blame] | 557 | for (res = dev->resource_list; res; res = res->next) { |
| 558 | pci_set_resource(dev, res); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 559 | } |
Myles Watson | 894a347 | 2010-06-09 22:41:35 +0000 | [diff] [blame^] | 560 | for (bus = dev->link_list; bus; bus = bus->next) { |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 561 | if (bus->children) { |
| 562 | assign_resources(bus); |
| 563 | } |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 564 | } |
| 565 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 566 | /* Set a default latency timer. */ |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 567 | pci_write_config8(dev, PCI_LATENCY_TIMER, 0x40); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 568 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 569 | /* Set a default secondary latency timer. */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 570 | if ((dev->hdr_type & 0x7f) == PCI_HEADER_TYPE_BRIDGE) { |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 571 | pci_write_config8(dev, PCI_SEC_LATENCY_TIMER, 0x40); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 572 | } |
| 573 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 574 | /* Zero the IRQ settings. */ |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 575 | line = pci_read_config8(dev, PCI_INTERRUPT_PIN); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 576 | if (line) { |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 577 | pci_write_config8(dev, PCI_INTERRUPT_LINE, 0); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 578 | } |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 579 | /* Set the cache line size, so far 64 bytes is good for everyone. */ |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 580 | pci_write_config8(dev, PCI_CACHE_LINE_SIZE, 64 >> 2); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 581 | } |
| 582 | |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 583 | void pci_dev_enable_resources(struct device *dev) |
| 584 | { |
Eric Biederman | a9e632c | 2004-11-18 22:38:08 +0000 | [diff] [blame] | 585 | const struct pci_operations *ops; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 586 | u16 command; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 587 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 588 | /* Set the subsystem vendor and device id for mainboard devices. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 589 | ops = ops_pci(dev); |
Eric Biederman | dbec2d4 | 2004-10-21 10:44:08 +0000 | [diff] [blame] | 590 | if (dev->on_mainboard && ops && ops->set_subsystem) { |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 591 | printk(BIOS_DEBUG, "%s subsystem <- %02x/%02x\n", |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 592 | dev_path(dev), |
| 593 | CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID, |
| 594 | CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 595 | ops->set_subsystem(dev, |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 596 | CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID, |
| 597 | CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 598 | } |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 599 | command = pci_read_config16(dev, PCI_COMMAND); |
| 600 | command |= dev->command; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 601 | /* v3 has |
| 602 | * command |= (PCI_COMMAND_PARITY + PCI_COMMAND_SERR); // Error check. |
| 603 | */ |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 604 | printk(BIOS_DEBUG, "%s cmd <- %02x\n", dev_path(dev), command); |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 605 | pci_write_config16(dev, PCI_COMMAND, command); |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 606 | } |
| 607 | |
| 608 | void pci_bus_enable_resources(struct device *dev) |
| 609 | { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 610 | u16 ctrl; |
| 611 | |
| 612 | /* Enable I/O in command register if there is VGA card |
| 613 | * connected with (even it does not claim I/O resource). |
| 614 | */ |
Myles Watson | 894a347 | 2010-06-09 22:41:35 +0000 | [diff] [blame^] | 615 | if (dev->link_list->bridge_ctrl & PCI_BRIDGE_CTL_VGA) |
Li-Ta Lo | 515f6c7 | 2005-01-11 22:48:54 +0000 | [diff] [blame] | 616 | dev->command |= PCI_COMMAND_IO; |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 617 | ctrl = pci_read_config16(dev, PCI_BRIDGE_CONTROL); |
Myles Watson | 894a347 | 2010-06-09 22:41:35 +0000 | [diff] [blame^] | 618 | ctrl |= dev->link_list->bridge_ctrl; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 619 | ctrl |= (PCI_BRIDGE_CTL_PARITY + PCI_BRIDGE_CTL_SERR); /* Error check. */ |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 620 | printk(BIOS_DEBUG, "%s bridge ctrl <- %04x\n", dev_path(dev), ctrl); |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 621 | pci_write_config16(dev, PCI_BRIDGE_CONTROL, ctrl); |
| 622 | |
| 623 | pci_dev_enable_resources(dev); |
Eric Biederman | dbec2d4 | 2004-10-21 10:44:08 +0000 | [diff] [blame] | 624 | enable_childrens_resources(dev); |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 625 | } |
| 626 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 627 | void pci_bus_reset(struct bus *bus) |
| 628 | { |
| 629 | unsigned ctl; |
| 630 | ctl = pci_read_config16(bus->dev, PCI_BRIDGE_CONTROL); |
| 631 | ctl |= PCI_BRIDGE_CTL_BUS_RESET; |
| 632 | pci_write_config16(bus->dev, PCI_BRIDGE_CONTROL, ctl); |
| 633 | mdelay(10); |
| 634 | ctl &= ~PCI_BRIDGE_CTL_BUS_RESET; |
| 635 | pci_write_config16(bus->dev, PCI_BRIDGE_CONTROL, ctl); |
| 636 | delay(1); |
| 637 | } |
| 638 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 639 | void pci_dev_set_subsystem(struct device *dev, unsigned vendor, unsigned device) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 640 | { |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 641 | pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 642 | ((device & 0xffff) << 16) | (vendor & 0xffff)); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 643 | } |
| 644 | |
Torsten Duwe | 1f2f800 | 2008-01-06 01:10:54 +0000 | [diff] [blame] | 645 | /** default handler: only runs the relevant pci bios. */ |
Li-Ta Lo | 883b879 | 2005-01-10 23:16:22 +0000 | [diff] [blame] | 646 | void pci_dev_init(struct device *dev) |
| 647 | { |
Torsten Duwe | 1f2f800 | 2008-01-06 01:10:54 +0000 | [diff] [blame] | 648 | #if CONFIG_PCI_ROM_RUN == 1 || CONFIG_VGA_ROM_RUN == 1 |
Li-Ta Lo | 883b879 | 2005-01-10 23:16:22 +0000 | [diff] [blame] | 649 | struct rom_header *rom, *ram; |
| 650 | |
Myles Watson | 17aeeca | 2009-10-07 18:41:08 +0000 | [diff] [blame] | 651 | if (CONFIG_PCI_ROM_RUN != 1 && /* Only execute VGA ROMs. */ |
| 652 | ((dev->class >> 8) != PCI_CLASS_DISPLAY_VGA)) |
Roman Kononov | 778a42b | 2007-04-06 18:34:39 +0000 | [diff] [blame] | 653 | return; |
Myles Watson | 17aeeca | 2009-10-07 18:41:08 +0000 | [diff] [blame] | 654 | |
| 655 | if (CONFIG_VGA_ROM_RUN != 1 && /* Only execute non-VGA ROMs. */ |
| 656 | ((dev->class >> 8) == PCI_CLASS_DISPLAY_VGA)) |
| 657 | return; |
Roman Kononov | 778a42b | 2007-04-06 18:34:39 +0000 | [diff] [blame] | 658 | |
Li-Ta Lo | 883b879 | 2005-01-10 23:16:22 +0000 | [diff] [blame] | 659 | rom = pci_rom_probe(dev); |
| 660 | if (rom == NULL) |
| 661 | return; |
Roman Kononov | 778a42b | 2007-04-06 18:34:39 +0000 | [diff] [blame] | 662 | |
Li-Ta Lo | 883b879 | 2005-01-10 23:16:22 +0000 | [diff] [blame] | 663 | ram = pci_rom_load(dev, rom); |
Yinghai Lu | 9e4faef | 2005-01-14 22:04:49 +0000 | [diff] [blame] | 664 | if (ram == NULL) |
| 665 | return; |
Li-Ta Lo | 883b879 | 2005-01-10 23:16:22 +0000 | [diff] [blame] | 666 | |
Stefan Reinauer | d98cf5b | 2008-08-01 11:25:41 +0000 | [diff] [blame] | 667 | run_bios(dev, (unsigned long)ram); |
Roman Kononov | 778a42b | 2007-04-06 18:34:39 +0000 | [diff] [blame] | 668 | |
| 669 | #if CONFIG_CONSOLE_VGA == 1 |
Luc Verhaegen | 5c5beb7 | 2009-05-29 03:04:16 +0000 | [diff] [blame] | 670 | if ((dev->class>>8) == PCI_CLASS_DISPLAY_VGA) |
Luc Verhaegen | 43bc5a9c | 2009-05-29 03:44:47 +0000 | [diff] [blame] | 671 | vga_console_init(); |
Torsten Duwe | 1f2f800 | 2008-01-06 01:10:54 +0000 | [diff] [blame] | 672 | #endif /* CONFIG_CONSOLE_VGA */ |
| 673 | #endif /* CONFIG_PCI_ROM_RUN || CONFIG_VGA_ROM_RUN */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 674 | } |
Li-Ta Lo | 883b879 | 2005-01-10 23:16:22 +0000 | [diff] [blame] | 675 | |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 676 | /** Default device operation for PCI devices */ |
Eric Biederman | a9e632c | 2004-11-18 22:38:08 +0000 | [diff] [blame] | 677 | static struct pci_operations pci_dev_ops_pci = { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 678 | .set_subsystem = pci_dev_set_subsystem, |
| 679 | }; |
| 680 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 681 | struct device_operations default_pci_ops_dev = { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 682 | .read_resources = pci_dev_read_resources, |
| 683 | .set_resources = pci_dev_set_resources, |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 684 | .enable_resources = pci_dev_enable_resources, |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 685 | .init = pci_dev_init, |
| 686 | .scan_bus = 0, |
| 687 | .enable = 0, |
| 688 | .ops_pci = &pci_dev_ops_pci, |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 689 | }; |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 690 | |
| 691 | /** Default device operations for PCI bridges */ |
Eric Biederman | a9e632c | 2004-11-18 22:38:08 +0000 | [diff] [blame] | 692 | static struct pci_operations pci_bus_ops_pci = { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 693 | .set_subsystem = 0, |
| 694 | }; |
Li-Ta Lo | 883b879 | 2005-01-10 23:16:22 +0000 | [diff] [blame] | 695 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 696 | struct device_operations default_pci_ops_bus = { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 697 | .read_resources = pci_bus_read_resources, |
| 698 | .set_resources = pci_dev_set_resources, |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 699 | .enable_resources = pci_bus_enable_resources, |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 700 | .init = 0, |
| 701 | .scan_bus = pci_scan_bridge, |
| 702 | .enable = 0, |
| 703 | .reset_bus = pci_bus_reset, |
| 704 | .ops_pci = &pci_bus_ops_pci, |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 705 | }; |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 706 | |
| 707 | /** |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 708 | * @brief Detect the type of downstream bridge |
| 709 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 710 | * This function is a heuristic to detect which type of bus is downstream |
| 711 | * of a PCI-to-PCI bridge. This functions by looking for various capability |
| 712 | * blocks to figure out the type of downstream bridge. PCI-X, PCI-E, and |
| 713 | * Hypertransport all seem to have appropriate capabilities. |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 714 | * |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 715 | * When only a PCI-Express capability is found the type |
| 716 | * is examined to see which type of bridge we have. |
| 717 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 718 | * @param dev Pointer to the device structure of the bridge. |
| 719 | * @return Appropriate bridge operations. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 720 | */ |
| 721 | static struct device_operations *get_pci_bridge_ops(device_t dev) |
| 722 | { |
| 723 | unsigned pos; |
| 724 | |
| 725 | #if CONFIG_PCIX_PLUGIN_SUPPORT == 1 |
| 726 | pos = pci_find_capability(dev, PCI_CAP_ID_PCIX); |
| 727 | if (pos) { |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 728 | printk(BIOS_DEBUG, "%s subordinate bus PCI-X\n", dev_path(dev)); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 729 | return &default_pcix_ops_bus; |
| 730 | } |
| 731 | #endif |
| 732 | #if CONFIG_AGP_PLUGIN_SUPPORT == 1 |
| 733 | /* How do I detect an PCI to AGP bridge? */ |
| 734 | #endif |
| 735 | #if CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT == 1 |
| 736 | pos = 0; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 737 | while ((pos = pci_find_next_capability(dev, PCI_CAP_ID_HT, pos))) { |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 738 | unsigned flags; |
| 739 | flags = pci_read_config16(dev, pos + PCI_CAP_FLAGS); |
| 740 | if ((flags >> 13) == 1) { |
| 741 | /* Host or Secondary Interface */ |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 742 | printk(BIOS_DEBUG, "%s subordinate bus Hypertransport\n", |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 743 | dev_path(dev)); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 744 | return &default_ht_ops_bus; |
| 745 | } |
| 746 | } |
| 747 | #endif |
| 748 | #if CONFIG_PCIEXP_PLUGIN_SUPPORT == 1 |
| 749 | pos = pci_find_capability(dev, PCI_CAP_ID_PCIE); |
| 750 | if (pos) { |
| 751 | unsigned flags; |
| 752 | flags = pci_read_config16(dev, pos + PCI_EXP_FLAGS); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 753 | switch ((flags & PCI_EXP_FLAGS_TYPE) >> 4) { |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 754 | case PCI_EXP_TYPE_ROOT_PORT: |
| 755 | case PCI_EXP_TYPE_UPSTREAM: |
| 756 | case PCI_EXP_TYPE_DOWNSTREAM: |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 757 | printk(BIOS_DEBUG, "%s subordinate bus PCI Express\n", |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 758 | dev_path(dev)); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 759 | return &default_pciexp_ops_bus; |
| 760 | case PCI_EXP_TYPE_PCI_BRIDGE: |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 761 | printk(BIOS_DEBUG, "%s subordinate PCI\n", dev_path(dev)); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 762 | return &default_pci_ops_bus; |
| 763 | default: |
| 764 | break; |
| 765 | } |
| 766 | } |
| 767 | #endif |
| 768 | return &default_pci_ops_bus; |
| 769 | } |
| 770 | |
| 771 | /** |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 772 | * Set up PCI device operation. Check if it already has a driver. If not, use |
| 773 | * find_device_operations, or set to a default based on type. |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 774 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 775 | * @param dev Pointer to the device whose pci_ops you want to set. |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 776 | * @see pci_drivers |
| 777 | */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 778 | static void set_pci_ops(struct device *dev) |
| 779 | { |
| 780 | struct pci_driver *driver; |
| 781 | if (dev->ops) { |
| 782 | return; |
| 783 | } |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 784 | |
Yinghai Lu | 5f9624d | 2006-10-04 22:56:21 +0000 | [diff] [blame] | 785 | /* Look through the list of setup drivers and find one for |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 786 | * this PCI device. |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 787 | */ |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 788 | for (driver = &pci_drivers[0]; driver != &epci_drivers[0]; driver++) { |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 789 | if ((driver->vendor == dev->vendor) && |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 790 | (driver->device == dev->device)) { |
Uwe Hermann | 312673c | 2009-10-27 21:49:33 +0000 | [diff] [blame] | 791 | dev->ops = (struct device_operations *)driver->ops; |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 792 | printk(BIOS_SPEW, "%s [%04x/%04x] %sops\n", |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 793 | dev_path(dev), |
| 794 | driver->vendor, driver->device, |
| 795 | (driver->ops->scan_bus ? "bus " : "")); |
Eric Biederman | 5899fd8 | 2003-04-24 06:25:08 +0000 | [diff] [blame] | 796 | return; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 797 | } |
| 798 | } |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 799 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 800 | /* If I don't have a specific driver use the default operations */ |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 801 | switch (dev->hdr_type & 0x7f) { /* header type */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 802 | case PCI_HEADER_TYPE_NORMAL: /* standard header */ |
| 803 | if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) |
| 804 | goto bad; |
| 805 | dev->ops = &default_pci_ops_dev; |
| 806 | break; |
| 807 | case PCI_HEADER_TYPE_BRIDGE: |
| 808 | if ((dev->class >> 8) != PCI_CLASS_BRIDGE_PCI) |
| 809 | goto bad; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 810 | dev->ops = get_pci_bridge_ops(dev); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 811 | break; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 812 | #if CONFIG_CARDBUS_PLUGIN_SUPPORT == 1 |
| 813 | case PCI_HEADER_TYPE_CARDBUS: |
| 814 | dev->ops = &default_cardbus_ops_bus; |
| 815 | break; |
| 816 | #endif |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 817 | default: |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 818 | bad: |
Li-Ta Lo | 69c5a90 | 2004-04-29 20:08:54 +0000 | [diff] [blame] | 819 | if (dev->enabled) { |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 820 | printk(BIOS_ERR, "%s [%04x/%04x/%06x] has unknown header " |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 821 | "type %02x, ignoring.\n", |
| 822 | dev_path(dev), |
| 823 | dev->vendor, dev->device, |
| 824 | dev->class >> 8, dev->hdr_type); |
Eric Biederman | 83b991a | 2003-10-11 06:20:25 +0000 | [diff] [blame] | 825 | } |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 826 | } |
| 827 | return; |
| 828 | } |
| 829 | |
| 830 | /** |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 831 | * @brief See if we have already allocated a device structure for a given devfn. |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 832 | * |
| 833 | * Given a linked list of PCI device structures and a devfn number, find the |
Li-Ta Lo | 3a81285 | 2004-12-03 22:39:34 +0000 | [diff] [blame] | 834 | * device structure correspond to the devfn, if present. This function also |
| 835 | * removes the device structure from the linked list. |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 836 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 837 | * @param list The device structure list. |
| 838 | * @param devfn A device/function number. |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 839 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 840 | * @return Pointer to the device structure found or NULL if we have not |
Li-Ta Lo | 3a81285 | 2004-12-03 22:39:34 +0000 | [diff] [blame] | 841 | * allocated a device for this devfn yet. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 842 | */ |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 843 | static struct device *pci_scan_get_dev(struct device **list, unsigned int devfn) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 844 | { |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 845 | struct device *dev; |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 846 | dev = 0; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 847 | for (; *list; list = &(*list)->sibling) { |
Eric Biederman | ad1b35a | 2003-10-14 02:36:51 +0000 | [diff] [blame] | 848 | if ((*list)->path.type != DEVICE_PATH_PCI) { |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 849 | printk(BIOS_ERR, "child %s not a pci device\n", |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 850 | dev_path(*list)); |
Eric Biederman | ad1b35a | 2003-10-14 02:36:51 +0000 | [diff] [blame] | 851 | continue; |
| 852 | } |
Stefan Reinauer | 2b34db8 | 2009-02-28 20:10:20 +0000 | [diff] [blame] | 853 | if ((*list)->path.pci.devfn == devfn) { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 854 | /* Unlink from the list. */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 855 | dev = *list; |
| 856 | *list = (*list)->sibling; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 857 | dev->sibling = NULL; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 858 | break; |
| 859 | } |
| 860 | } |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 861 | |
| 862 | /* Just like alloc_dev() add the device to the list of devices on the |
| 863 | * bus. When the list of devices was formed we removed all of the |
| 864 | * parents children, and now we are interleaving static and dynamic |
| 865 | * devices in order on the bus. |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 866 | */ |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 867 | if (dev) { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 868 | struct device *child; |
| 869 | /* Find the last child of our parent. */ |
| 870 | for (child = dev->bus->children; child && child->sibling;) { |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 871 | child = child->sibling; |
| 872 | } |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 873 | /* Place the device on the list of children of its parent. */ |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 874 | if (child) { |
| 875 | child->sibling = dev; |
| 876 | } else { |
| 877 | dev->bus->children = dev; |
| 878 | } |
| 879 | } |
| 880 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 881 | return dev; |
| 882 | } |
| 883 | |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 884 | /** |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 885 | * @brief Scan a PCI bus. |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 886 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 887 | * Determine the existence of a given PCI device. Allocate a new struct device |
| 888 | * if dev==NULL was passed in and the device exists in hardware. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 889 | * |
| 890 | * @param bus pointer to the bus structure |
| 891 | * @param devfn to look at |
| 892 | * |
| 893 | * @return The device structure for hte device (if found) |
| 894 | * or the NULL if no device is found. |
| 895 | */ |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 896 | device_t pci_probe_dev(device_t dev, struct bus * bus, unsigned devfn) |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 897 | { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 898 | u32 id, class; |
| 899 | u8 hdr_type; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 900 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 901 | /* Detect if a device is present. */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 902 | if (!dev) { |
| 903 | struct device dummy; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 904 | dummy.bus = bus; |
| 905 | dummy.path.type = DEVICE_PATH_PCI; |
Stefan Reinauer | 2b34db8 | 2009-02-28 20:10:20 +0000 | [diff] [blame] | 906 | dummy.path.pci.devfn = devfn; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 907 | id = pci_read_config32(&dummy, PCI_VENDOR_ID); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 908 | /* Have we found something? |
Stefan Reinauer | 7355c75 | 2010-04-02 16:30:25 +0000 | [diff] [blame] | 909 | * Some broken boards return 0 if a slot is empty, but |
| 910 | * the expected answer is 0xffffffff |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 911 | */ |
Stefan Reinauer | 7355c75 | 2010-04-02 16:30:25 +0000 | [diff] [blame] | 912 | if (id == 0xffffffff) { |
| 913 | return NULL; |
| 914 | } |
| 915 | if ((id == 0x00000000) || (id == 0x0000ffff) || |
| 916 | (id == 0xffff0000)) { |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 917 | printk(BIOS_SPEW, "%s, bad id 0x%x\n", dev_path(&dummy), id); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 918 | return NULL; |
| 919 | } |
| 920 | dev = alloc_dev(bus, &dummy.path); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 921 | } else { |
| 922 | /* Enable/disable the device. Once we have found the device- |
| 923 | * specific operations this operations we will disable the |
| 924 | * device with those as well. |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 925 | * |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 926 | * This is geared toward devices that have subfunctions |
| 927 | * that do not show up by default. |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 928 | * |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 929 | * If a device is a stuff option on the motherboard |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 930 | * it may be absent and enable_dev() must cope. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 931 | */ |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 932 | /* Run the magic enable sequence for the device. */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 933 | if (dev->chip_ops && dev->chip_ops->enable_dev) { |
| 934 | dev->chip_ops->enable_dev(dev); |
| 935 | } |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 936 | /* Now read the vendor and device ID. */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 937 | id = pci_read_config32(dev, PCI_VENDOR_ID); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 938 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 939 | /* If the device does not have a PCI ID disable it. Possibly |
| 940 | * this is because we have already disabled the device. But |
| 941 | * this also handles optional devices that may not always |
| 942 | * show up. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 943 | */ |
| 944 | /* If the chain is fully enumerated quit */ |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 945 | if ((id == 0xffffffff) || (id == 0x00000000) || |
| 946 | (id == 0x0000ffff) || (id == 0xffff0000)) { |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 947 | if (dev->enabled) { |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 948 | printk(BIOS_INFO, "PCI: Static device %s not found, disabling it.\n", |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 949 | dev_path(dev)); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 950 | dev->enabled = 0; |
| 951 | } |
| 952 | return dev; |
| 953 | } |
| 954 | } |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 955 | /* Read the rest of the PCI configuration information. */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 956 | hdr_type = pci_read_config8(dev, PCI_HEADER_TYPE); |
| 957 | class = pci_read_config32(dev, PCI_CLASS_REVISION); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 958 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 959 | /* Store the interesting information in the device structure. */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 960 | dev->vendor = id & 0xffff; |
| 961 | dev->device = (id >> 16) & 0xffff; |
| 962 | dev->hdr_type = hdr_type; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 963 | |
| 964 | /* Class code, the upper 3 bytes of PCI_CLASS_REVISION. */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 965 | dev->class = class >> 8; |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 966 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 967 | /* Architectural/System devices always need to be bus masters. */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 968 | if ((dev->class >> 16) == PCI_BASE_CLASS_SYSTEM) { |
| 969 | dev->command |= PCI_COMMAND_MASTER; |
| 970 | } |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 971 | /* Look at the vendor and device ID, or at least the header type and |
| 972 | * class and figure out which set of configuration methods to use. |
| 973 | * Unless we already have some PCI ops. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 974 | */ |
| 975 | set_pci_ops(dev); |
| 976 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 977 | /* Now run the magic enable/disable sequence for the device. */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 978 | if (dev->ops && dev->ops->enable) { |
| 979 | dev->ops->enable(dev); |
| 980 | } |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 981 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 982 | /* Display the device. */ |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 983 | printk(BIOS_DEBUG, "%s [%04x/%04x] %s%s\n", |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 984 | dev_path(dev), |
| 985 | dev->vendor, dev->device, |
| 986 | dev->enabled ? "enabled" : "disabled", |
| 987 | dev->ops ? "" : " No operations"); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 988 | |
| 989 | return dev; |
| 990 | } |
| 991 | |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 992 | /** |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 993 | * @brief Scan a PCI bus. |
| 994 | * |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 995 | * Determine the existence of devices and bridges on a PCI bus. If there are |
| 996 | * bridges on the bus, recursively scan the buses behind the bridges. |
| 997 | * |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 998 | * This function is the default scan_bus() method for the root device |
| 999 | * 'dev_root'. |
| 1000 | * |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1001 | * @param bus pointer to the bus structure |
| 1002 | * @param min_devfn minimum devfn to look at in the scan usually 0x00 |
| 1003 | * @param max_devfn maximum devfn to look at in the scan usually 0xff |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1004 | * @param max current bus number |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 1005 | * |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1006 | * @return The maximum bus number found, after scanning all subordinate busses |
| 1007 | */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1008 | unsigned int pci_scan_bus(struct bus *bus, |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1009 | unsigned min_devfn, unsigned max_devfn, |
| 1010 | unsigned int max) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1011 | { |
| 1012 | unsigned int devfn; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1013 | struct device *old_devices; |
| 1014 | struct device *child; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1015 | |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 1016 | #if CONFIG_PCI_BUS_SEGN_BITS |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 1017 | printk(BIOS_DEBUG, "PCI: pci_scan_bus for bus %04x:%02x\n", |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1018 | bus->secondary >> 8, bus->secondary & 0xff); |
Yinghai Lu | 5f9624d | 2006-10-04 22:56:21 +0000 | [diff] [blame] | 1019 | #else |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 1020 | printk(BIOS_DEBUG, "PCI: pci_scan_bus for bus %02x\n", bus->secondary); |
Yinghai Lu | 5f9624d | 2006-10-04 22:56:21 +0000 | [diff] [blame] | 1021 | #endif |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1022 | |
| 1023 | old_devices = bus->children; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1024 | bus->children = NULL; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1025 | |
| 1026 | post_code(0x24); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1027 | /* Probe all devices/functions on this bus with some optimization for |
| 1028 | * non-existence and single function devices. |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 1029 | */ |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1030 | for (devfn = min_devfn; devfn <= max_devfn; devfn++) { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1031 | struct device *dev; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1032 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 1033 | /* First thing setup the device structure */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1034 | dev = pci_scan_get_dev(&old_devices, devfn); |
Li-Ta Lo | 9782f75 | 2004-05-05 21:15:42 +0000 | [diff] [blame] | 1035 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1036 | /* See if a device is present and setup the device structure. */ |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1037 | dev = pci_probe_dev(dev, bus, devfn); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 1038 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1039 | /* If this is not a multi function device, or the device is |
| 1040 | * not present don't waste time probing another function. |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1041 | * Skip to next device. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1042 | */ |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1043 | if ((PCI_FUNC(devfn) == 0x00) && |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1044 | (!dev |
| 1045 | || (dev->enabled && ((dev->hdr_type & 0x80) != 0x80)))) { |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1046 | devfn += 0x07; |
| 1047 | } |
| 1048 | } |
| 1049 | post_code(0x25); |
| 1050 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1051 | /* Warn if any leftover static devices are are found. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1052 | * There's probably a problem in the Config.lb. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1053 | */ |
| 1054 | if (old_devices) { |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1055 | device_t left; |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 1056 | printk(BIOS_WARNING, "PCI: Left over static devices:\n"); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1057 | for (left = old_devices; left; left = left->sibling) { |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 1058 | printk(BIOS_WARNING, "%s\n", dev_path(left)); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1059 | } |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 1060 | printk(BIOS_WARNING, "PCI: Check your mainboard Config.lb.\n"); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1061 | } |
| 1062 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1063 | /* For all children that implement scan_bus() (i.e. bridges) |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 1064 | * scan the bus behind that child. |
| 1065 | */ |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1066 | for (child = bus->children; child; child = child->sibling) { |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1067 | max = scan_bus(child, max); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1068 | } |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 1069 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1070 | /* We've scanned the bus and so we know all about what's on the other |
| 1071 | * side of any bridges that may be on this bus plus any devices. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1072 | * Return how far we've got finding sub-buses. |
| 1073 | */ |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 1074 | printk(BIOS_DEBUG, "PCI: pci_scan_bus returning with max=%03x\n", max); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1075 | post_code(0x55); |
| 1076 | return max; |
| 1077 | } |
| 1078 | |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 1079 | /** |
| 1080 | * @brief Scan a PCI bridge and the buses behind the bridge. |
| 1081 | * |
| 1082 | * Determine the existence of buses behind the bridge. Set up the bridge |
| 1083 | * according to the result of the scan. |
| 1084 | * |
| 1085 | * This function is the default scan_bus() method for PCI bridge devices. |
| 1086 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1087 | * @param dev Pointer to the bridge device. |
| 1088 | * @param max The highest bus number assigned up to now. |
| 1089 | * @return The maximum bus number found, after scanning all subordinate buses. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1090 | */ |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1091 | unsigned int do_pci_scan_bridge(struct device *dev, unsigned int max, |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1092 | unsigned int (*do_scan_bus) (struct bus * bus, |
| 1093 | unsigned min_devfn, |
| 1094 | unsigned max_devfn, |
| 1095 | unsigned int max)) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1096 | { |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1097 | struct bus *bus; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1098 | u32 buses; |
| 1099 | u16 cr; |
Eric Biederman | 83b991a | 2003-10-11 06:20:25 +0000 | [diff] [blame] | 1100 | |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 1101 | printk(BIOS_SPEW, "%s for %s\n", __func__, dev_path(dev)); |
Li-Ta Lo | 3a81285 | 2004-12-03 22:39:34 +0000 | [diff] [blame] | 1102 | |
Myles Watson | 894a347 | 2010-06-09 22:41:35 +0000 | [diff] [blame^] | 1103 | if (dev->link_list == NULL) { |
| 1104 | struct bus *link; |
| 1105 | link = malloc(sizeof(*link)); |
| 1106 | if (link == NULL) |
| 1107 | die("Couldn't allocate a link!\n"); |
| 1108 | memset(link, 0, sizeof(*link)); |
| 1109 | link->dev = dev; |
| 1110 | dev->link_list = link; |
| 1111 | } |
| 1112 | |
| 1113 | bus = dev->link_list; |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1114 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1115 | /* Set up the primary, secondary and subordinate bus numbers. We have |
| 1116 | * no idea how many buses are behind this bridge yet, so we set the |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1117 | * subordinate bus number to 0xff for the moment. |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 1118 | */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1119 | bus->secondary = ++max; |
| 1120 | bus->subordinate = 0xff; |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 1121 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1122 | /* Clear all status bits and turn off memory, I/O and master enables. */ |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1123 | cr = pci_read_config16(dev, PCI_COMMAND); |
| 1124 | pci_write_config16(dev, PCI_COMMAND, 0x0000); |
| 1125 | pci_write_config16(dev, PCI_STATUS, 0xffff); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1126 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1127 | /* Read the existing primary/secondary/subordinate bus |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 1128 | * number configuration. |
| 1129 | */ |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1130 | buses = pci_read_config32(dev, PCI_PRIMARY_BUS); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1131 | |
| 1132 | /* Configure the bus numbers for this bridge: the configuration |
| 1133 | * transactions will not be propagated by the bridge if it is not |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 1134 | * correctly configured. |
| 1135 | */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1136 | buses &= 0xff000000; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1137 | buses |= (((unsigned int)(dev->bus->secondary) << 0) | |
| 1138 | ((unsigned int)(bus->secondary) << 8) | |
| 1139 | ((unsigned int)(bus->subordinate) << 16)); |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1140 | pci_write_config32(dev, PCI_PRIMARY_BUS, buses); |
Li-Ta Lo | 3a81285 | 2004-12-03 22:39:34 +0000 | [diff] [blame] | 1141 | |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1142 | /* Now we can scan all subordinate buses |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 1143 | * i.e. the bus behind the bridge. |
| 1144 | */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1145 | max = do_scan_bus(bus, 0x00, 0xff, max); |
Li-Ta Lo | 3a81285 | 2004-12-03 22:39:34 +0000 | [diff] [blame] | 1146 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1147 | /* We know the number of buses behind this bridge. Set the subordinate |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 1148 | * bus number to its real value. |
| 1149 | */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1150 | bus->subordinate = max; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1151 | buses = (buses & 0xff00ffff) | ((unsigned int)(bus->subordinate) << 16); |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1152 | pci_write_config32(dev, PCI_PRIMARY_BUS, buses); |
| 1153 | pci_write_config16(dev, PCI_COMMAND, cr); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1154 | |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 1155 | printk(BIOS_SPEW, "%s returns max %d\n", __func__, max); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1156 | return max; |
| 1157 | } |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 1158 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1159 | /** |
| 1160 | * @brief Scan a PCI bridge and the buses behind the bridge. |
| 1161 | * |
| 1162 | * Determine the existence of buses behind the bridge. Set up the bridge |
| 1163 | * according to the result of the scan. |
| 1164 | * |
| 1165 | * This function is the default scan_bus() method for PCI bridge devices. |
| 1166 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1167 | * @param dev Pointer to the bridge device. |
| 1168 | * @param max The highest bus number assigned up to now. |
| 1169 | * @return The maximum bus number found, after scanning all subordinate buses. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1170 | */ |
| 1171 | unsigned int pci_scan_bridge(struct device *dev, unsigned int max) |
| 1172 | { |
| 1173 | return do_pci_scan_bridge(dev, max, pci_scan_bus); |
| 1174 | } |
| 1175 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1176 | /** |
| 1177 | * @brief Scan a PCI domain. |
| 1178 | * |
| 1179 | * This function is the default scan_bus() method for PCI domains. |
| 1180 | * |
| 1181 | * @param dev pointer to the domain |
| 1182 | * @param max the highest bus number assgined up to now |
| 1183 | * |
| 1184 | * @return The maximum bus number found, after scanning all subordinate busses |
| 1185 | */ |
| 1186 | unsigned int pci_domain_scan_bus(device_t dev, unsigned int max) |
| 1187 | { |
Myles Watson | 894a347 | 2010-06-09 22:41:35 +0000 | [diff] [blame^] | 1188 | max = pci_scan_bus(dev->link_list, PCI_DEVFN(0, 0), 0xff, max); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1189 | return max; |
| 1190 | } |
| 1191 | |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1192 | #if CONFIG_PC80_SYSTEM == 1 |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1193 | /** |
Stefan Reinauer | 14e2277 | 2010-04-27 06:56:47 +0000 | [diff] [blame] | 1194 | * |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1195 | * @brief Assign IRQ numbers |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1196 | * |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1197 | * This function assigns IRQs for all functions contained within the indicated |
| 1198 | * device address. If the device does not exist or does not require interrupts |
| 1199 | * then this function has no effect. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1200 | * |
| 1201 | * This function should be called for each PCI slot in your system. |
| 1202 | * |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1203 | * @param bus |
| 1204 | * @param slot |
| 1205 | * @param pIntAtoD is an array of IRQ #s that are assigned to PINTA through |
Stefan Reinauer | 14e2277 | 2010-04-27 06:56:47 +0000 | [diff] [blame] | 1206 | * PINTD of this slot. The particular irq #s that are passed in |
| 1207 | * depend on the routing inside your southbridge and on your |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1208 | * motherboard. |
| 1209 | */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1210 | void pci_assign_irqs(unsigned bus, unsigned slot, |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1211 | const unsigned char pIntAtoD[4]) |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1212 | { |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1213 | unsigned int funct; |
| 1214 | device_t pdev; |
| 1215 | u8 line; |
| 1216 | u8 irq; |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1217 | |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1218 | /* Each slot may contain up to eight functions */ |
| 1219 | for (funct = 0; funct < 8; funct++) { |
| 1220 | pdev = dev_find_slot(bus, (slot << 3) + funct); |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1221 | |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1222 | if (!pdev) |
| 1223 | continue; |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1224 | |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1225 | line = pci_read_config8(pdev, PCI_INTERRUPT_PIN); |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1226 | |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1227 | // PCI spec says all values except 1..4 are reserved. |
| 1228 | if ((line < 1) || (line > 4)) |
| 1229 | continue; |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1230 | |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1231 | irq = pIntAtoD[line - 1]; |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1232 | |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 1233 | printk(BIOS_DEBUG, "Assigning IRQ %d to %d:%x.%d\n", |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1234 | irq, bus, slot, funct); |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1235 | |
Stefan Reinauer | 14e2277 | 2010-04-27 06:56:47 +0000 | [diff] [blame] | 1236 | pci_write_config8(pdev, PCI_INTERRUPT_LINE, |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1237 | pIntAtoD[line - 1]); |
| 1238 | |
| 1239 | #ifdef PARANOID_IRQ_ASSIGNMENTS |
Myles Watson | 17aeeca | 2009-10-07 18:41:08 +0000 | [diff] [blame] | 1240 | irq = pci_read_config8(pdev, PCI_INTERRUPT_LINE); |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 1241 | printk(BIOS_DEBUG, " Readback = %d\n", irq); |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1242 | #endif |
| 1243 | |
| 1244 | // Change to level triggered |
| 1245 | i8259_configure_irq_trigger(pIntAtoD[line - 1], IRQ_LEVEL_TRIGGERED); |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1246 | } |
| 1247 | } |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1248 | #endif |
| 1249 | |