Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1 | /* |
Stefan Reinauer | 7e61e45 | 2008-01-18 10:35:56 +0000 | [diff] [blame] | 2 | * This file is part of the coreboot project. |
Uwe Hermann | b80dbf0 | 2007-04-22 19:08:13 +0000 | [diff] [blame] | 3 | * |
| 4 | * It was originally based on the Linux kernel (drivers/pci/pci.c). |
| 5 | * |
| 6 | * Modifications are: |
| 7 | * Copyright (C) 2003-2004 Linux Networx |
| 8 | * (Written by Eric Biederman <ebiederman@lnxi.com> for Linux Networx) |
| 9 | * Copyright (C) 2003-2006 Ronald G. Minnich <rminnich@gmail.com> |
| 10 | * Copyright (C) 2004-2005 Li-Ta Lo <ollie@lanl.gov> |
| 11 | * Copyright (C) 2005-2006 Tyan |
| 12 | * (Written by Yinghai Lu <yhlu@tyan.com> for Tyan) |
Patrick Georgi | 16cdbb2 | 2009-04-21 20:14:31 +0000 | [diff] [blame] | 13 | * Copyright (C) 2005-2009 coresystems GmbH |
| 14 | * (Written by Stefan Reinauer <stepan@coresystems.de> for coresystems GmbH) |
Uwe Hermann | b80dbf0 | 2007-04-22 19:08:13 +0000 | [diff] [blame] | 15 | */ |
| 16 | |
| 17 | /* |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 18 | * PCI Bus Services, see include/linux/pci.h for further explanation. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 19 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 20 | * Copyright 1993 -- 1997 Drew Eckhardt, Frederic Potter, |
| 21 | * David Mosberger-Tang |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 22 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 23 | * Copyright 1997 -- 1999 Martin Mares <mj@atrey.karlin.mff.cuni.cz> |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 24 | */ |
| 25 | |
| 26 | #include <console/console.h> |
| 27 | #include <stdlib.h> |
| 28 | #include <stdint.h> |
| 29 | #include <bitops.h> |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 30 | #include <string.h> |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 31 | #include <arch/io.h> |
Eric Biederman | 5899fd8 | 2003-04-24 06:25:08 +0000 | [diff] [blame] | 32 | #include <device/device.h> |
| 33 | #include <device/pci.h> |
| 34 | #include <device/pci_ids.h> |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 35 | #include <part/hard_reset.h> |
Eric Biederman | 30e143a | 2003-09-01 23:45:32 +0000 | [diff] [blame] | 36 | #include <part/fallback_boot.h> |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 37 | #include <delay.h> |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 38 | #if CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT == 1 |
| 39 | #include <device/hypertransport.h> |
| 40 | #endif |
| 41 | #if CONFIG_PCIX_PLUGIN_SUPPORT == 1 |
| 42 | #include <device/pcix.h> |
| 43 | #endif |
| 44 | #if CONFIG_PCIEXP_PLUGIN_SUPPORT == 1 |
| 45 | #include <device/pciexp.h> |
| 46 | #endif |
Stefan Reinauer | ec75a57 | 2009-03-16 15:27:00 +0000 | [diff] [blame] | 47 | #if CONFIG_AGP_PLUGIN_SUPPORT == 1 |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 48 | #include <device/agp.h> |
| 49 | #endif |
| 50 | #if CONFIG_CARDBUS_PLUGIN_SUPPORT == 1 |
| 51 | #include <device/cardbus.h> |
| 52 | #endif |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 53 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 54 | u8 pci_moving_config8(struct device *dev, unsigned int reg) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 55 | { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 56 | u8 value, ones, zeroes; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 57 | value = pci_read_config8(dev, reg); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 58 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 59 | pci_write_config8(dev, reg, 0xff); |
| 60 | ones = pci_read_config8(dev, reg); |
| 61 | |
| 62 | pci_write_config8(dev, reg, 0x00); |
| 63 | zeroes = pci_read_config8(dev, reg); |
| 64 | |
| 65 | pci_write_config8(dev, reg, value); |
| 66 | |
| 67 | return ones ^ zeroes; |
| 68 | } |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 69 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 70 | u16 pci_moving_config16(struct device * dev, unsigned int reg) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 71 | { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 72 | u16 value, ones, zeroes; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 73 | value = pci_read_config16(dev, reg); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 74 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 75 | pci_write_config16(dev, reg, 0xffff); |
| 76 | ones = pci_read_config16(dev, reg); |
| 77 | |
| 78 | pci_write_config16(dev, reg, 0x0000); |
| 79 | zeroes = pci_read_config16(dev, reg); |
| 80 | |
| 81 | pci_write_config16(dev, reg, value); |
| 82 | |
| 83 | return ones ^ zeroes; |
| 84 | } |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 85 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 86 | u32 pci_moving_config32(struct device * dev, unsigned int reg) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 87 | { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 88 | u32 value, ones, zeroes; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 89 | value = pci_read_config32(dev, reg); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 90 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 91 | pci_write_config32(dev, reg, 0xffffffff); |
| 92 | ones = pci_read_config32(dev, reg); |
| 93 | |
| 94 | pci_write_config32(dev, reg, 0x00000000); |
| 95 | zeroes = pci_read_config32(dev, reg); |
| 96 | |
| 97 | pci_write_config32(dev, reg, value); |
| 98 | |
| 99 | return ones ^ zeroes; |
| 100 | } |
| 101 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 102 | /** |
| 103 | * Given a device, a capability type, and a last position, return the next |
| 104 | * matching capability. Always start at the head of the list. |
| 105 | * |
| 106 | * @param dev Pointer to the device structure. |
| 107 | * @param cap_type PCI_CAP_LIST_ID of the PCI capability we're looking for. |
| 108 | * @param last Location of the PCI capability register to start from. |
| 109 | */ |
| 110 | unsigned pci_find_next_capability(struct device *dev, unsigned cap, |
| 111 | unsigned last) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 112 | { |
| 113 | unsigned pos; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 114 | unsigned status; |
| 115 | unsigned reps = 48; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 116 | pos = 0; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 117 | status = pci_read_config16(dev, PCI_STATUS); |
| 118 | if (!(status & PCI_STATUS_CAP_LIST)) { |
| 119 | return 0; |
| 120 | } |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 121 | switch (dev->hdr_type & 0x7f) { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 122 | case PCI_HEADER_TYPE_NORMAL: |
| 123 | case PCI_HEADER_TYPE_BRIDGE: |
| 124 | pos = PCI_CAPABILITY_LIST; |
| 125 | break; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 126 | case PCI_HEADER_TYPE_CARDBUS: |
| 127 | pos = PCI_CB_CAPABILITY_LIST; |
| 128 | break; |
| 129 | default: |
| 130 | return 0; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 131 | } |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 132 | pos = pci_read_config8(dev, pos); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 133 | while (reps-- && (pos >= 0x40)) { /* Loop through the linked list. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 134 | int this_cap; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 135 | pos &= ~3; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 136 | this_cap = pci_read_config8(dev, pos + PCI_CAP_LIST_ID); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 137 | printk_spew("Capability: type 0x%02x @ 0x%02x\n", this_cap, |
| 138 | pos); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 139 | if (this_cap == 0xff) { |
| 140 | break; |
| 141 | } |
| 142 | if (!last && (this_cap == cap)) { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 143 | return pos; |
| 144 | } |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 145 | if (last == pos) { |
| 146 | last = 0; |
| 147 | } |
| 148 | pos = pci_read_config8(dev, pos + PCI_CAP_LIST_NEXT); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 149 | } |
| 150 | return 0; |
| 151 | } |
| 152 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 153 | /** |
| 154 | * Given a device, and a capability type, return the next matching |
| 155 | * capability. Always start at the head of the list. |
| 156 | * |
| 157 | * @param dev Pointer to the device structure. |
| 158 | * @param cap_type PCI_CAP_LIST_ID of the PCI capability we're looking for. |
| 159 | */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 160 | unsigned pci_find_capability(device_t dev, unsigned cap) |
| 161 | { |
| 162 | return pci_find_next_capability(dev, cap, 0); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 163 | } |
| 164 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 165 | /** |
| 166 | * Given a device and register, read the size of the BAR for that register. |
| 167 | * |
| 168 | * @param dev Pointer to the device structure. |
| 169 | * @param index Address of the PCI configuration register. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 170 | */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 171 | struct resource *pci_get_resource(struct device *dev, unsigned long index) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 172 | { |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 173 | struct resource *resource; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 174 | unsigned long value, attr; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 175 | resource_t moving, limit; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 176 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 177 | /* Initialize the resources to nothing. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 178 | resource = new_resource(dev, index); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 179 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 180 | /* Get the initial value. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 181 | value = pci_read_config32(dev, index); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 182 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 183 | /* See which bits move. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 184 | moving = pci_moving_config32(dev, index); |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 185 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 186 | /* Initialize attr to the bits that do not move. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 187 | attr = value & ~moving; |
| 188 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 189 | /* If it is a 64bit resource look at the high half as well. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 190 | if (((attr & PCI_BASE_ADDRESS_SPACE_IO) == 0) && |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 191 | ((attr & PCI_BASE_ADDRESS_MEM_LIMIT_MASK) == |
| 192 | PCI_BASE_ADDRESS_MEM_LIMIT_64)) { |
| 193 | /* Find the high bits that move. */ |
| 194 | moving |= |
| 195 | ((resource_t) pci_moving_config32(dev, index + 4)) << 32; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 196 | } |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 197 | /* Find the resource constraints. |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 198 | * Start by finding the bits that move. From there: |
| 199 | * - Size is the least significant bit of the bits that move. |
| 200 | * - Limit is all of the bits that move plus all of the lower bits. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 201 | * See PCI Spec 6.2.5.1. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 202 | */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 203 | limit = 0; |
| 204 | if (moving) { |
| 205 | resource->size = 1; |
| 206 | resource->align = resource->gran = 0; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 207 | while (!(moving & resource->size)) { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 208 | resource->size <<= 1; |
| 209 | resource->align += 1; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 210 | resource->gran += 1; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 211 | } |
| 212 | resource->limit = limit = moving | (resource->size - 1); |
| 213 | } |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 214 | |
| 215 | /* Some broken hardware has read-only registers that do not |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 216 | * really size correctly. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 217 | * Example: the Acer M7229 has BARs 1-4 normally read-only. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 218 | * so BAR1 at offset 0x10 reads 0x1f1. If you size that register |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 219 | * by writing 0xffffffff to it, it will read back as 0x1f1 -- a |
| 220 | * violation of the spec. |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 221 | * We catch this case and ignore it by observing which bits move, |
| 222 | * This also catches the common case unimplemented registers |
| 223 | * that always read back as 0. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 224 | */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 225 | if (moving == 0) { |
| 226 | if (value != 0) { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 227 | printk_debug |
| 228 | ("%s register %02lx(%08lx), read-only ignoring it\n", |
| 229 | dev_path(dev), index, value); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 230 | } |
| 231 | resource->flags = 0; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 232 | } else if (attr & PCI_BASE_ADDRESS_SPACE_IO) { |
| 233 | /* An I/O mapped base address. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 234 | attr &= PCI_BASE_ADDRESS_IO_ATTR_MASK; |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 235 | resource->flags |= IORESOURCE_IO; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 236 | /* I don't want to deal with 32bit I/O resources. */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 237 | resource->limit = 0xffff; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 238 | } else { |
| 239 | /* A Memory mapped base address. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 240 | attr &= PCI_BASE_ADDRESS_MEM_ATTR_MASK; |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 241 | resource->flags |= IORESOURCE_MEM; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 242 | if (attr & PCI_BASE_ADDRESS_MEM_PREFETCH) { |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 243 | resource->flags |= IORESOURCE_PREFETCH; |
| 244 | } |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 245 | attr &= PCI_BASE_ADDRESS_MEM_LIMIT_MASK; |
| 246 | if (attr == PCI_BASE_ADDRESS_MEM_LIMIT_32) { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 247 | /* 32bit limit. */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 248 | resource->limit = 0xffffffffUL; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 249 | } else if (attr == PCI_BASE_ADDRESS_MEM_LIMIT_1M) { |
| 250 | /* 1MB limit. */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 251 | resource->limit = 0x000fffffUL; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 252 | } else if (attr == PCI_BASE_ADDRESS_MEM_LIMIT_64) { |
| 253 | /* 64bit limit. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 254 | resource->limit = 0xffffffffffffffffULL; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 255 | resource->flags |= IORESOURCE_PCI64; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 256 | } else { |
| 257 | /* Invalid value. */ |
| 258 | printk_err("Broken BAR with value %lx\n", attr); |
| 259 | printk_err(" on dev %s at index %02lx\n", |
| 260 | dev_path(dev), index); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 261 | resource->flags = 0; |
| 262 | } |
| 263 | } |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 264 | /* Don't let the limit exceed which bits can move. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 265 | if (resource->limit > limit) { |
| 266 | resource->limit = limit; |
| 267 | } |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 268 | |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 269 | return resource; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 270 | } |
| 271 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 272 | /** |
| 273 | * Given a device and an index, read the size of the BAR for that register. |
| 274 | * |
| 275 | * @param dev Pointer to the device structure. |
| 276 | * @param index Address of the PCI configuration register. |
| 277 | */ |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 278 | static void pci_get_rom_resource(struct device *dev, unsigned long index) |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 279 | { |
| 280 | struct resource *resource; |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 281 | unsigned long value; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 282 | resource_t moving; |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 283 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 284 | if ((dev->on_mainboard) && (dev->rom_address == 0)) { |
| 285 | /* Skip it if rom_address is not set in the MB Config.lb. */ |
| 286 | return; |
| 287 | } |
Yinghai Lu | bcde161 | 2005-01-14 05:34:09 +0000 | [diff] [blame] | 288 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 289 | /* Initialize the resources to nothing. */ |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 290 | resource = new_resource(dev, index); |
| 291 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 292 | /* Get the initial value. */ |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 293 | value = pci_read_config32(dev, index); |
| 294 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 295 | /* See which bits move. */ |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 296 | moving = pci_moving_config32(dev, index); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 297 | |
| 298 | /* Clear the Enable bit. */ |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 299 | moving = moving & ~PCI_ROM_ADDRESS_ENABLE; |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 300 | |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 301 | /* Find the resource constraints. |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 302 | * Start by finding the bits that move. From there: |
| 303 | * - Size is the least significant bit of the bits that move. |
| 304 | * - Limit is all of the bits that move plus all of the lower bits. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 305 | * See PCI Spec 6.2.5.1. |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 306 | */ |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 307 | if (moving) { |
| 308 | resource->size = 1; |
| 309 | resource->align = resource->gran = 0; |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 310 | while (!(moving & resource->size)) { |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 311 | resource->size <<= 1; |
| 312 | resource->align += 1; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 313 | resource->gran += 1; |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 314 | } |
Patrick Georgi | 16cdbb2 | 2009-04-21 20:14:31 +0000 | [diff] [blame] | 315 | resource->limit = moving | (resource->size - 1); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 316 | resource->flags |= IORESOURCE_MEM | IORESOURCE_READONLY; |
| 317 | } else { |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 318 | if (value != 0) { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 319 | printk_debug |
| 320 | ("%s register %02lx(%08lx), read-only ignoring it\n", |
| 321 | dev_path(dev), index, value); |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 322 | } |
| 323 | resource->flags = 0; |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 324 | } |
Yinghai Lu | c7870ac | 2005-01-13 19:14:52 +0000 | [diff] [blame] | 325 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 326 | /* For on board device with embedded ROM image, the ROM image is at |
Yinghai Lu | c7870ac | 2005-01-13 19:14:52 +0000 | [diff] [blame] | 327 | * fixed address specified in the Config.lb, the dev->rom_address is |
| 328 | * inited by driver_pci_onboard_ops::enable_dev() */ |
Yinghai Lu | bcde161 | 2005-01-14 05:34:09 +0000 | [diff] [blame] | 329 | if ((dev->on_mainboard) && (dev->rom_address != 0)) { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 330 | resource->base = dev->rom_address; |
Yinghai Lu | c7870ac | 2005-01-13 19:14:52 +0000 | [diff] [blame] | 331 | resource->flags |= IORESOURCE_MEM | IORESOURCE_READONLY | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 332 | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 333 | } |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 334 | |
| 335 | compact_resources(dev); |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 336 | } |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 337 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 338 | /** |
| 339 | * Read the base address registers for a given device. |
| 340 | * |
| 341 | * @param dev Pointer to the dev structure. |
| 342 | * @param howmany How many registers to read (6 for device, 2 for bridge). |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 343 | */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 344 | static void pci_read_bases(struct device *dev, unsigned int howmany) |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 345 | { |
| 346 | unsigned long index; |
| 347 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 348 | for (index = PCI_BASE_ADDRESS_0; |
| 349 | (index < PCI_BASE_ADDRESS_0 + (howmany << 2));) { |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 350 | struct resource *resource; |
| 351 | resource = pci_get_resource(dev, index); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 352 | index += (resource->flags & IORESOURCE_PCI64) ? 8 : 4; |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 353 | } |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 354 | |
| 355 | compact_resources(dev); |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 356 | } |
| 357 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 358 | static void pci_record_bridge_resource(struct device *dev, resource_t moving, |
| 359 | unsigned index, unsigned long type) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 360 | { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 361 | /* Initialize the constraints on the current bus. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 362 | struct resource *resource; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 363 | resource = NULL; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 364 | if (moving) { |
| 365 | unsigned long gran; |
| 366 | resource_t step; |
| 367 | resource = new_resource(dev, index); |
| 368 | resource->size = 0; |
| 369 | gran = 0; |
| 370 | step = 1; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 371 | while ((moving & step) == 0) { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 372 | gran += 1; |
| 373 | step <<= 1; |
| 374 | } |
| 375 | resource->gran = gran; |
| 376 | resource->align = gran; |
| 377 | resource->limit = moving | (step - 1); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 378 | resource->flags = type | IORESOURCE_PCI_BRIDGE | |
| 379 | IORESOURCE_BRIDGE; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 380 | } |
| 381 | return; |
| 382 | } |
| 383 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 384 | static void pci_bridge_read_bases(struct device *dev) |
| 385 | { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 386 | resource_t moving_base, moving_limit, moving; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 387 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 388 | /* See if the bridge I/O resources are implemented. */ |
| 389 | moving_base = ((u32) pci_moving_config8(dev, PCI_IO_BASE)) << 8; |
| 390 | moving_base |= |
| 391 | ((u32) pci_moving_config16(dev, PCI_IO_BASE_UPPER16)) << 16; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 392 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 393 | moving_limit = ((u32) pci_moving_config8(dev, PCI_IO_LIMIT)) << 8; |
| 394 | moving_limit |= |
| 395 | ((u32) pci_moving_config16(dev, PCI_IO_LIMIT_UPPER16)) << 16; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 396 | |
| 397 | moving = moving_base & moving_limit; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 398 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 399 | /* Initialize the I/O space constraints on the current bus. */ |
| 400 | pci_record_bridge_resource(dev, moving, PCI_IO_BASE, IORESOURCE_IO); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 401 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 402 | /* See if the bridge prefmem resources are implemented. */ |
| 403 | moving_base = |
| 404 | ((resource_t) pci_moving_config16(dev, PCI_PREF_MEMORY_BASE)) << 16; |
| 405 | moving_base |= |
| 406 | ((resource_t) pci_moving_config32(dev, PCI_PREF_BASE_UPPER32)) << |
| 407 | 32; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 408 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 409 | moving_limit = |
| 410 | ((resource_t) pci_moving_config16(dev, PCI_PREF_MEMORY_LIMIT)) << |
| 411 | 16; |
| 412 | moving_limit |= |
| 413 | ((resource_t) pci_moving_config32(dev, PCI_PREF_LIMIT_UPPER32)) << |
| 414 | 32; |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 415 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 416 | moving = moving_base & moving_limit; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 417 | /* Initialize the prefetchable memory constraints on the current bus. */ |
| 418 | pci_record_bridge_resource(dev, moving, PCI_PREF_MEMORY_BASE, |
| 419 | IORESOURCE_MEM | IORESOURCE_PREFETCH); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 420 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 421 | /* See if the bridge mem resources are implemented. */ |
| 422 | moving_base = ((u32) pci_moving_config16(dev, PCI_MEMORY_BASE)) << 16; |
| 423 | moving_limit = ((u32) pci_moving_config16(dev, PCI_MEMORY_LIMIT)) << 16; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 424 | |
| 425 | moving = moving_base & moving_limit; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 426 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 427 | /* Initialize the memory resources on the current bus. */ |
| 428 | pci_record_bridge_resource(dev, moving, PCI_MEMORY_BASE, |
| 429 | IORESOURCE_MEM); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 430 | |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 431 | compact_resources(dev); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 432 | } |
| 433 | |
Eric Biederman | 5899fd8 | 2003-04-24 06:25:08 +0000 | [diff] [blame] | 434 | void pci_dev_read_resources(struct device *dev) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 435 | { |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 436 | pci_read_bases(dev, 6); |
| 437 | pci_get_rom_resource(dev, PCI_ROM_ADDRESS); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 438 | } |
| 439 | |
Eric Biederman | 5899fd8 | 2003-04-24 06:25:08 +0000 | [diff] [blame] | 440 | void pci_bus_read_resources(struct device *dev) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 441 | { |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 442 | pci_bridge_read_bases(dev); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 443 | pci_read_bases(dev, 2); |
| 444 | pci_get_rom_resource(dev, PCI_ROM_ADDRESS1); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 445 | } |
| 446 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 447 | void pci_domain_read_resources(struct device *dev) |
| 448 | { |
| 449 | struct resource *res; |
| 450 | |
| 451 | /* Initialize the system-wide I/O space constraints. */ |
| 452 | res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0)); |
| 453 | res->limit = 0xffffUL; |
| 454 | res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | |
| 455 | IORESOURCE_ASSIGNED; |
| 456 | |
| 457 | /* Initialize the system-wide memory resources constraints. */ |
| 458 | res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0)); |
| 459 | res->limit = 0xffffffffULL; |
| 460 | res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | |
| 461 | IORESOURCE_ASSIGNED; |
| 462 | } |
| 463 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 464 | static void pci_set_resource(struct device *dev, struct resource *resource) |
| 465 | { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 466 | resource_t base, end; |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 467 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 468 | /* Make certain the resource has actually been assigned a value. */ |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 469 | if (!(resource->flags & IORESOURCE_ASSIGNED)) { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 470 | printk_err("ERROR: %s %02lx %s size: 0x%010llx not assigned\n", |
| 471 | dev_path(dev), resource->index, |
| 472 | resource_type(resource), resource->size); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 473 | return; |
| 474 | } |
| 475 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 476 | /* If I have already stored this resource don't worry about it. */ |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 477 | if (resource->flags & IORESOURCE_STORED) { |
| 478 | return; |
| 479 | } |
| 480 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 481 | /* If the resource is subtractive don't worry about it. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 482 | if (resource->flags & IORESOURCE_SUBTRACTIVE) { |
| 483 | return; |
| 484 | } |
| 485 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 486 | /* Only handle PCI memory and I/O resources for now. */ |
| 487 | if (!(resource->flags & (IORESOURCE_MEM | IORESOURCE_IO))) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 488 | return; |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 489 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 490 | /* Enable the resources in the command register. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 491 | if (resource->size) { |
| 492 | if (resource->flags & IORESOURCE_MEM) { |
| 493 | dev->command |= PCI_COMMAND_MEMORY; |
| 494 | } |
| 495 | if (resource->flags & IORESOURCE_IO) { |
| 496 | dev->command |= PCI_COMMAND_IO; |
| 497 | } |
| 498 | if (resource->flags & IORESOURCE_PCI_BRIDGE) { |
| 499 | dev->command |= PCI_COMMAND_MASTER; |
| 500 | } |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 501 | } |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 502 | /* Get the base address. */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 503 | base = resource->base; |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 504 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 505 | /* Get the end. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 506 | end = resource_end(resource); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 507 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 508 | /* Now store the resource. */ |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 509 | resource->flags |= IORESOURCE_STORED; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 510 | |
| 511 | /* PCI Bridges have no enable bit. They are disabled if the base of |
| 512 | * the range is greater than the limit. If the size is zero, disable |
| 513 | * by setting the base = limit and end = limit - 2^gran. |
| 514 | */ |
| 515 | if (resource->size == 0 && (resource->flags & IORESOURCE_PCI_BRIDGE)) { |
| 516 | base = resource->limit; |
| 517 | end = resource->limit - (1 << resource->gran); |
| 518 | resource->base = base; |
| 519 | } |
| 520 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 521 | if (!(resource->flags & IORESOURCE_PCI_BRIDGE)) { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 522 | unsigned long base_lo, base_hi; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 523 | /* Some chipsets allow us to set/clear the I/O bit |
| 524 | * (e.g. VIA 82c686a). So set it to be safe. |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 525 | */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 526 | base_lo = base & 0xffffffff; |
| 527 | base_hi = (base >> 32) & 0xffffffff; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 528 | if (resource->flags & IORESOURCE_IO) { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 529 | base_lo |= PCI_BASE_ADDRESS_SPACE_IO; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 530 | } |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 531 | pci_write_config32(dev, resource->index, base_lo); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 532 | if (resource->flags & IORESOURCE_PCI64) { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 533 | pci_write_config32(dev, resource->index + 4, base_hi); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 534 | } |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 535 | } else if (resource->index == PCI_IO_BASE) { |
| 536 | /* Set the I/O ranges. */ |
| 537 | pci_write_config8(dev, PCI_IO_BASE, base >> 8); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 538 | pci_write_config16(dev, PCI_IO_BASE_UPPER16, base >> 16); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 539 | pci_write_config8(dev, PCI_IO_LIMIT, end >> 8); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 540 | pci_write_config16(dev, PCI_IO_LIMIT_UPPER16, end >> 16); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 541 | } else if (resource->index == PCI_MEMORY_BASE) { |
| 542 | /* Set the memory range. */ |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 543 | pci_write_config16(dev, PCI_MEMORY_BASE, base >> 16); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 544 | pci_write_config16(dev, PCI_MEMORY_LIMIT, end >> 16); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 545 | } else if (resource->index == PCI_PREF_MEMORY_BASE) { |
| 546 | /* Set the prefetchable memory range. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 547 | pci_write_config16(dev, PCI_PREF_MEMORY_BASE, base >> 16); |
| 548 | pci_write_config32(dev, PCI_PREF_BASE_UPPER32, base >> 32); |
| 549 | pci_write_config16(dev, PCI_PREF_MEMORY_LIMIT, end >> 16); |
| 550 | pci_write_config32(dev, PCI_PREF_LIMIT_UPPER32, end >> 32); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 551 | } else { |
| 552 | /* Don't let me think I stored the resource. */ |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 553 | resource->flags &= ~IORESOURCE_STORED; |
Myles Watson | c4ddbff | 2009-02-09 17:52:54 +0000 | [diff] [blame] | 554 | printk_err("ERROR: invalid resource->index %lx\n", |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 555 | resource->index); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 556 | } |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 557 | report_resource_stored(dev, resource, ""); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 558 | return; |
| 559 | } |
| 560 | |
Eric Biederman | 5899fd8 | 2003-04-24 06:25:08 +0000 | [diff] [blame] | 561 | void pci_dev_set_resources(struct device *dev) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 562 | { |
| 563 | struct resource *resource, *last; |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 564 | unsigned link; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 565 | u8 line; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 566 | |
| 567 | last = &dev->resource[dev->resources]; |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 568 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 569 | for (resource = &dev->resource[0]; resource < last; resource++) { |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 570 | pci_set_resource(dev, resource); |
| 571 | } |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 572 | for (link = 0; link < dev->links; link++) { |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 573 | struct bus *bus; |
| 574 | bus = &dev->link[link]; |
| 575 | if (bus->children) { |
| 576 | assign_resources(bus); |
| 577 | } |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 578 | } |
| 579 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 580 | /* Set a default latency timer. */ |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 581 | pci_write_config8(dev, PCI_LATENCY_TIMER, 0x40); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 582 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 583 | /* Set a default secondary latency timer. */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 584 | if ((dev->hdr_type & 0x7f) == PCI_HEADER_TYPE_BRIDGE) { |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 585 | pci_write_config8(dev, PCI_SEC_LATENCY_TIMER, 0x40); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 586 | } |
| 587 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 588 | /* Zero the IRQ settings. */ |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 589 | line = pci_read_config8(dev, PCI_INTERRUPT_PIN); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 590 | if (line) { |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 591 | pci_write_config8(dev, PCI_INTERRUPT_LINE, 0); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 592 | } |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 593 | /* Set the cache line size, so far 64 bytes is good for everyone. */ |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 594 | pci_write_config8(dev, PCI_CACHE_LINE_SIZE, 64 >> 2); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 595 | } |
| 596 | |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 597 | void pci_dev_enable_resources(struct device *dev) |
| 598 | { |
Eric Biederman | a9e632c | 2004-11-18 22:38:08 +0000 | [diff] [blame] | 599 | const struct pci_operations *ops; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 600 | u16 command; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 601 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 602 | /* Set the subsystem vendor and device id for mainboard devices. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 603 | ops = ops_pci(dev); |
Eric Biederman | dbec2d4 | 2004-10-21 10:44:08 +0000 | [diff] [blame] | 604 | if (dev->on_mainboard && ops && ops->set_subsystem) { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 605 | printk_debug("%s subsystem <- %02x/%02x\n", |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 606 | dev_path(dev), |
| 607 | CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID, |
| 608 | CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 609 | ops->set_subsystem(dev, |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 610 | CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID, |
| 611 | CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 612 | } |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 613 | command = pci_read_config16(dev, PCI_COMMAND); |
| 614 | command |= dev->command; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 615 | /* v3 has |
| 616 | * command |= (PCI_COMMAND_PARITY + PCI_COMMAND_SERR); // Error check. |
| 617 | */ |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 618 | printk_debug("%s cmd <- %02x\n", dev_path(dev), command); |
| 619 | pci_write_config16(dev, PCI_COMMAND, command); |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 620 | } |
| 621 | |
| 622 | void pci_bus_enable_resources(struct device *dev) |
| 623 | { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 624 | u16 ctrl; |
| 625 | |
| 626 | /* Enable I/O in command register if there is VGA card |
| 627 | * connected with (even it does not claim I/O resource). |
| 628 | */ |
Li-Ta Lo | 515f6c7 | 2005-01-11 22:48:54 +0000 | [diff] [blame] | 629 | if (dev->link[0].bridge_ctrl & PCI_BRIDGE_CTL_VGA) |
| 630 | dev->command |= PCI_COMMAND_IO; |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 631 | ctrl = pci_read_config16(dev, PCI_BRIDGE_CONTROL); |
| 632 | ctrl |= dev->link[0].bridge_ctrl; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 633 | ctrl |= (PCI_BRIDGE_CTL_PARITY + PCI_BRIDGE_CTL_SERR); /* Error check. */ |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 634 | printk_debug("%s bridge ctrl <- %04x\n", dev_path(dev), ctrl); |
| 635 | pci_write_config16(dev, PCI_BRIDGE_CONTROL, ctrl); |
| 636 | |
| 637 | pci_dev_enable_resources(dev); |
Eric Biederman | dbec2d4 | 2004-10-21 10:44:08 +0000 | [diff] [blame] | 638 | enable_childrens_resources(dev); |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 639 | } |
| 640 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 641 | void pci_bus_reset(struct bus *bus) |
| 642 | { |
| 643 | unsigned ctl; |
| 644 | ctl = pci_read_config16(bus->dev, PCI_BRIDGE_CONTROL); |
| 645 | ctl |= PCI_BRIDGE_CTL_BUS_RESET; |
| 646 | pci_write_config16(bus->dev, PCI_BRIDGE_CONTROL, ctl); |
| 647 | mdelay(10); |
| 648 | ctl &= ~PCI_BRIDGE_CTL_BUS_RESET; |
| 649 | pci_write_config16(bus->dev, PCI_BRIDGE_CONTROL, ctl); |
| 650 | delay(1); |
| 651 | } |
| 652 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 653 | void pci_dev_set_subsystem(struct device *dev, unsigned vendor, unsigned device) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 654 | { |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 655 | pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 656 | ((device & 0xffff) << 16) | (vendor & 0xffff)); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 657 | } |
| 658 | |
Torsten Duwe | 1f2f800 | 2008-01-06 01:10:54 +0000 | [diff] [blame] | 659 | /** default handler: only runs the relevant pci bios. */ |
Li-Ta Lo | 883b879 | 2005-01-10 23:16:22 +0000 | [diff] [blame] | 660 | void pci_dev_init(struct device *dev) |
| 661 | { |
Torsten Duwe | 1f2f800 | 2008-01-06 01:10:54 +0000 | [diff] [blame] | 662 | #if CONFIG_PCI_ROM_RUN == 1 || CONFIG_VGA_ROM_RUN == 1 |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 663 | void run_bios(struct device *dev, unsigned long addr); |
Li-Ta Lo | 883b879 | 2005-01-10 23:16:22 +0000 | [diff] [blame] | 664 | struct rom_header *rom, *ram; |
| 665 | |
Roman Kononov | 778a42b | 2007-04-06 18:34:39 +0000 | [diff] [blame] | 666 | #if CONFIG_PCI_ROM_RUN != 1 |
Torsten Duwe | 1f2f800 | 2008-01-06 01:10:54 +0000 | [diff] [blame] | 667 | /* We want to execute VGA option ROMs when CONFIG_VGA_ROM_RUN |
Roman Kononov | 778a42b | 2007-04-06 18:34:39 +0000 | [diff] [blame] | 668 | * is set but CONFIG_PCI_ROM_RUN is not. In this case we skip |
| 669 | * all other option ROM types. |
| 670 | */ |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 671 | if ((dev->class >> 8) != PCI_CLASS_DISPLAY_VGA) |
Roman Kononov | 778a42b | 2007-04-06 18:34:39 +0000 | [diff] [blame] | 672 | return; |
| 673 | #endif |
| 674 | |
Li-Ta Lo | 883b879 | 2005-01-10 23:16:22 +0000 | [diff] [blame] | 675 | rom = pci_rom_probe(dev); |
| 676 | if (rom == NULL) |
| 677 | return; |
Roman Kononov | 778a42b | 2007-04-06 18:34:39 +0000 | [diff] [blame] | 678 | |
Li-Ta Lo | 883b879 | 2005-01-10 23:16:22 +0000 | [diff] [blame] | 679 | ram = pci_rom_load(dev, rom); |
Yinghai Lu | 9e4faef | 2005-01-14 22:04:49 +0000 | [diff] [blame] | 680 | if (ram == NULL) |
| 681 | return; |
Li-Ta Lo | 883b879 | 2005-01-10 23:16:22 +0000 | [diff] [blame] | 682 | |
Stefan Reinauer | d98cf5b | 2008-08-01 11:25:41 +0000 | [diff] [blame] | 683 | run_bios(dev, (unsigned long)ram); |
Roman Kononov | 778a42b | 2007-04-06 18:34:39 +0000 | [diff] [blame] | 684 | |
| 685 | #if CONFIG_CONSOLE_VGA == 1 |
Luc Verhaegen | 5c5beb7 | 2009-05-29 03:04:16 +0000 | [diff] [blame] | 686 | if ((dev->class>>8) == PCI_CLASS_DISPLAY_VGA) |
Luc Verhaegen | 43bc5a9c | 2009-05-29 03:44:47 +0000 | [diff] [blame] | 687 | vga_console_init(); |
Torsten Duwe | 1f2f800 | 2008-01-06 01:10:54 +0000 | [diff] [blame] | 688 | #endif /* CONFIG_CONSOLE_VGA */ |
| 689 | #endif /* CONFIG_PCI_ROM_RUN || CONFIG_VGA_ROM_RUN */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 690 | } |
Li-Ta Lo | 883b879 | 2005-01-10 23:16:22 +0000 | [diff] [blame] | 691 | |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 692 | /** Default device operation for PCI devices */ |
Eric Biederman | a9e632c | 2004-11-18 22:38:08 +0000 | [diff] [blame] | 693 | static struct pci_operations pci_dev_ops_pci = { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 694 | .set_subsystem = pci_dev_set_subsystem, |
| 695 | }; |
| 696 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 697 | struct device_operations default_pci_ops_dev = { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 698 | .read_resources = pci_dev_read_resources, |
| 699 | .set_resources = pci_dev_set_resources, |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 700 | .enable_resources = pci_dev_enable_resources, |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 701 | .init = pci_dev_init, |
| 702 | .scan_bus = 0, |
| 703 | .enable = 0, |
| 704 | .ops_pci = &pci_dev_ops_pci, |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 705 | }; |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 706 | |
| 707 | /** Default device operations for PCI bridges */ |
Eric Biederman | a9e632c | 2004-11-18 22:38:08 +0000 | [diff] [blame] | 708 | static struct pci_operations pci_bus_ops_pci = { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 709 | .set_subsystem = 0, |
| 710 | }; |
Li-Ta Lo | 883b879 | 2005-01-10 23:16:22 +0000 | [diff] [blame] | 711 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 712 | struct device_operations default_pci_ops_bus = { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 713 | .read_resources = pci_bus_read_resources, |
| 714 | .set_resources = pci_dev_set_resources, |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 715 | .enable_resources = pci_bus_enable_resources, |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 716 | .init = 0, |
| 717 | .scan_bus = pci_scan_bridge, |
| 718 | .enable = 0, |
| 719 | .reset_bus = pci_bus_reset, |
| 720 | .ops_pci = &pci_bus_ops_pci, |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 721 | }; |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 722 | |
| 723 | /** |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 724 | * @brief Detect the type of downstream bridge |
| 725 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 726 | * This function is a heuristic to detect which type of bus is downstream |
| 727 | * of a PCI-to-PCI bridge. This functions by looking for various capability |
| 728 | * blocks to figure out the type of downstream bridge. PCI-X, PCI-E, and |
| 729 | * Hypertransport all seem to have appropriate capabilities. |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 730 | * |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 731 | * When only a PCI-Express capability is found the type |
| 732 | * is examined to see which type of bridge we have. |
| 733 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 734 | * @param dev Pointer to the device structure of the bridge. |
| 735 | * @return Appropriate bridge operations. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 736 | */ |
| 737 | static struct device_operations *get_pci_bridge_ops(device_t dev) |
| 738 | { |
| 739 | unsigned pos; |
| 740 | |
| 741 | #if CONFIG_PCIX_PLUGIN_SUPPORT == 1 |
| 742 | pos = pci_find_capability(dev, PCI_CAP_ID_PCIX); |
| 743 | if (pos) { |
| 744 | printk_debug("%s subbordinate bus PCI-X\n", dev_path(dev)); |
| 745 | return &default_pcix_ops_bus; |
| 746 | } |
| 747 | #endif |
| 748 | #if CONFIG_AGP_PLUGIN_SUPPORT == 1 |
| 749 | /* How do I detect an PCI to AGP bridge? */ |
| 750 | #endif |
| 751 | #if CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT == 1 |
| 752 | pos = 0; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 753 | while ((pos = pci_find_next_capability(dev, PCI_CAP_ID_HT, pos))) { |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 754 | unsigned flags; |
| 755 | flags = pci_read_config16(dev, pos + PCI_CAP_FLAGS); |
| 756 | if ((flags >> 13) == 1) { |
| 757 | /* Host or Secondary Interface */ |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 758 | printk_debug("%s subbordinate bus Hypertransport\n", |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 759 | dev_path(dev)); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 760 | return &default_ht_ops_bus; |
| 761 | } |
| 762 | } |
| 763 | #endif |
| 764 | #if CONFIG_PCIEXP_PLUGIN_SUPPORT == 1 |
| 765 | pos = pci_find_capability(dev, PCI_CAP_ID_PCIE); |
| 766 | if (pos) { |
| 767 | unsigned flags; |
| 768 | flags = pci_read_config16(dev, pos + PCI_EXP_FLAGS); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 769 | switch ((flags & PCI_EXP_FLAGS_TYPE) >> 4) { |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 770 | case PCI_EXP_TYPE_ROOT_PORT: |
| 771 | case PCI_EXP_TYPE_UPSTREAM: |
| 772 | case PCI_EXP_TYPE_DOWNSTREAM: |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 773 | printk_debug("%s subbordinate bus PCI Express\n", |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 774 | dev_path(dev)); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 775 | return &default_pciexp_ops_bus; |
| 776 | case PCI_EXP_TYPE_PCI_BRIDGE: |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 777 | printk_debug("%s subbordinate PCI\n", dev_path(dev)); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 778 | return &default_pci_ops_bus; |
| 779 | default: |
| 780 | break; |
| 781 | } |
| 782 | } |
| 783 | #endif |
| 784 | return &default_pci_ops_bus; |
| 785 | } |
| 786 | |
| 787 | /** |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 788 | * Set up PCI device operation. Check if it already has a driver. If not, use |
| 789 | * find_device_operations, or set to a default based on type. |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 790 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 791 | * @param dev Pointer to the device whose pci_ops you want to set. |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 792 | * @see pci_drivers |
| 793 | */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 794 | static void set_pci_ops(struct device *dev) |
| 795 | { |
| 796 | struct pci_driver *driver; |
| 797 | if (dev->ops) { |
| 798 | return; |
| 799 | } |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 800 | |
Yinghai Lu | 5f9624d | 2006-10-04 22:56:21 +0000 | [diff] [blame] | 801 | /* Look through the list of setup drivers and find one for |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 802 | * this PCI device. |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 803 | */ |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 804 | for (driver = &pci_drivers[0]; driver != &epci_drivers[0]; driver++) { |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 805 | if ((driver->vendor == dev->vendor) && |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 806 | (driver->device == dev->device)) { |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 807 | dev->ops = driver->ops; |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 808 | printk_spew("%s [%04x/%04x] %sops\n", |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 809 | dev_path(dev), |
| 810 | driver->vendor, driver->device, |
| 811 | (driver->ops->scan_bus ? "bus " : "")); |
Eric Biederman | 5899fd8 | 2003-04-24 06:25:08 +0000 | [diff] [blame] | 812 | return; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 813 | } |
| 814 | } |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 815 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 816 | /* If I don't have a specific driver use the default operations */ |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 817 | switch (dev->hdr_type & 0x7f) { /* header type */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 818 | case PCI_HEADER_TYPE_NORMAL: /* standard header */ |
| 819 | if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) |
| 820 | goto bad; |
| 821 | dev->ops = &default_pci_ops_dev; |
| 822 | break; |
| 823 | case PCI_HEADER_TYPE_BRIDGE: |
| 824 | if ((dev->class >> 8) != PCI_CLASS_BRIDGE_PCI) |
| 825 | goto bad; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 826 | dev->ops = get_pci_bridge_ops(dev); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 827 | break; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 828 | #if CONFIG_CARDBUS_PLUGIN_SUPPORT == 1 |
| 829 | case PCI_HEADER_TYPE_CARDBUS: |
| 830 | dev->ops = &default_cardbus_ops_bus; |
| 831 | break; |
| 832 | #endif |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 833 | default: |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 834 | bad: |
Li-Ta Lo | 69c5a90 | 2004-04-29 20:08:54 +0000 | [diff] [blame] | 835 | if (dev->enabled) { |
Eric Biederman | 83b991a | 2003-10-11 06:20:25 +0000 | [diff] [blame] | 836 | printk_err("%s [%04x/%04x/%06x] has unknown header " |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 837 | "type %02x, ignoring.\n", |
| 838 | dev_path(dev), |
| 839 | dev->vendor, dev->device, |
| 840 | dev->class >> 8, dev->hdr_type); |
Eric Biederman | 83b991a | 2003-10-11 06:20:25 +0000 | [diff] [blame] | 841 | } |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 842 | } |
| 843 | return; |
| 844 | } |
| 845 | |
| 846 | /** |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 847 | * @brief See if we have already allocated a device structure for a given devfn. |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 848 | * |
| 849 | * Given a linked list of PCI device structures and a devfn number, find the |
Li-Ta Lo | 3a81285 | 2004-12-03 22:39:34 +0000 | [diff] [blame] | 850 | * device structure correspond to the devfn, if present. This function also |
| 851 | * removes the device structure from the linked list. |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 852 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 853 | * @param list The device structure list. |
| 854 | * @param devfn A device/function number. |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 855 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 856 | * @return Pointer to the device structure found or NULL if we have not |
Li-Ta Lo | 3a81285 | 2004-12-03 22:39:34 +0000 | [diff] [blame] | 857 | * allocated a device for this devfn yet. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 858 | */ |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 859 | static struct device *pci_scan_get_dev(struct device **list, unsigned int devfn) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 860 | { |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 861 | struct device *dev; |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 862 | dev = 0; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 863 | for (; *list; list = &(*list)->sibling) { |
Eric Biederman | ad1b35a | 2003-10-14 02:36:51 +0000 | [diff] [blame] | 864 | if ((*list)->path.type != DEVICE_PATH_PCI) { |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 865 | printk_err("child %s not a pci device\n", |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 866 | dev_path(*list)); |
Eric Biederman | ad1b35a | 2003-10-14 02:36:51 +0000 | [diff] [blame] | 867 | continue; |
| 868 | } |
Stefan Reinauer | 2b34db8 | 2009-02-28 20:10:20 +0000 | [diff] [blame] | 869 | if ((*list)->path.pci.devfn == devfn) { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 870 | /* Unlink from the list. */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 871 | dev = *list; |
| 872 | *list = (*list)->sibling; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 873 | dev->sibling = NULL; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 874 | break; |
| 875 | } |
| 876 | } |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 877 | |
| 878 | /* Just like alloc_dev() add the device to the list of devices on the |
| 879 | * bus. When the list of devices was formed we removed all of the |
| 880 | * parents children, and now we are interleaving static and dynamic |
| 881 | * devices in order on the bus. |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 882 | */ |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 883 | if (dev) { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 884 | struct device *child; |
| 885 | /* Find the last child of our parent. */ |
| 886 | for (child = dev->bus->children; child && child->sibling;) { |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 887 | child = child->sibling; |
| 888 | } |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 889 | /* Place the device on the list of children of its parent. */ |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 890 | if (child) { |
| 891 | child->sibling = dev; |
| 892 | } else { |
| 893 | dev->bus->children = dev; |
| 894 | } |
| 895 | } |
| 896 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 897 | return dev; |
| 898 | } |
| 899 | |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 900 | /** |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 901 | * @brief Scan a PCI bus. |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 902 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 903 | * Determine the existence of a given PCI device. Allocate a new struct device |
| 904 | * if dev==NULL was passed in and the device exists in hardware. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 905 | * |
| 906 | * @param bus pointer to the bus structure |
| 907 | * @param devfn to look at |
| 908 | * |
| 909 | * @return The device structure for hte device (if found) |
| 910 | * or the NULL if no device is found. |
| 911 | */ |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 912 | device_t pci_probe_dev(device_t dev, struct bus * bus, unsigned devfn) |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 913 | { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 914 | u32 id, class; |
| 915 | u8 hdr_type; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 916 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 917 | /* Detect if a device is present. */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 918 | if (!dev) { |
| 919 | struct device dummy; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 920 | dummy.bus = bus; |
| 921 | dummy.path.type = DEVICE_PATH_PCI; |
Stefan Reinauer | 2b34db8 | 2009-02-28 20:10:20 +0000 | [diff] [blame] | 922 | dummy.path.pci.devfn = devfn; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 923 | id = pci_read_config32(&dummy, PCI_VENDOR_ID); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 924 | /* Have we found something? |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 925 | * Some broken boards return 0 if a slot is empty. |
| 926 | */ |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 927 | if ((id == 0xffffffff) || (id == 0x00000000) || |
| 928 | (id == 0x0000ffff) || (id == 0xffff0000)) { |
Stefan Reinauer | f657d75 | 2008-09-11 06:52:22 +0000 | [diff] [blame] | 929 | printk_spew("%s, bad id 0x%x\n", dev_path(&dummy), id); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 930 | return NULL; |
| 931 | } |
| 932 | dev = alloc_dev(bus, &dummy.path); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 933 | } else { |
| 934 | /* Enable/disable the device. Once we have found the device- |
| 935 | * specific operations this operations we will disable the |
| 936 | * device with those as well. |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 937 | * |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 938 | * This is geared toward devices that have subfunctions |
| 939 | * that do not show up by default. |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 940 | * |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 941 | * If a device is a stuff option on the motherboard |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 942 | * it may be absent and enable_dev() must cope. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 943 | */ |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 944 | /* Run the magic enable sequence for the device. */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 945 | if (dev->chip_ops && dev->chip_ops->enable_dev) { |
| 946 | dev->chip_ops->enable_dev(dev); |
| 947 | } |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 948 | /* Now read the vendor and device ID. */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 949 | id = pci_read_config32(dev, PCI_VENDOR_ID); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 950 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 951 | /* If the device does not have a PCI ID disable it. Possibly |
| 952 | * this is because we have already disabled the device. But |
| 953 | * this also handles optional devices that may not always |
| 954 | * show up. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 955 | */ |
| 956 | /* If the chain is fully enumerated quit */ |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 957 | if ((id == 0xffffffff) || (id == 0x00000000) || |
| 958 | (id == 0x0000ffff) || (id == 0xffff0000)) { |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 959 | if (dev->enabled) { |
| 960 | printk_info("Disabling static device: %s\n", |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 961 | dev_path(dev)); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 962 | dev->enabled = 0; |
| 963 | } |
| 964 | return dev; |
| 965 | } |
| 966 | } |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 967 | /* Read the rest of the PCI configuration information. */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 968 | hdr_type = pci_read_config8(dev, PCI_HEADER_TYPE); |
| 969 | class = pci_read_config32(dev, PCI_CLASS_REVISION); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 970 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 971 | /* Store the interesting information in the device structure. */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 972 | dev->vendor = id & 0xffff; |
| 973 | dev->device = (id >> 16) & 0xffff; |
| 974 | dev->hdr_type = hdr_type; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 975 | |
| 976 | /* Class code, the upper 3 bytes of PCI_CLASS_REVISION. */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 977 | dev->class = class >> 8; |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 978 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 979 | /* Architectural/System devices always need to be bus masters. */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 980 | if ((dev->class >> 16) == PCI_BASE_CLASS_SYSTEM) { |
| 981 | dev->command |= PCI_COMMAND_MASTER; |
| 982 | } |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 983 | /* Look at the vendor and device ID, or at least the header type and |
| 984 | * class and figure out which set of configuration methods to use. |
| 985 | * Unless we already have some PCI ops. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 986 | */ |
| 987 | set_pci_ops(dev); |
| 988 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 989 | /* Now run the magic enable/disable sequence for the device. */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 990 | if (dev->ops && dev->ops->enable) { |
| 991 | dev->ops->enable(dev); |
| 992 | } |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 993 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 994 | /* Display the device. */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 995 | printk_debug("%s [%04x/%04x] %s%s\n", |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 996 | dev_path(dev), |
| 997 | dev->vendor, dev->device, |
| 998 | dev->enabled ? "enabled" : "disabled", |
| 999 | dev->ops ? "" : " No operations"); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1000 | |
| 1001 | return dev; |
| 1002 | } |
| 1003 | |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1004 | /** |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1005 | * @brief Scan a PCI bus. |
| 1006 | * |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 1007 | * Determine the existence of devices and bridges on a PCI bus. If there are |
| 1008 | * bridges on the bus, recursively scan the buses behind the bridges. |
| 1009 | * |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1010 | * This function is the default scan_bus() method for the root device |
| 1011 | * 'dev_root'. |
| 1012 | * |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1013 | * @param bus pointer to the bus structure |
| 1014 | * @param min_devfn minimum devfn to look at in the scan usually 0x00 |
| 1015 | * @param max_devfn maximum devfn to look at in the scan usually 0xff |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1016 | * @param max current bus number |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 1017 | * |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1018 | * @return The maximum bus number found, after scanning all subordinate busses |
| 1019 | */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1020 | unsigned int pci_scan_bus(struct bus *bus, |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 1021 | unsigned min_devfn, unsigned max_devfn, |
| 1022 | unsigned int max) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1023 | { |
| 1024 | unsigned int devfn; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 1025 | struct device *old_devices; |
| 1026 | struct device *child; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1027 | |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 1028 | #if CONFIG_PCI_BUS_SEGN_BITS |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 1029 | printk_debug("PCI: pci_scan_bus for bus %04x:%02x\n", |
| 1030 | bus->secondary >> 8, bus->secondary & 0xff); |
Yinghai Lu | 5f9624d | 2006-10-04 22:56:21 +0000 | [diff] [blame] | 1031 | #else |
| 1032 | printk_debug("PCI: pci_scan_bus for bus %02x\n", bus->secondary); |
| 1033 | #endif |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1034 | |
| 1035 | old_devices = bus->children; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 1036 | bus->children = NULL; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1037 | |
| 1038 | post_code(0x24); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 1039 | /* Probe all devices/functions on this bus with some optimization for |
| 1040 | * non-existence and single function devices. |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 1041 | */ |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1042 | for (devfn = min_devfn; devfn <= max_devfn; devfn++) { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 1043 | struct device *dev; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1044 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 1045 | /* First thing setup the device structure */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1046 | dev = pci_scan_get_dev(&old_devices, devfn); |
Li-Ta Lo | 9782f75 | 2004-05-05 21:15:42 +0000 | [diff] [blame] | 1047 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 1048 | /* See if a device is present and setup the device structure. */ |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1049 | dev = pci_probe_dev(dev, bus, devfn); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 1050 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 1051 | /* If this is not a multi function device, or the device is |
| 1052 | * not present don't waste time probing another function. |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1053 | * Skip to next device. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1054 | */ |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1055 | if ((PCI_FUNC(devfn) == 0x00) && |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 1056 | (!dev |
| 1057 | || (dev->enabled && ((dev->hdr_type & 0x80) != 0x80)))) { |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1058 | devfn += 0x07; |
| 1059 | } |
| 1060 | } |
| 1061 | post_code(0x25); |
| 1062 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 1063 | /* Warn if any leftover static devices are are found. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1064 | * There's probably a problem in the Config.lb. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 1065 | */ |
| 1066 | if (old_devices) { |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1067 | device_t left; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 1068 | printk_warning("PCI: Left over static devices:\n"); |
| 1069 | for (left = old_devices; left; left = left->sibling) { |
| 1070 | printk_warning("%s\n", dev_path(left)); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1071 | } |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 1072 | printk_warning("PCI: Check your mainboard Config.lb.\n"); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1073 | } |
| 1074 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 1075 | /* For all children that implement scan_bus() (i.e. bridges) |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 1076 | * scan the bus behind that child. |
| 1077 | */ |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 1078 | for (child = bus->children; child; child = child->sibling) { |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1079 | max = scan_bus(child, max); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1080 | } |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 1081 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 1082 | /* We've scanned the bus and so we know all about what's on the other |
| 1083 | * side of any bridges that may be on this bus plus any devices. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1084 | * Return how far we've got finding sub-buses. |
| 1085 | */ |
Yinghai Lu | 5f9624d | 2006-10-04 22:56:21 +0000 | [diff] [blame] | 1086 | printk_debug("PCI: pci_scan_bus returning with max=%03x\n", max); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1087 | post_code(0x55); |
| 1088 | return max; |
| 1089 | } |
| 1090 | |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 1091 | /** |
| 1092 | * @brief Scan a PCI bridge and the buses behind the bridge. |
| 1093 | * |
| 1094 | * Determine the existence of buses behind the bridge. Set up the bridge |
| 1095 | * according to the result of the scan. |
| 1096 | * |
| 1097 | * This function is the default scan_bus() method for PCI bridge devices. |
| 1098 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 1099 | * @param dev Pointer to the bridge device. |
| 1100 | * @param max The highest bus number assigned up to now. |
| 1101 | * @return The maximum bus number found, after scanning all subordinate buses. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1102 | */ |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1103 | unsigned int do_pci_scan_bridge(struct device *dev, unsigned int max, |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 1104 | unsigned int (*do_scan_bus) (struct bus * bus, |
| 1105 | unsigned min_devfn, |
| 1106 | unsigned max_devfn, |
| 1107 | unsigned int max)) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1108 | { |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1109 | struct bus *bus; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 1110 | u32 buses; |
| 1111 | u16 cr; |
Eric Biederman | 83b991a | 2003-10-11 06:20:25 +0000 | [diff] [blame] | 1112 | |
Li-Ta Lo | 3a81285 | 2004-12-03 22:39:34 +0000 | [diff] [blame] | 1113 | printk_spew("%s for %s\n", __func__, dev_path(dev)); |
| 1114 | |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1115 | bus = &dev->link[0]; |
Eric Biederman | a9e632c | 2004-11-18 22:38:08 +0000 | [diff] [blame] | 1116 | bus->dev = dev; |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1117 | dev->links = 1; |
| 1118 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1119 | /* Set up the primary, secondary and subordinate bus numbers. We have |
| 1120 | * no idea how many buses are behind this bridge yet, so we set the |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1121 | * subordinate bus number to 0xff for the moment. |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 1122 | */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1123 | bus->secondary = ++max; |
| 1124 | bus->subordinate = 0xff; |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 1125 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1126 | /* Clear all status bits and turn off memory, I/O and master enables. */ |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1127 | cr = pci_read_config16(dev, PCI_COMMAND); |
| 1128 | pci_write_config16(dev, PCI_COMMAND, 0x0000); |
| 1129 | pci_write_config16(dev, PCI_STATUS, 0xffff); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1130 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 1131 | /* Read the existing primary/secondary/subordinate bus |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 1132 | * number configuration. |
| 1133 | */ |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1134 | buses = pci_read_config32(dev, PCI_PRIMARY_BUS); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1135 | |
| 1136 | /* Configure the bus numbers for this bridge: the configuration |
| 1137 | * transactions will not be propagated by the bridge if it is not |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 1138 | * correctly configured. |
| 1139 | */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1140 | buses &= 0xff000000; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 1141 | buses |= (((unsigned int)(dev->bus->secondary) << 0) | |
| 1142 | ((unsigned int)(bus->secondary) << 8) | |
| 1143 | ((unsigned int)(bus->subordinate) << 16)); |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1144 | pci_write_config32(dev, PCI_PRIMARY_BUS, buses); |
Li-Ta Lo | 3a81285 | 2004-12-03 22:39:34 +0000 | [diff] [blame] | 1145 | |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1146 | /* Now we can scan all subordinate buses |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 1147 | * i.e. the bus behind the bridge. |
| 1148 | */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1149 | max = do_scan_bus(bus, 0x00, 0xff, max); |
Li-Ta Lo | 3a81285 | 2004-12-03 22:39:34 +0000 | [diff] [blame] | 1150 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1151 | /* We know the number of buses behind this bridge. Set the subordinate |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 1152 | * bus number to its real value. |
| 1153 | */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1154 | bus->subordinate = max; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 1155 | buses = (buses & 0xff00ffff) | ((unsigned int)(bus->subordinate) << 16); |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1156 | pci_write_config32(dev, PCI_PRIMARY_BUS, buses); |
| 1157 | pci_write_config16(dev, PCI_COMMAND, cr); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1158 | |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 1159 | printk_spew("%s returns max %d\n", __func__, max); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1160 | return max; |
| 1161 | } |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 1162 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1163 | /** |
| 1164 | * @brief Scan a PCI bridge and the buses behind the bridge. |
| 1165 | * |
| 1166 | * Determine the existence of buses behind the bridge. Set up the bridge |
| 1167 | * according to the result of the scan. |
| 1168 | * |
| 1169 | * This function is the default scan_bus() method for PCI bridge devices. |
| 1170 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 1171 | * @param dev Pointer to the bridge device. |
| 1172 | * @param max The highest bus number assigned up to now. |
| 1173 | * @return The maximum bus number found, after scanning all subordinate buses. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1174 | */ |
| 1175 | unsigned int pci_scan_bridge(struct device *dev, unsigned int max) |
| 1176 | { |
| 1177 | return do_pci_scan_bridge(dev, max, pci_scan_bus); |
| 1178 | } |
| 1179 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 1180 | /** |
| 1181 | * @brief Scan a PCI domain. |
| 1182 | * |
| 1183 | * This function is the default scan_bus() method for PCI domains. |
| 1184 | * |
| 1185 | * @param dev pointer to the domain |
| 1186 | * @param max the highest bus number assgined up to now |
| 1187 | * |
| 1188 | * @return The maximum bus number found, after scanning all subordinate busses |
| 1189 | */ |
| 1190 | unsigned int pci_domain_scan_bus(device_t dev, unsigned int max) |
| 1191 | { |
| 1192 | max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max); |
| 1193 | return max; |
| 1194 | } |
| 1195 | |
| 1196 | /** |
| 1197 | * Tell the EISA int controller this int must be level triggered. |
| 1198 | * |
| 1199 | * THIS IS A KLUDGE -- sorry, this needs to get cleaned up. |
| 1200 | */ |
Ronald G. Minnich | 88fb1a6 | 2006-06-22 04:37:27 +0000 | [diff] [blame] | 1201 | void pci_level_irq(unsigned char intNum) |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1202 | { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 1203 | unsigned short intBits = inb(0x4d0) | (((unsigned)inb(0x4d1)) << 8); |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1204 | |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 1205 | printk_spew("%s: current ints are 0x%x\n", __func__, intBits); |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1206 | intBits |= (1 << intNum); |
| 1207 | |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 1208 | printk_spew("%s: try to set ints 0x%x\n", __func__, intBits); |
Ronald G. Minnich | cb3f498 | 2003-10-02 18:16:07 +0000 | [diff] [blame] | 1209 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 1210 | /* Write new values. */ |
| 1211 | outb((unsigned char)intBits, 0x4d0); |
| 1212 | outb((unsigned char)(intBits >> 8), 0x4d1); |
Ronald G. Minnich | cb3f498 | 2003-10-02 18:16:07 +0000 | [diff] [blame] | 1213 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 1214 | /* This seems like an error but is not. */ |
Ronald G. Minnich | 2cf779d | 2006-09-18 22:50:51 +0000 | [diff] [blame] | 1215 | if (inb(0x4d0) != (intBits & 0xff)) { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 1216 | printk_err( |
| 1217 | "%s: lower order bits are wrong: want 0x%x, got 0x%x\n", |
| 1218 | __func__, intBits & 0xff, inb(0x4d0)); |
Ronald G. Minnich | cb3f498 | 2003-10-02 18:16:07 +0000 | [diff] [blame] | 1219 | } |
Ronald G. Minnich | 2cf779d | 2006-09-18 22:50:51 +0000 | [diff] [blame] | 1220 | if (inb(0x4d1) != ((intBits >> 8) & 0xff)) { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 1221 | printk_err( |
| 1222 | "%s: lower order bits are wrong: want 0x%x, got 0x%x\n", |
| 1223 | __func__, (intBits >> 8) & 0xff, inb(0x4d1)); |
Ronald G. Minnich | cb3f498 | 2003-10-02 18:16:07 +0000 | [diff] [blame] | 1224 | } |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1225 | } |
| 1226 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 1227 | /** |
| 1228 | * This function assigns IRQs for all functions contained within the |
| 1229 | * indicated device address. If the device does not exist or does not |
| 1230 | * require interrupts then this function has no effect. |
| 1231 | * |
| 1232 | * This function should be called for each PCI slot in your system. |
| 1233 | * |
| 1234 | * pIntAtoD is an array of IRQ #s that are assigned to PINTA through PINTD of |
| 1235 | * this slot. |
| 1236 | * |
| 1237 | * The particular irq #s that are passed in depend on the routing inside |
| 1238 | * your southbridge and on your motherboard. |
| 1239 | * |
| 1240 | * -kevinh@ispiri.com |
| 1241 | * |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1242 | */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1243 | void pci_assign_irqs(unsigned bus, unsigned slot, |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 1244 | const unsigned char pIntAtoD[4]) |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1245 | { |
| 1246 | unsigned functNum; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 1247 | struct device *pdev; |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1248 | unsigned char line; |
| 1249 | unsigned char irq; |
| 1250 | unsigned char readback; |
| 1251 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 1252 | /* Each slot may contain up to eight functions. */ |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1253 | for (functNum = 0; functNum < 8; functNum++) { |
| 1254 | pdev = dev_find_slot(bus, (slot << 3) + functNum); |
| 1255 | |
| 1256 | if (pdev) { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 1257 | line = pci_read_config8(pdev, PCI_INTERRUPT_PIN); |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1258 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 1259 | /* PCI spec says all other values are reserved. */ |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1260 | if ((line >= 1) && (line <= 4)) { |
| 1261 | irq = pIntAtoD[line - 1]; |
| 1262 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 1263 | printk_debug("Assigning IRQ %d to %d:%x.%d\n", |
| 1264 | irq, bus, slot, functNum); |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1265 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 1266 | pci_write_config8(pdev, PCI_INTERRUPT_LINE, |
| 1267 | pIntAtoD[line - 1]); |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1268 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 1269 | readback = |
| 1270 | pci_read_config8(pdev, PCI_INTERRUPT_LINE); |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1271 | printk_debug(" Readback = %d\n", readback); |
| 1272 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame^] | 1273 | // Change to level triggered. |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1274 | pci_level_irq(pIntAtoD[line - 1]); |
| 1275 | } |
| 1276 | } |
| 1277 | } |
| 1278 | } |