Angel Pons | c74dae9 | 2020-04-02 23:48:16 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | /* This file is part of the coreboot project. */ |
Uwe Hermann | b80dbf0 | 2007-04-22 19:08:13 +0000 | [diff] [blame] | 3 | |
| 4 | /* |
Martin Roth | 99f83bb | 2019-09-15 20:57:18 -0700 | [diff] [blame] | 5 | * Originally based on the Linux kernel (drivers/pci/pci.c). |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 6 | * PCI Bus Services, see include/linux/pci.h for further explanation. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 7 | */ |
| 8 | |
Furquan Shaikh | 76cedd2 | 2020-05-02 10:24:23 -0700 | [diff] [blame] | 9 | #include <acpi/acpi.h> |
Kyösti Mälkki | f1b58b7 | 2019-03-01 13:43:02 +0200 | [diff] [blame] | 10 | #include <device/pci_ops.h> |
Edward O'Callaghan | 6c99250 | 2014-06-20 21:19:06 +1000 | [diff] [blame] | 11 | #include <bootmode.h> |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 12 | #include <console/console.h> |
| 13 | #include <stdlib.h> |
| 14 | #include <stdint.h> |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 15 | #include <string.h> |
Edward O'Callaghan | 6c99250 | 2014-06-20 21:19:06 +1000 | [diff] [blame] | 16 | #include <delay.h> |
Edward O'Callaghan | 6c99250 | 2014-06-20 21:19:06 +1000 | [diff] [blame] | 17 | #include <device/cardbus.h> |
Eric Biederman | 5899fd8 | 2003-04-24 06:25:08 +0000 | [diff] [blame] | 18 | #include <device/device.h> |
| 19 | #include <device/pci.h> |
| 20 | #include <device/pci_ids.h> |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 21 | #include <device/pcix.h> |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 22 | #include <device/pciexp.h> |
Edward O'Callaghan | 6c99250 | 2014-06-20 21:19:06 +1000 | [diff] [blame] | 23 | #include <device/hypertransport.h> |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 24 | #include <pc80/i8259.h> |
Philipp Deppenwiese | fea2429 | 2017-10-17 17:02:29 +0200 | [diff] [blame] | 25 | #include <security/vboot/vbnv.h> |
Martin Roth | 5dd4a2a | 2018-03-06 16:10:45 -0700 | [diff] [blame] | 26 | #include <timestamp.h> |
Johanna Schander | db7a3ae | 2019-07-24 10:14:26 +0200 | [diff] [blame] | 27 | #include <types.h> |
| 28 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 29 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 30 | u8 pci_moving_config8(struct device *dev, unsigned int reg) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 31 | { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 32 | u8 value, ones, zeroes; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 33 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 34 | value = pci_read_config8(dev, reg); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 35 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 36 | pci_write_config8(dev, reg, 0xff); |
| 37 | ones = pci_read_config8(dev, reg); |
| 38 | |
| 39 | pci_write_config8(dev, reg, 0x00); |
| 40 | zeroes = pci_read_config8(dev, reg); |
| 41 | |
| 42 | pci_write_config8(dev, reg, value); |
| 43 | |
| 44 | return ones ^ zeroes; |
| 45 | } |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 46 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 47 | u16 pci_moving_config16(struct device *dev, unsigned int reg) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 48 | { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 49 | u16 value, ones, zeroes; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 50 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 51 | value = pci_read_config16(dev, reg); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 52 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 53 | pci_write_config16(dev, reg, 0xffff); |
| 54 | ones = pci_read_config16(dev, reg); |
| 55 | |
| 56 | pci_write_config16(dev, reg, 0x0000); |
| 57 | zeroes = pci_read_config16(dev, reg); |
| 58 | |
| 59 | pci_write_config16(dev, reg, value); |
| 60 | |
| 61 | return ones ^ zeroes; |
| 62 | } |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 63 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 64 | u32 pci_moving_config32(struct device *dev, unsigned int reg) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 65 | { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 66 | u32 value, ones, zeroes; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 67 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 68 | value = pci_read_config32(dev, reg); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 69 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 70 | pci_write_config32(dev, reg, 0xffffffff); |
| 71 | ones = pci_read_config32(dev, reg); |
| 72 | |
| 73 | pci_write_config32(dev, reg, 0x00000000); |
| 74 | zeroes = pci_read_config32(dev, reg); |
| 75 | |
| 76 | pci_write_config32(dev, reg, value); |
| 77 | |
| 78 | return ones ^ zeroes; |
| 79 | } |
| 80 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 81 | /** |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 82 | * Given a device and register, read the size of the BAR for that register. |
| 83 | * |
| 84 | * @param dev Pointer to the device structure. |
| 85 | * @param index Address of the PCI configuration register. |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 86 | * @return TODO |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 87 | */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 88 | struct resource *pci_get_resource(struct device *dev, unsigned long index) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 89 | { |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 90 | struct resource *resource; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 91 | unsigned long value, attr; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 92 | resource_t moving, limit; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 93 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 94 | /* Initialize the resources to nothing. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 95 | resource = new_resource(dev, index); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 96 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 97 | /* Get the initial value. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 98 | value = pci_read_config32(dev, index); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 99 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 100 | /* See which bits move. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 101 | moving = pci_moving_config32(dev, index); |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 102 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 103 | /* Initialize attr to the bits that do not move. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 104 | attr = value & ~moving; |
| 105 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 106 | /* If it is a 64bit resource look at the high half as well. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 107 | if (((attr & PCI_BASE_ADDRESS_SPACE_IO) == 0) && |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 108 | ((attr & PCI_BASE_ADDRESS_MEM_LIMIT_MASK) == |
| 109 | PCI_BASE_ADDRESS_MEM_LIMIT_64)) { |
| 110 | /* Find the high bits that move. */ |
| 111 | moving |= |
| 112 | ((resource_t) pci_moving_config32(dev, index + 4)) << 32; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 113 | } |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 114 | |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 115 | /* Find the resource constraints. |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 116 | * Start by finding the bits that move. From there: |
| 117 | * - Size is the least significant bit of the bits that move. |
| 118 | * - Limit is all of the bits that move plus all of the lower bits. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 119 | * See PCI Spec 6.2.5.1. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 120 | */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 121 | limit = 0; |
| 122 | if (moving) { |
| 123 | resource->size = 1; |
| 124 | resource->align = resource->gran = 0; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 125 | while (!(moving & resource->size)) { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 126 | resource->size <<= 1; |
| 127 | resource->align += 1; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 128 | resource->gran += 1; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 129 | } |
| 130 | resource->limit = limit = moving | (resource->size - 1); |
Nico Huber | 8193b06 | 2015-10-21 15:43:41 +0200 | [diff] [blame] | 131 | |
| 132 | if (pci_base_address_is_memory_space(attr)) { |
| 133 | /* Page-align to allow individual mapping of devices. */ |
| 134 | if (resource->align < 12) |
| 135 | resource->align = 12; |
| 136 | } |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 137 | } |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 138 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 139 | /* |
| 140 | * Some broken hardware has read-only registers that do not |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 141 | * really size correctly. |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 142 | * |
| 143 | * Example: the Acer M7229 has BARs 1-4 normally read-only, |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 144 | * so BAR1 at offset 0x10 reads 0x1f1. If you size that register |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 145 | * by writing 0xffffffff to it, it will read back as 0x1f1 -- which |
| 146 | * is a violation of the spec. |
| 147 | * |
| 148 | * We catch this case and ignore it by observing which bits move. |
| 149 | * |
| 150 | * This also catches the common case of unimplemented registers |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 151 | * that always read back as 0. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 152 | */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 153 | if (moving == 0) { |
| 154 | if (value != 0) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 155 | printk(BIOS_DEBUG, "%s register %02lx(%08lx), " |
| 156 | "read-only ignoring it\n", |
| 157 | dev_path(dev), index, value); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 158 | } |
| 159 | resource->flags = 0; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 160 | } else if (attr & PCI_BASE_ADDRESS_SPACE_IO) { |
| 161 | /* An I/O mapped base address. */ |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 162 | resource->flags |= IORESOURCE_IO; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 163 | /* I don't want to deal with 32bit I/O resources. */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 164 | resource->limit = 0xffff; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 165 | } else { |
| 166 | /* A Memory mapped base address. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 167 | attr &= PCI_BASE_ADDRESS_MEM_ATTR_MASK; |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 168 | resource->flags |= IORESOURCE_MEM; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 169 | if (attr & PCI_BASE_ADDRESS_MEM_PREFETCH) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 170 | resource->flags |= IORESOURCE_PREFETCH; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 171 | attr &= PCI_BASE_ADDRESS_MEM_LIMIT_MASK; |
| 172 | if (attr == PCI_BASE_ADDRESS_MEM_LIMIT_32) { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 173 | /* 32bit limit. */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 174 | resource->limit = 0xffffffffUL; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 175 | } else if (attr == PCI_BASE_ADDRESS_MEM_LIMIT_1M) { |
| 176 | /* 1MB limit. */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 177 | resource->limit = 0x000fffffUL; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 178 | } else if (attr == PCI_BASE_ADDRESS_MEM_LIMIT_64) { |
| 179 | /* 64bit limit. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 180 | resource->limit = 0xffffffffffffffffULL; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 181 | resource->flags |= IORESOURCE_PCI64; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 182 | } else { |
| 183 | /* Invalid value. */ |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 184 | printk(BIOS_ERR, "Broken BAR with value %lx\n", attr); |
| 185 | printk(BIOS_ERR, " on dev %s at index %02lx\n", |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 186 | dev_path(dev), index); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 187 | resource->flags = 0; |
| 188 | } |
| 189 | } |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 190 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 191 | /* Don't let the limit exceed which bits can move. */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 192 | if (resource->limit > limit) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 193 | resource->limit = limit; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 194 | |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 195 | return resource; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 196 | } |
| 197 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 198 | /** |
| 199 | * Given a device and an index, read the size of the BAR for that register. |
| 200 | * |
| 201 | * @param dev Pointer to the device structure. |
| 202 | * @param index Address of the PCI configuration register. |
| 203 | */ |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 204 | static void pci_get_rom_resource(struct device *dev, unsigned long index) |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 205 | { |
| 206 | struct resource *resource; |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 207 | unsigned long value; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 208 | resource_t moving; |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 209 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 210 | /* Initialize the resources to nothing. */ |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 211 | resource = new_resource(dev, index); |
| 212 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 213 | /* Get the initial value. */ |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 214 | value = pci_read_config32(dev, index); |
| 215 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 216 | /* See which bits move. */ |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 217 | moving = pci_moving_config32(dev, index); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 218 | |
| 219 | /* Clear the Enable bit. */ |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 220 | moving = moving & ~PCI_ROM_ADDRESS_ENABLE; |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 221 | |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 222 | /* Find the resource constraints. |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 223 | * Start by finding the bits that move. From there: |
| 224 | * - Size is the least significant bit of the bits that move. |
| 225 | * - Limit is all of the bits that move plus all of the lower bits. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 226 | * See PCI Spec 6.2.5.1. |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 227 | */ |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 228 | if (moving) { |
| 229 | resource->size = 1; |
| 230 | resource->align = resource->gran = 0; |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 231 | while (!(moving & resource->size)) { |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 232 | resource->size <<= 1; |
| 233 | resource->align += 1; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 234 | resource->gran += 1; |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 235 | } |
Patrick Georgi | 16cdbb2 | 2009-04-21 20:14:31 +0000 | [diff] [blame] | 236 | resource->limit = moving | (resource->size - 1); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 237 | resource->flags |= IORESOURCE_MEM | IORESOURCE_READONLY; |
| 238 | } else { |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 239 | if (value != 0) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 240 | printk(BIOS_DEBUG, "%s register %02lx(%08lx), " |
| 241 | "read-only ignoring it\n", |
| 242 | dev_path(dev), index, value); |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 243 | } |
| 244 | resource->flags = 0; |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 245 | } |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 246 | compact_resources(dev); |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 247 | } |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 248 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 249 | /** |
Patrick Rudolph | 4e2f95b | 2018-05-16 14:56:22 +0200 | [diff] [blame] | 250 | * Given a device, read the size of the MSI-X table. |
| 251 | * |
| 252 | * @param dev Pointer to the device structure. |
| 253 | * @return MSI-X table size or 0 if not MSI-X capable device |
| 254 | */ |
| 255 | size_t pci_msix_table_size(struct device *dev) |
| 256 | { |
| 257 | const size_t pos = pci_find_capability(dev, PCI_CAP_ID_MSIX); |
| 258 | if (!pos) |
| 259 | return 0; |
| 260 | |
| 261 | const u16 control = pci_read_config16(dev, pos + PCI_MSIX_FLAGS); |
| 262 | return (control & PCI_MSIX_FLAGS_QSIZE) + 1; |
| 263 | } |
| 264 | |
| 265 | /** |
| 266 | * Given a device, return the table offset and bar the MSI-X tables resides in. |
| 267 | * |
| 268 | * @param dev Pointer to the device structure. |
| 269 | * @param offset Returned value gives the offset in bytes inside the PCI BAR. |
| 270 | * @param idx The returned value is the index of the PCI_BASE_ADDRESS register |
| 271 | * the MSI-X table is located in. |
| 272 | * @return Zero on success |
| 273 | */ |
| 274 | int pci_msix_table_bar(struct device *dev, u32 *offset, u8 *idx) |
| 275 | { |
| 276 | const size_t pos = pci_find_capability(dev, PCI_CAP_ID_MSIX); |
| 277 | if (!pos || !offset || !idx) |
| 278 | return 1; |
| 279 | |
| 280 | *offset = pci_read_config32(dev, pos + PCI_MSIX_TABLE); |
| 281 | *idx = (u8)(*offset & PCI_MSIX_PBA_BIR); |
| 282 | *offset &= PCI_MSIX_PBA_OFFSET; |
| 283 | |
| 284 | return 0; |
| 285 | } |
| 286 | |
| 287 | /** |
| 288 | * Given a device, return a msix_entry pointer or NULL if no table was found. |
| 289 | * |
| 290 | * @param dev Pointer to the device structure. |
| 291 | * |
| 292 | * @return NULL on error |
| 293 | */ |
| 294 | struct msix_entry *pci_msix_get_table(struct device *dev) |
| 295 | { |
| 296 | struct resource *res; |
| 297 | u32 offset; |
| 298 | u8 idx; |
| 299 | |
| 300 | if (pci_msix_table_bar(dev, &offset, &idx)) |
| 301 | return NULL; |
| 302 | |
| 303 | if (idx > 5) |
| 304 | return NULL; |
| 305 | |
| 306 | res = probe_resource(dev, idx * 4 + PCI_BASE_ADDRESS_0); |
| 307 | if (!res || !res->base || offset >= res->size) |
| 308 | return NULL; |
| 309 | |
| 310 | if ((res->flags & IORESOURCE_PCI64) && |
| 311 | (uintptr_t)res->base != res->base) |
| 312 | return NULL; |
| 313 | |
| 314 | return (struct msix_entry *)((uintptr_t)res->base + offset); |
| 315 | } |
| 316 | |
| 317 | /** |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 318 | * Read the base address registers for a given device. |
| 319 | * |
| 320 | * @param dev Pointer to the dev structure. |
| 321 | * @param howmany How many registers to read (6 for device, 2 for bridge). |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 322 | */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 323 | static void pci_read_bases(struct device *dev, unsigned int howmany) |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 324 | { |
| 325 | unsigned long index; |
| 326 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 327 | for (index = PCI_BASE_ADDRESS_0; |
| 328 | (index < PCI_BASE_ADDRESS_0 + (howmany << 2));) { |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 329 | struct resource *resource; |
| 330 | resource = pci_get_resource(dev, index); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 331 | index += (resource->flags & IORESOURCE_PCI64) ? 8 : 4; |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 332 | } |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 333 | |
| 334 | compact_resources(dev); |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 335 | } |
| 336 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 337 | static void pci_record_bridge_resource(struct device *dev, resource_t moving, |
Martin Roth | 38ddbfb | 2019-10-23 21:41:00 -0600 | [diff] [blame] | 338 | unsigned int index, unsigned long type) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 339 | { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 340 | struct resource *resource; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 341 | unsigned long gran; |
| 342 | resource_t step; |
| 343 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 344 | resource = NULL; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 345 | |
| 346 | if (!moving) |
| 347 | return; |
| 348 | |
| 349 | /* Initialize the constraints on the current bus. */ |
| 350 | resource = new_resource(dev, index); |
| 351 | resource->size = 0; |
| 352 | gran = 0; |
| 353 | step = 1; |
| 354 | while ((moving & step) == 0) { |
| 355 | gran += 1; |
| 356 | step <<= 1; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 357 | } |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 358 | resource->gran = gran; |
| 359 | resource->align = gran; |
| 360 | resource->limit = moving | (step - 1); |
| 361 | resource->flags = type | IORESOURCE_PCI_BRIDGE | |
| 362 | IORESOURCE_BRIDGE; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 363 | } |
| 364 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 365 | static void pci_bridge_read_bases(struct device *dev) |
| 366 | { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 367 | resource_t moving_base, moving_limit, moving; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 368 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 369 | /* See if the bridge I/O resources are implemented. */ |
| 370 | moving_base = ((u32) pci_moving_config8(dev, PCI_IO_BASE)) << 8; |
| 371 | moving_base |= |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 372 | ((u32) pci_moving_config16(dev, PCI_IO_BASE_UPPER16)) << 16; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 373 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 374 | moving_limit = ((u32) pci_moving_config8(dev, PCI_IO_LIMIT)) << 8; |
| 375 | moving_limit |= |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 376 | ((u32) pci_moving_config16(dev, PCI_IO_LIMIT_UPPER16)) << 16; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 377 | |
| 378 | moving = moving_base & moving_limit; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 379 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 380 | /* Initialize the I/O space constraints on the current bus. */ |
| 381 | pci_record_bridge_resource(dev, moving, PCI_IO_BASE, IORESOURCE_IO); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 382 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 383 | /* See if the bridge prefmem resources are implemented. */ |
| 384 | moving_base = |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 385 | ((resource_t) pci_moving_config16(dev, PCI_PREF_MEMORY_BASE)) << 16; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 386 | moving_base |= |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 387 | ((resource_t) pci_moving_config32(dev, PCI_PREF_BASE_UPPER32)) << 32; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 388 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 389 | moving_limit = |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 390 | ((resource_t) pci_moving_config16(dev, PCI_PREF_MEMORY_LIMIT)) << 16; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 391 | moving_limit |= |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 392 | ((resource_t) pci_moving_config32(dev, PCI_PREF_LIMIT_UPPER32)) << 32; |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 393 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 394 | moving = moving_base & moving_limit; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 395 | /* Initialize the prefetchable memory constraints on the current bus. */ |
| 396 | pci_record_bridge_resource(dev, moving, PCI_PREF_MEMORY_BASE, |
| 397 | IORESOURCE_MEM | IORESOURCE_PREFETCH); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 398 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 399 | /* See if the bridge mem resources are implemented. */ |
| 400 | moving_base = ((u32) pci_moving_config16(dev, PCI_MEMORY_BASE)) << 16; |
| 401 | moving_limit = ((u32) pci_moving_config16(dev, PCI_MEMORY_LIMIT)) << 16; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 402 | |
| 403 | moving = moving_base & moving_limit; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 404 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 405 | /* Initialize the memory resources on the current bus. */ |
| 406 | pci_record_bridge_resource(dev, moving, PCI_MEMORY_BASE, |
| 407 | IORESOURCE_MEM); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 408 | |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 409 | compact_resources(dev); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 410 | } |
| 411 | |
Eric Biederman | 5899fd8 | 2003-04-24 06:25:08 +0000 | [diff] [blame] | 412 | void pci_dev_read_resources(struct device *dev) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 413 | { |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 414 | pci_read_bases(dev, 6); |
| 415 | pci_get_rom_resource(dev, PCI_ROM_ADDRESS); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 416 | } |
| 417 | |
Eric Biederman | 5899fd8 | 2003-04-24 06:25:08 +0000 | [diff] [blame] | 418 | void pci_bus_read_resources(struct device *dev) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 419 | { |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 420 | pci_bridge_read_bases(dev); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 421 | pci_read_bases(dev, 2); |
| 422 | pci_get_rom_resource(dev, PCI_ROM_ADDRESS1); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 423 | } |
| 424 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 425 | void pci_domain_read_resources(struct device *dev) |
| 426 | { |
| 427 | struct resource *res; |
| 428 | |
| 429 | /* Initialize the system-wide I/O space constraints. */ |
| 430 | res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0)); |
| 431 | res->limit = 0xffffUL; |
| 432 | res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | |
| 433 | IORESOURCE_ASSIGNED; |
| 434 | |
| 435 | /* Initialize the system-wide memory resources constraints. */ |
| 436 | res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0)); |
| 437 | res->limit = 0xffffffffULL; |
| 438 | res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | |
| 439 | IORESOURCE_ASSIGNED; |
| 440 | } |
| 441 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 442 | static void pci_set_resource(struct device *dev, struct resource *resource) |
| 443 | { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 444 | resource_t base, end; |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 445 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 446 | /* Make certain the resource has actually been assigned a value. */ |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 447 | if (!(resource->flags & IORESOURCE_ASSIGNED)) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 448 | printk(BIOS_ERR, "ERROR: %s %02lx %s size: 0x%010llx not " |
| 449 | "assigned\n", dev_path(dev), resource->index, |
| 450 | resource_type(resource), resource->size); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 451 | return; |
| 452 | } |
| 453 | |
Myles Watson | eb81a5b | 2009-11-05 20:06:19 +0000 | [diff] [blame] | 454 | /* If this resource is fixed don't worry about it. */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 455 | if (resource->flags & IORESOURCE_FIXED) |
Myles Watson | eb81a5b | 2009-11-05 20:06:19 +0000 | [diff] [blame] | 456 | return; |
Myles Watson | eb81a5b | 2009-11-05 20:06:19 +0000 | [diff] [blame] | 457 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 458 | /* If I have already stored this resource don't worry about it. */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 459 | if (resource->flags & IORESOURCE_STORED) |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 460 | return; |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 461 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 462 | /* If the resource is subtractive don't worry about it. */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 463 | if (resource->flags & IORESOURCE_SUBTRACTIVE) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 464 | return; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 465 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 466 | /* Only handle PCI memory and I/O resources for now. */ |
| 467 | if (!(resource->flags & (IORESOURCE_MEM | IORESOURCE_IO))) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 468 | return; |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 469 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 470 | /* Enable the resources in the command register. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 471 | if (resource->size) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 472 | if (resource->flags & IORESOURCE_MEM) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 473 | dev->command |= PCI_COMMAND_MEMORY; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 474 | if (resource->flags & IORESOURCE_IO) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 475 | dev->command |= PCI_COMMAND_IO; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 476 | if (resource->flags & IORESOURCE_PCI_BRIDGE) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 477 | dev->command |= PCI_COMMAND_MASTER; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 478 | } |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 479 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 480 | /* Get the base address. */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 481 | base = resource->base; |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 482 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 483 | /* Get the end. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 484 | end = resource_end(resource); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 485 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 486 | /* Now store the resource. */ |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 487 | resource->flags |= IORESOURCE_STORED; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 488 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 489 | /* |
| 490 | * PCI bridges have no enable bit. They are disabled if the base of |
| 491 | * the range is greater than the limit. If the size is zero, disable |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 492 | * by setting the base = limit and end = limit - 2^gran. |
| 493 | */ |
| 494 | if (resource->size == 0 && (resource->flags & IORESOURCE_PCI_BRIDGE)) { |
| 495 | base = resource->limit; |
| 496 | end = resource->limit - (1 << resource->gran); |
| 497 | resource->base = base; |
| 498 | } |
| 499 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 500 | if (!(resource->flags & IORESOURCE_PCI_BRIDGE)) { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 501 | unsigned long base_lo, base_hi; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 502 | |
| 503 | /* |
| 504 | * Some chipsets allow us to set/clear the I/O bit |
| 505 | * (e.g. VIA 82C686A). So set it to be safe. |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 506 | */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 507 | base_lo = base & 0xffffffff; |
| 508 | base_hi = (base >> 32) & 0xffffffff; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 509 | if (resource->flags & IORESOURCE_IO) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 510 | base_lo |= PCI_BASE_ADDRESS_SPACE_IO; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 511 | pci_write_config32(dev, resource->index, base_lo); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 512 | if (resource->flags & IORESOURCE_PCI64) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 513 | pci_write_config32(dev, resource->index + 4, base_hi); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 514 | } else if (resource->index == PCI_IO_BASE) { |
| 515 | /* Set the I/O ranges. */ |
| 516 | pci_write_config8(dev, PCI_IO_BASE, base >> 8); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 517 | pci_write_config16(dev, PCI_IO_BASE_UPPER16, base >> 16); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 518 | pci_write_config8(dev, PCI_IO_LIMIT, end >> 8); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 519 | pci_write_config16(dev, PCI_IO_LIMIT_UPPER16, end >> 16); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 520 | } else if (resource->index == PCI_MEMORY_BASE) { |
| 521 | /* Set the memory range. */ |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 522 | pci_write_config16(dev, PCI_MEMORY_BASE, base >> 16); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 523 | pci_write_config16(dev, PCI_MEMORY_LIMIT, end >> 16); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 524 | } else if (resource->index == PCI_PREF_MEMORY_BASE) { |
| 525 | /* Set the prefetchable memory range. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 526 | pci_write_config16(dev, PCI_PREF_MEMORY_BASE, base >> 16); |
| 527 | pci_write_config32(dev, PCI_PREF_BASE_UPPER32, base >> 32); |
| 528 | pci_write_config16(dev, PCI_PREF_MEMORY_LIMIT, end >> 16); |
| 529 | pci_write_config32(dev, PCI_PREF_LIMIT_UPPER32, end >> 32); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 530 | } else { |
| 531 | /* Don't let me think I stored the resource. */ |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 532 | resource->flags &= ~IORESOURCE_STORED; |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 533 | printk(BIOS_ERR, "ERROR: invalid resource->index %lx\n", |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 534 | resource->index); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 535 | } |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 536 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 537 | report_resource_stored(dev, resource, ""); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 538 | } |
| 539 | |
Eric Biederman | 5899fd8 | 2003-04-24 06:25:08 +0000 | [diff] [blame] | 540 | void pci_dev_set_resources(struct device *dev) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 541 | { |
Myles Watson | c25cc11 | 2010-05-21 14:33:48 +0000 | [diff] [blame] | 542 | struct resource *res; |
Myles Watson | 894a347 | 2010-06-09 22:41:35 +0000 | [diff] [blame] | 543 | struct bus *bus; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 544 | u8 line; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 545 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 546 | for (res = dev->resource_list; res; res = res->next) |
Myles Watson | c25cc11 | 2010-05-21 14:33:48 +0000 | [diff] [blame] | 547 | pci_set_resource(dev, res); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 548 | |
Myles Watson | 894a347 | 2010-06-09 22:41:35 +0000 | [diff] [blame] | 549 | for (bus = dev->link_list; bus; bus = bus->next) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 550 | if (bus->children) |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 551 | assign_resources(bus); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 552 | } |
| 553 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 554 | /* Set a default latency timer. */ |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 555 | pci_write_config8(dev, PCI_LATENCY_TIMER, 0x40); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 556 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 557 | /* Set a default secondary latency timer. */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 558 | if ((dev->hdr_type & 0x7f) == PCI_HEADER_TYPE_BRIDGE) |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 559 | pci_write_config8(dev, PCI_SEC_LATENCY_TIMER, 0x40); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 560 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 561 | /* Zero the IRQ settings. */ |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 562 | line = pci_read_config8(dev, PCI_INTERRUPT_PIN); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 563 | if (line) |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 564 | pci_write_config8(dev, PCI_INTERRUPT_LINE, 0); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 565 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 566 | /* Set the cache line size, so far 64 bytes is good for everyone. */ |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 567 | pci_write_config8(dev, PCI_CACHE_LINE_SIZE, 64 >> 2); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 568 | } |
| 569 | |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 570 | void pci_dev_enable_resources(struct device *dev) |
| 571 | { |
Kyösti Mälkki | cac0231 | 2019-06-30 08:40:04 +0300 | [diff] [blame] | 572 | const struct pci_operations *ops = NULL; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 573 | u16 command; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 574 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 575 | /* Set the subsystem vendor and device ID for mainboard devices. */ |
Kyösti Mälkki | cac0231 | 2019-06-30 08:40:04 +0300 | [diff] [blame] | 576 | if (dev->ops) |
| 577 | ops = dev->ops->ops_pci; |
Eric Biederman | dbec2d4 | 2004-10-21 10:44:08 +0000 | [diff] [blame] | 578 | if (dev->on_mainboard && ops && ops->set_subsystem) { |
Duncan Laurie | 7e1c83e | 2013-08-09 07:55:10 -0700 | [diff] [blame] | 579 | if (CONFIG_SUBSYSTEM_VENDOR_ID) |
| 580 | dev->subsystem_vendor = CONFIG_SUBSYSTEM_VENDOR_ID; |
Rizwan Qureshi | fd89129 | 2017-04-26 21:00:37 +0530 | [diff] [blame] | 581 | else if (!dev->subsystem_vendor) |
| 582 | dev->subsystem_vendor = pci_read_config16(dev, |
| 583 | PCI_VENDOR_ID); |
Duncan Laurie | 7e1c83e | 2013-08-09 07:55:10 -0700 | [diff] [blame] | 584 | if (CONFIG_SUBSYSTEM_DEVICE_ID) |
| 585 | dev->subsystem_device = CONFIG_SUBSYSTEM_DEVICE_ID; |
Rizwan Qureshi | fd89129 | 2017-04-26 21:00:37 +0530 | [diff] [blame] | 586 | else if (!dev->subsystem_device) |
| 587 | dev->subsystem_device = pci_read_config16(dev, |
| 588 | PCI_DEVICE_ID); |
| 589 | |
Sven Schnelle | 9132102 | 2011-03-01 19:58:47 +0000 | [diff] [blame] | 590 | printk(BIOS_DEBUG, "%s subsystem <- %04x/%04x\n", |
| 591 | dev_path(dev), dev->subsystem_vendor, |
| 592 | dev->subsystem_device); |
| 593 | ops->set_subsystem(dev, dev->subsystem_vendor, |
| 594 | dev->subsystem_device); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 595 | } |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 596 | command = pci_read_config16(dev, PCI_COMMAND); |
| 597 | command |= dev->command; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 598 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 599 | /* v3 has |
| 600 | * command |= (PCI_COMMAND_PARITY + PCI_COMMAND_SERR); // Error check. |
| 601 | */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 602 | |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 603 | printk(BIOS_DEBUG, "%s cmd <- %02x\n", dev_path(dev), command); |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 604 | pci_write_config16(dev, PCI_COMMAND, command); |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 605 | } |
| 606 | |
| 607 | void pci_bus_enable_resources(struct device *dev) |
| 608 | { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 609 | u16 ctrl; |
| 610 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 611 | /* |
| 612 | * Enable I/O in command register if there is VGA card |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 613 | * connected with (even it does not claim I/O resource). |
| 614 | */ |
Myles Watson | 894a347 | 2010-06-09 22:41:35 +0000 | [diff] [blame] | 615 | if (dev->link_list->bridge_ctrl & PCI_BRIDGE_CTL_VGA) |
Li-Ta Lo | 515f6c7 | 2005-01-11 22:48:54 +0000 | [diff] [blame] | 616 | dev->command |= PCI_COMMAND_IO; |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 617 | ctrl = pci_read_config16(dev, PCI_BRIDGE_CONTROL); |
Myles Watson | 894a347 | 2010-06-09 22:41:35 +0000 | [diff] [blame] | 618 | ctrl |= dev->link_list->bridge_ctrl; |
Kyösti Mälkki | 382e216 | 2019-09-21 16:19:32 +0300 | [diff] [blame] | 619 | ctrl |= (PCI_BRIDGE_CTL_PARITY | PCI_BRIDGE_CTL_SERR); /* Error check. */ |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 620 | printk(BIOS_DEBUG, "%s bridge ctrl <- %04x\n", dev_path(dev), ctrl); |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 621 | pci_write_config16(dev, PCI_BRIDGE_CONTROL, ctrl); |
| 622 | |
| 623 | pci_dev_enable_resources(dev); |
| 624 | } |
| 625 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 626 | void pci_bus_reset(struct bus *bus) |
| 627 | { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 628 | u16 ctl; |
| 629 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 630 | ctl = pci_read_config16(bus->dev, PCI_BRIDGE_CONTROL); |
| 631 | ctl |= PCI_BRIDGE_CTL_BUS_RESET; |
| 632 | pci_write_config16(bus->dev, PCI_BRIDGE_CONTROL, ctl); |
| 633 | mdelay(10); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 634 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 635 | ctl &= ~PCI_BRIDGE_CTL_BUS_RESET; |
| 636 | pci_write_config16(bus->dev, PCI_BRIDGE_CONTROL, ctl); |
| 637 | delay(1); |
| 638 | } |
| 639 | |
Elyes HAOUAS | 88030b7 | 2018-09-20 17:26:10 +0200 | [diff] [blame] | 640 | void pci_dev_set_subsystem(struct device *dev, unsigned int vendor, |
| 641 | unsigned int device) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 642 | { |
Subrata Banik | 9514d47 | 2019-03-20 14:56:27 +0530 | [diff] [blame] | 643 | uint8_t offset; |
| 644 | |
| 645 | /* Header type */ |
| 646 | switch (dev->hdr_type & 0x7f) { |
| 647 | case PCI_HEADER_TYPE_NORMAL: |
| 648 | offset = PCI_SUBSYSTEM_VENDOR_ID; |
| 649 | break; |
| 650 | case PCI_HEADER_TYPE_BRIDGE: |
| 651 | offset = pci_find_capability(dev, PCI_CAP_ID_SSVID); |
| 652 | if (!offset) |
| 653 | return; |
| 654 | offset += 4; /* Vendor ID at offset 4 */ |
| 655 | break; |
| 656 | case PCI_HEADER_TYPE_CARDBUS: |
| 657 | offset = PCI_CB_SUBSYSTEM_VENDOR_ID; |
| 658 | break; |
| 659 | default: |
| 660 | return; |
| 661 | } |
| 662 | |
Subrata Banik | 4a0f071 | 2019-03-20 14:29:47 +0530 | [diff] [blame] | 663 | if (!vendor || !device) { |
Subrata Banik | 9514d47 | 2019-03-20 14:56:27 +0530 | [diff] [blame] | 664 | pci_write_config32(dev, offset, |
Subrata Banik | 4a0f071 | 2019-03-20 14:29:47 +0530 | [diff] [blame] | 665 | pci_read_config32(dev, PCI_VENDOR_ID)); |
| 666 | } else { |
Subrata Banik | 9514d47 | 2019-03-20 14:56:27 +0530 | [diff] [blame] | 667 | pci_write_config32(dev, offset, |
Subrata Banik | 4a0f071 | 2019-03-20 14:29:47 +0530 | [diff] [blame] | 668 | ((device & 0xffff) << 16) | (vendor & 0xffff)); |
| 669 | } |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 670 | } |
| 671 | |
Frans Hendriks | b71181a | 2019-10-04 14:06:33 +0200 | [diff] [blame] | 672 | static int should_run_oprom(struct device *dev, struct rom_header *rom) |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 673 | { |
| 674 | static int should_run = -1; |
| 675 | |
Frans Hendriks | b71181a | 2019-10-04 14:06:33 +0200 | [diff] [blame] | 676 | if (CONFIG(VENDORCODE_ELTAN_VBOOT)) |
| 677 | if (rom != NULL) |
| 678 | if (!verified_boot_should_run_oprom(rom)) |
| 679 | return 0; |
| 680 | |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 681 | if (should_run >= 0) |
| 682 | return should_run; |
| 683 | |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 684 | if (CONFIG(ALWAYS_RUN_OPROM)) { |
Aaron Durbin | 1051025 | 2018-01-30 10:04:02 -0700 | [diff] [blame] | 685 | should_run = 1; |
| 686 | return should_run; |
| 687 | } |
| 688 | |
Kyösti Mälkki | 9ab1c10 | 2013-12-22 00:22:49 +0200 | [diff] [blame] | 689 | /* Don't run VGA option ROMs, unless we have to print |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 690 | * something on the screen before the kernel is loaded. |
| 691 | */ |
Furquan Shaikh | 0325dc6 | 2016-07-25 13:02:36 -0700 | [diff] [blame] | 692 | should_run = display_init_required(); |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 693 | |
Kyösti Mälkki | 9ab1c10 | 2013-12-22 00:22:49 +0200 | [diff] [blame] | 694 | if (!should_run) |
| 695 | printk(BIOS_DEBUG, "Not running VGA Option ROM\n"); |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 696 | return should_run; |
| 697 | } |
| 698 | |
| 699 | static int should_load_oprom(struct device *dev) |
| 700 | { |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 701 | /* If S3_VGA_ROM_RUN is disabled, skip running VGA option |
| 702 | * ROMs when coming out of an S3 resume. |
| 703 | */ |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 704 | if (!CONFIG(S3_VGA_ROM_RUN) && acpi_is_wakeup_s3() && |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 705 | ((dev->class >> 8) == PCI_CLASS_DISPLAY_VGA)) |
| 706 | return 0; |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 707 | if (CONFIG(ALWAYS_LOAD_OPROM)) |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 708 | return 1; |
Frans Hendriks | b71181a | 2019-10-04 14:06:33 +0200 | [diff] [blame] | 709 | if (should_run_oprom(dev, NULL)) |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 710 | return 1; |
| 711 | |
| 712 | return 0; |
| 713 | } |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 714 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 715 | /** Default handler: only runs the relevant PCI BIOS. */ |
Li-Ta Lo | 883b879 | 2005-01-10 23:16:22 +0000 | [diff] [blame] | 716 | void pci_dev_init(struct device *dev) |
| 717 | { |
| 718 | struct rom_header *rom, *ram; |
| 719 | |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 720 | if (!CONFIG(VGA_ROM_RUN)) |
Aaron Durbin | fbed9a5 | 2018-01-30 09:58:51 -0700 | [diff] [blame] | 721 | return; |
| 722 | |
Vladimir Serbinenko | b32816e | 2013-12-20 17:47:19 +0100 | [diff] [blame] | 723 | /* Only execute VGA ROMs. */ |
| 724 | if (((dev->class >> 8) != PCI_CLASS_DISPLAY_VGA)) |
Myles Watson | 17aeeca | 2009-10-07 18:41:08 +0000 | [diff] [blame] | 725 | return; |
Roman Kononov | 778a42b | 2007-04-06 18:34:39 +0000 | [diff] [blame] | 726 | |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 727 | if (!should_load_oprom(dev)) |
Stefan Reinauer | 74a0efe | 2012-03-30 17:10:49 -0700 | [diff] [blame] | 728 | return; |
Martin Roth | 5dd4a2a | 2018-03-06 16:10:45 -0700 | [diff] [blame] | 729 | timestamp_add_now(TS_OPROM_INITIALIZE); |
Aaron Durbin | ce872cb | 2013-03-28 15:59:19 -0500 | [diff] [blame] | 730 | |
| 731 | rom = pci_rom_probe(dev); |
| 732 | if (rom == NULL) |
| 733 | return; |
| 734 | |
| 735 | ram = pci_rom_load(dev, rom); |
| 736 | if (ram == NULL) |
| 737 | return; |
Martin Roth | 5dd4a2a | 2018-03-06 16:10:45 -0700 | [diff] [blame] | 738 | timestamp_add_now(TS_OPROM_COPY_END); |
Aaron Durbin | ce872cb | 2013-03-28 15:59:19 -0500 | [diff] [blame] | 739 | |
Frans Hendriks | b71181a | 2019-10-04 14:06:33 +0200 | [diff] [blame] | 740 | if (!should_run_oprom(dev, rom)) |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 741 | return; |
| 742 | |
Stefan Reinauer | d98cf5b | 2008-08-01 11:25:41 +0000 | [diff] [blame] | 743 | run_bios(dev, (unsigned long)ram); |
Johanna Schander | db7a3ae | 2019-07-24 10:14:26 +0200 | [diff] [blame] | 744 | |
Kyösti Mälkki | ab56b3b | 2013-11-28 16:44:51 +0200 | [diff] [blame] | 745 | gfx_set_init_done(1); |
| 746 | printk(BIOS_DEBUG, "VGA Option ROM was run\n"); |
Martin Roth | 5dd4a2a | 2018-03-06 16:10:45 -0700 | [diff] [blame] | 747 | timestamp_add_now(TS_OPROM_END); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 748 | } |
Li-Ta Lo | 883b879 | 2005-01-10 23:16:22 +0000 | [diff] [blame] | 749 | |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 750 | /** Default device operation for PCI devices */ |
Subrata Banik | ffc790b | 2017-12-11 10:29:49 +0530 | [diff] [blame] | 751 | struct pci_operations pci_dev_ops_pci = { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 752 | .set_subsystem = pci_dev_set_subsystem, |
| 753 | }; |
| 754 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 755 | struct device_operations default_pci_ops_dev = { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 756 | .read_resources = pci_dev_read_resources, |
| 757 | .set_resources = pci_dev_set_resources, |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 758 | .enable_resources = pci_dev_enable_resources, |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 759 | #if CONFIG(HAVE_ACPI_TABLES) |
Patrick Rudolph | a5c2ac6 | 2016-03-31 20:04:23 +0200 | [diff] [blame] | 760 | .write_acpi_tables = pci_rom_write_acpi_tables, |
Nico Huber | 68680dd | 2020-03-31 17:34:52 +0200 | [diff] [blame] | 761 | .acpi_fill_ssdt = pci_rom_ssdt, |
Patrick Rudolph | a5c2ac6 | 2016-03-31 20:04:23 +0200 | [diff] [blame] | 762 | #endif |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 763 | .init = pci_dev_init, |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 764 | .ops_pci = &pci_dev_ops_pci, |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 765 | }; |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 766 | |
| 767 | /** Default device operations for PCI bridges */ |
Eric Biederman | a9e632c | 2004-11-18 22:38:08 +0000 | [diff] [blame] | 768 | static struct pci_operations pci_bus_ops_pci = { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 769 | .set_subsystem = 0, |
| 770 | }; |
Li-Ta Lo | 883b879 | 2005-01-10 23:16:22 +0000 | [diff] [blame] | 771 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 772 | struct device_operations default_pci_ops_bus = { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 773 | .read_resources = pci_bus_read_resources, |
| 774 | .set_resources = pci_dev_set_resources, |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 775 | .enable_resources = pci_bus_enable_resources, |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 776 | .scan_bus = pci_scan_bridge, |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 777 | .reset_bus = pci_bus_reset, |
| 778 | .ops_pci = &pci_bus_ops_pci, |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 779 | }; |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 780 | |
| 781 | /** |
Nico Huber | 061b905 | 2019-09-21 15:58:23 +0200 | [diff] [blame] | 782 | * Check for compatibility to route legacy VGA cycles through a bridge. |
| 783 | * |
| 784 | * Originally, when decoding i/o ports for legacy VGA cycles, bridges |
| 785 | * should only consider the 10 least significant bits of the port address. |
| 786 | * This means all VGA registers were aliased every 1024 ports! |
| 787 | * e.g. 0x3b0 was also decoded as 0x7b0, 0xbb0 etc. |
| 788 | * |
| 789 | * To avoid this mess, a bridge control bit (VGA16) was introduced in |
| 790 | * 2003 to enable decoding of 16-bit port addresses. As we don't want |
| 791 | * to make this any more complex for now, we use this bit if possible |
| 792 | * and only warn if it's not supported (in set_vga_bridge_bits()). |
| 793 | */ |
| 794 | static void pci_bridge_vga_compat(struct bus *const bus) |
| 795 | { |
| 796 | uint16_t bridge_ctrl; |
| 797 | |
| 798 | bridge_ctrl = pci_read_config16(bus->dev, PCI_BRIDGE_CONTROL); |
| 799 | |
| 800 | /* Ensure VGA decoding is disabled during probing (it should |
| 801 | be by default, but we run blobs nowadays) */ |
| 802 | bridge_ctrl &= ~PCI_BRIDGE_CTL_VGA; |
| 803 | pci_write_config16(bus->dev, PCI_BRIDGE_CONTROL, bridge_ctrl); |
| 804 | |
| 805 | /* If the upstream bridge doesn't support VGA16, we don't have to check */ |
| 806 | bus->no_vga16 |= bus->dev->bus->no_vga16; |
| 807 | if (bus->no_vga16) |
| 808 | return; |
| 809 | |
| 810 | /* Test if we can enable 16-bit decoding */ |
| 811 | bridge_ctrl |= PCI_BRIDGE_CTL_VGA16; |
| 812 | pci_write_config16(bus->dev, PCI_BRIDGE_CONTROL, bridge_ctrl); |
| 813 | bridge_ctrl = pci_read_config16(bus->dev, PCI_BRIDGE_CONTROL); |
| 814 | |
| 815 | bus->no_vga16 = !(bridge_ctrl & PCI_BRIDGE_CTL_VGA16); |
| 816 | } |
| 817 | |
| 818 | /** |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 819 | * Detect the type of downstream bridge. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 820 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 821 | * This function is a heuristic to detect which type of bus is downstream |
| 822 | * of a PCI-to-PCI bridge. This functions by looking for various capability |
| 823 | * blocks to figure out the type of downstream bridge. PCI-X, PCI-E, and |
| 824 | * Hypertransport all seem to have appropriate capabilities. |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 825 | * |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 826 | * When only a PCI-Express capability is found the type is examined to see |
| 827 | * which type of bridge we have. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 828 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 829 | * @param dev Pointer to the device structure of the bridge. |
| 830 | * @return Appropriate bridge operations. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 831 | */ |
Aaron Durbin | c30d913 | 2017-08-07 16:55:43 -0600 | [diff] [blame] | 832 | static struct device_operations *get_pci_bridge_ops(struct device *dev) |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 833 | { |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 834 | #if CONFIG(PCIX_PLUGIN_SUPPORT) |
Ronald G. Minnich | 78a1667 | 2012-11-29 16:28:21 -0800 | [diff] [blame] | 835 | unsigned int pcixpos; |
| 836 | pcixpos = pci_find_capability(dev, PCI_CAP_ID_PCIX); |
| 837 | if (pcixpos) { |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 838 | printk(BIOS_DEBUG, "%s subordinate bus PCI-X\n", dev_path(dev)); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 839 | return &default_pcix_ops_bus; |
| 840 | } |
| 841 | #endif |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 842 | #if CONFIG(HYPERTRANSPORT_PLUGIN_SUPPORT) |
Ronald G. Minnich | 78a1667 | 2012-11-29 16:28:21 -0800 | [diff] [blame] | 843 | unsigned int htpos = 0; |
| 844 | while ((htpos = pci_find_next_capability(dev, PCI_CAP_ID_HT, htpos))) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 845 | u16 flags; |
Ronald G. Minnich | 78a1667 | 2012-11-29 16:28:21 -0800 | [diff] [blame] | 846 | flags = pci_read_config16(dev, htpos + PCI_CAP_FLAGS); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 847 | if ((flags >> 13) == 1) { |
| 848 | /* Host or Secondary Interface */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 849 | printk(BIOS_DEBUG, "%s subordinate bus HT\n", |
| 850 | dev_path(dev)); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 851 | return &default_ht_ops_bus; |
| 852 | } |
| 853 | } |
| 854 | #endif |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 855 | #if CONFIG(PCIEXP_PLUGIN_SUPPORT) |
Ronald G. Minnich | 78a1667 | 2012-11-29 16:28:21 -0800 | [diff] [blame] | 856 | unsigned int pciexpos; |
| 857 | pciexpos = pci_find_capability(dev, PCI_CAP_ID_PCIE); |
| 858 | if (pciexpos) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 859 | u16 flags; |
Ronald G. Minnich | 78a1667 | 2012-11-29 16:28:21 -0800 | [diff] [blame] | 860 | flags = pci_read_config16(dev, pciexpos + PCI_EXP_FLAGS); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 861 | switch ((flags & PCI_EXP_FLAGS_TYPE) >> 4) { |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 862 | case PCI_EXP_TYPE_ROOT_PORT: |
| 863 | case PCI_EXP_TYPE_UPSTREAM: |
| 864 | case PCI_EXP_TYPE_DOWNSTREAM: |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 865 | printk(BIOS_DEBUG, "%s subordinate bus PCI Express\n", |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 866 | dev_path(dev)); |
Jeremy Soller | cf2ac54 | 2019-10-09 21:40:36 -0600 | [diff] [blame] | 867 | #if CONFIG(PCIEXP_HOTPLUG) |
| 868 | u16 sltcap; |
| 869 | sltcap = pci_read_config16(dev, pciexpos + PCI_EXP_SLTCAP); |
| 870 | if (sltcap & PCI_EXP_SLTCAP_HPC) { |
| 871 | printk(BIOS_DEBUG, "%s hot-plug capable\n", dev_path(dev)); |
| 872 | return &default_pciexp_hotplug_ops_bus; |
| 873 | } |
| 874 | #endif /* CONFIG(PCIEXP_HOTPLUG) */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 875 | return &default_pciexp_ops_bus; |
| 876 | case PCI_EXP_TYPE_PCI_BRIDGE: |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 877 | printk(BIOS_DEBUG, "%s subordinate PCI\n", |
| 878 | dev_path(dev)); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 879 | return &default_pci_ops_bus; |
| 880 | default: |
| 881 | break; |
| 882 | } |
| 883 | } |
| 884 | #endif |
| 885 | return &default_pci_ops_bus; |
| 886 | } |
| 887 | |
| 888 | /** |
Vadim Bendebury | 8049fc9 | 2012-04-24 12:53:19 -0700 | [diff] [blame] | 889 | * Check if a device id matches a PCI driver entry. |
| 890 | * |
| 891 | * The driver entry can either point at a zero terminated array of acceptable |
| 892 | * device IDs, or include a single device ID. |
| 893 | * |
Martin Roth | 98b698c | 2015-01-06 21:02:52 -0700 | [diff] [blame] | 894 | * @param driver pointer to the PCI driver entry being checked |
| 895 | * @param device_id PCI device ID of the device being matched |
Vadim Bendebury | 8049fc9 | 2012-04-24 12:53:19 -0700 | [diff] [blame] | 896 | */ |
| 897 | static int device_id_match(struct pci_driver *driver, unsigned short device_id) |
| 898 | { |
| 899 | if (driver->devices) { |
| 900 | unsigned short check_id; |
| 901 | const unsigned short *device_list = driver->devices; |
| 902 | while ((check_id = *device_list++) != 0) |
| 903 | if (check_id == device_id) |
| 904 | return 1; |
| 905 | } |
| 906 | |
| 907 | return (driver->device == device_id); |
| 908 | } |
| 909 | |
| 910 | /** |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 911 | * Set up PCI device operation. |
| 912 | * |
| 913 | * Check if it already has a driver. If not, use find_device_operations(), |
| 914 | * or set to a default based on type. |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 915 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 916 | * @param dev Pointer to the device whose pci_ops you want to set. |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 917 | * @see pci_drivers |
| 918 | */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 919 | static void set_pci_ops(struct device *dev) |
| 920 | { |
| 921 | struct pci_driver *driver; |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 922 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 923 | if (dev->ops) |
| 924 | return; |
| 925 | |
| 926 | /* |
| 927 | * Look through the list of setup drivers and find one for |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 928 | * this PCI device. |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 929 | */ |
Aaron Durbin | 0375815 | 2015-09-03 17:23:08 -0500 | [diff] [blame] | 930 | for (driver = &_pci_drivers[0]; driver != &_epci_drivers[0]; driver++) { |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 931 | if ((driver->vendor == dev->vendor) && |
Vadim Bendebury | 8049fc9 | 2012-04-24 12:53:19 -0700 | [diff] [blame] | 932 | device_id_match(driver, dev->device)) { |
Uwe Hermann | 312673c | 2009-10-27 21:49:33 +0000 | [diff] [blame] | 933 | dev->ops = (struct device_operations *)driver->ops; |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 934 | printk(BIOS_SPEW, "%s [%04x/%04x] %sops\n", |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 935 | dev_path(dev), driver->vendor, driver->device, |
| 936 | (driver->ops->scan_bus ? "bus " : "")); |
Eric Biederman | 5899fd8 | 2003-04-24 06:25:08 +0000 | [diff] [blame] | 937 | return; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 938 | } |
| 939 | } |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 940 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 941 | /* If I don't have a specific driver use the default operations. */ |
| 942 | switch (dev->hdr_type & 0x7f) { /* Header type */ |
| 943 | case PCI_HEADER_TYPE_NORMAL: |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 944 | if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) |
| 945 | goto bad; |
| 946 | dev->ops = &default_pci_ops_dev; |
| 947 | break; |
| 948 | case PCI_HEADER_TYPE_BRIDGE: |
| 949 | if ((dev->class >> 8) != PCI_CLASS_BRIDGE_PCI) |
| 950 | goto bad; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 951 | dev->ops = get_pci_bridge_ops(dev); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 952 | break; |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 953 | #if CONFIG(CARDBUS_PLUGIN_SUPPORT) |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 954 | case PCI_HEADER_TYPE_CARDBUS: |
| 955 | dev->ops = &default_cardbus_ops_bus; |
| 956 | break; |
| 957 | #endif |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 958 | default: |
| 959 | bad: |
Li-Ta Lo | 69c5a90 | 2004-04-29 20:08:54 +0000 | [diff] [blame] | 960 | if (dev->enabled) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 961 | printk(BIOS_ERR, "%s [%04x/%04x/%06x] has unknown " |
| 962 | "header type %02x, ignoring.\n", dev_path(dev), |
| 963 | dev->vendor, dev->device, |
| 964 | dev->class >> 8, dev->hdr_type); |
Eric Biederman | 83b991a | 2003-10-11 06:20:25 +0000 | [diff] [blame] | 965 | } |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 966 | } |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 967 | } |
| 968 | |
| 969 | /** |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 970 | * See if we have already allocated a device structure for a given devfn. |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 971 | * |
Kyösti Mälkki | 8712aa1 | 2019-01-09 11:31:25 +0200 | [diff] [blame] | 972 | * Given a PCI bus structure and a devfn number, find the device structure |
| 973 | * corresponding to the devfn, if present. Then move the device structure |
| 974 | * as the last child on the bus. |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 975 | * |
Kyösti Mälkki | 8712aa1 | 2019-01-09 11:31:25 +0200 | [diff] [blame] | 976 | * @param bus Pointer to the bus structure. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 977 | * @param devfn A device/function number. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 978 | * @return Pointer to the device structure found or NULL if we have not |
Li-Ta Lo | 3a81285 | 2004-12-03 22:39:34 +0000 | [diff] [blame] | 979 | * allocated a device for this devfn yet. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 980 | */ |
Kyösti Mälkki | 8712aa1 | 2019-01-09 11:31:25 +0200 | [diff] [blame] | 981 | static struct device *pci_scan_get_dev(struct bus *bus, unsigned int devfn) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 982 | { |
Kyösti Mälkki | 8712aa1 | 2019-01-09 11:31:25 +0200 | [diff] [blame] | 983 | struct device *dev, **prev; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 984 | |
Kyösti Mälkki | 8712aa1 | 2019-01-09 11:31:25 +0200 | [diff] [blame] | 985 | prev = &bus->children; |
| 986 | for (dev = bus->children; dev; dev = dev->sibling) { |
| 987 | if (dev->path.type == DEVICE_PATH_PCI) { |
| 988 | if (dev->path.pci.devfn == devfn) { |
| 989 | /* Unlink from the list. */ |
| 990 | *prev = dev->sibling; |
| 991 | dev->sibling = NULL; |
| 992 | break; |
| 993 | } |
| 994 | } else { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 995 | printk(BIOS_ERR, "child %s not a PCI device\n", |
Kyösti Mälkki | 8712aa1 | 2019-01-09 11:31:25 +0200 | [diff] [blame] | 996 | dev_path(dev)); |
Eric Biederman | ad1b35a | 2003-10-14 02:36:51 +0000 | [diff] [blame] | 997 | } |
Kyösti Mälkki | 8712aa1 | 2019-01-09 11:31:25 +0200 | [diff] [blame] | 998 | prev = &dev->sibling; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 999 | } |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1000 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1001 | /* |
| 1002 | * Just like alloc_dev() add the device to the list of devices on the |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1003 | * bus. When the list of devices was formed we removed all of the |
| 1004 | * parents children, and now we are interleaving static and dynamic |
| 1005 | * devices in order on the bus. |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 1006 | */ |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1007 | if (dev) { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1008 | struct device *child; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1009 | |
Kyösti Mälkki | 8712aa1 | 2019-01-09 11:31:25 +0200 | [diff] [blame] | 1010 | /* Find the last child on the bus. */ |
| 1011 | for (child = bus->children; child && child->sibling;) |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1012 | child = child->sibling; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1013 | |
Kyösti Mälkki | 8712aa1 | 2019-01-09 11:31:25 +0200 | [diff] [blame] | 1014 | /* Place the device as last on the bus. */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1015 | if (child) |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1016 | child->sibling = dev; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1017 | else |
Kyösti Mälkki | 8712aa1 | 2019-01-09 11:31:25 +0200 | [diff] [blame] | 1018 | bus->children = dev; |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1019 | } |
| 1020 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1021 | return dev; |
| 1022 | } |
| 1023 | |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1024 | /** |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 1025 | * Scan a PCI bus. |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 1026 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1027 | * Determine the existence of a given PCI device. Allocate a new struct device |
| 1028 | * if dev==NULL was passed in and the device exists in hardware. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1029 | * |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 1030 | * @param dev Pointer to the dev structure. |
| 1031 | * @param bus Pointer to the bus structure. |
| 1032 | * @param devfn A device/function number to look at. |
| 1033 | * @return The device structure for the device (if found), NULL otherwise. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1034 | */ |
Aaron Durbin | c30d913 | 2017-08-07 16:55:43 -0600 | [diff] [blame] | 1035 | struct device *pci_probe_dev(struct device *dev, struct bus *bus, |
| 1036 | unsigned int devfn) |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1037 | { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1038 | u32 id, class; |
| 1039 | u8 hdr_type; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1040 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1041 | /* Detect if a device is present. */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1042 | if (!dev) { |
| 1043 | struct device dummy; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1044 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1045 | dummy.bus = bus; |
| 1046 | dummy.path.type = DEVICE_PATH_PCI; |
Stefan Reinauer | 2b34db8 | 2009-02-28 20:10:20 +0000 | [diff] [blame] | 1047 | dummy.path.pci.devfn = devfn; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1048 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1049 | id = pci_read_config32(&dummy, PCI_VENDOR_ID); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1050 | /* |
| 1051 | * Have we found something? Some broken boards return 0 if a |
| 1052 | * slot is empty, but the expected answer is 0xffffffff. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1053 | */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1054 | if (id == 0xffffffff) |
Stefan Reinauer | 7355c75 | 2010-04-02 16:30:25 +0000 | [diff] [blame] | 1055 | return NULL; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1056 | |
Stefan Reinauer | 7355c75 | 2010-04-02 16:30:25 +0000 | [diff] [blame] | 1057 | if ((id == 0x00000000) || (id == 0x0000ffff) || |
| 1058 | (id == 0xffff0000)) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1059 | printk(BIOS_SPEW, "%s, bad id 0x%x\n", |
| 1060 | dev_path(&dummy), id); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1061 | return NULL; |
| 1062 | } |
| 1063 | dev = alloc_dev(bus, &dummy.path); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1064 | } else { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1065 | /* |
| 1066 | * Enable/disable the device. Once we have found the device- |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1067 | * specific operations this operations we will disable the |
| 1068 | * device with those as well. |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1069 | * |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1070 | * This is geared toward devices that have subfunctions |
| 1071 | * that do not show up by default. |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1072 | * |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1073 | * If a device is a stuff option on the motherboard |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1074 | * it may be absent and enable_dev() must cope. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1075 | */ |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1076 | /* Run the magic enable sequence for the device. */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1077 | if (dev->chip_ops && dev->chip_ops->enable_dev) |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1078 | dev->chip_ops->enable_dev(dev); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1079 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1080 | /* Now read the vendor and device ID. */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1081 | id = pci_read_config32(dev, PCI_VENDOR_ID); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1082 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1083 | /* |
| 1084 | * If the device does not have a PCI ID disable it. Possibly |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1085 | * this is because we have already disabled the device. But |
| 1086 | * this also handles optional devices that may not always |
| 1087 | * show up. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1088 | */ |
| 1089 | /* If the chain is fully enumerated quit */ |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1090 | if ((id == 0xffffffff) || (id == 0x00000000) || |
| 1091 | (id == 0x0000ffff) || (id == 0xffff0000)) { |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1092 | if (dev->enabled) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1093 | printk(BIOS_INFO, "PCI: Static device %s not " |
| 1094 | "found, disabling it.\n", dev_path(dev)); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1095 | dev->enabled = 0; |
| 1096 | } |
| 1097 | return dev; |
| 1098 | } |
| 1099 | } |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1100 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1101 | /* Read the rest of the PCI configuration information. */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1102 | hdr_type = pci_read_config8(dev, PCI_HEADER_TYPE); |
| 1103 | class = pci_read_config32(dev, PCI_CLASS_REVISION); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1104 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1105 | /* Store the interesting information in the device structure. */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1106 | dev->vendor = id & 0xffff; |
| 1107 | dev->device = (id >> 16) & 0xffff; |
| 1108 | dev->hdr_type = hdr_type; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1109 | |
| 1110 | /* Class code, the upper 3 bytes of PCI_CLASS_REVISION. */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1111 | dev->class = class >> 8; |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1112 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1113 | /* Architectural/System devices always need to be bus masters. */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1114 | if ((dev->class >> 16) == PCI_BASE_CLASS_SYSTEM) |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1115 | dev->command |= PCI_COMMAND_MASTER; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1116 | |
| 1117 | /* |
| 1118 | * Look at the vendor and device ID, or at least the header type and |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1119 | * class and figure out which set of configuration methods to use. |
| 1120 | * Unless we already have some PCI ops. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1121 | */ |
| 1122 | set_pci_ops(dev); |
| 1123 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1124 | /* Now run the magic enable/disable sequence for the device. */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1125 | if (dev->ops && dev->ops->enable) |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1126 | dev->ops->enable(dev); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1127 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1128 | /* Display the device. */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1129 | printk(BIOS_DEBUG, "%s [%04x/%04x] %s%s\n", dev_path(dev), |
| 1130 | dev->vendor, dev->device, dev->enabled ? "enabled" : "disabled", |
| 1131 | dev->ops ? "" : " No operations"); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1132 | |
| 1133 | return dev; |
| 1134 | } |
| 1135 | |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1136 | /** |
Kyösti Mälkki | c73acdb | 2013-06-15 17:16:56 +0300 | [diff] [blame] | 1137 | * Test for match between romstage and ramstage device instance. |
| 1138 | * |
| 1139 | * @param dev Pointer to the device structure. |
| 1140 | * @param sdev Simple device model identifier, created with PCI_DEV(). |
| 1141 | * @return Non-zero if bus:dev.fn of device matches. |
| 1142 | */ |
Aaron Durbin | c30d913 | 2017-08-07 16:55:43 -0600 | [diff] [blame] | 1143 | unsigned int pci_match_simple_dev(struct device *dev, pci_devfn_t sdev) |
Kyösti Mälkki | c73acdb | 2013-06-15 17:16:56 +0300 | [diff] [blame] | 1144 | { |
| 1145 | return dev->bus->secondary == PCI_DEV2SEGBUS(sdev) && |
| 1146 | dev->path.pci.devfn == PCI_DEV2DEVFN(sdev); |
| 1147 | } |
| 1148 | |
| 1149 | /** |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 1150 | * Scan a PCI bus. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1151 | * |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 1152 | * Determine the existence of devices and bridges on a PCI bus. If there are |
| 1153 | * bridges on the bus, recursively scan the buses behind the bridges. |
| 1154 | * |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 1155 | * @param bus Pointer to the bus structure. |
| 1156 | * @param min_devfn Minimum devfn to look at in the scan, usually 0x00. |
| 1157 | * @param max_devfn Maximum devfn to look at in the scan, usually 0xff. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1158 | */ |
Martin Roth | 38ddbfb | 2019-10-23 21:41:00 -0600 | [diff] [blame] | 1159 | void pci_scan_bus(struct bus *bus, unsigned int min_devfn, |
| 1160 | unsigned int max_devfn) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1161 | { |
| 1162 | unsigned int devfn; |
Kyösti Mälkki | 8712aa1 | 2019-01-09 11:31:25 +0200 | [diff] [blame] | 1163 | struct device *dev, **prev; |
| 1164 | int once = 0; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1165 | |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 1166 | printk(BIOS_DEBUG, "PCI: pci_scan_bus for bus %02x\n", bus->secondary); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1167 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1168 | /* Maximum sane devfn is 0xFF. */ |
Juhana Helovuo | 50b78b6 | 2010-09-13 14:43:02 +0000 | [diff] [blame] | 1169 | if (max_devfn > 0xff) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1170 | printk(BIOS_ERR, "PCI: pci_scan_bus limits devfn %x - " |
| 1171 | "devfn %x\n", min_devfn, max_devfn); |
| 1172 | printk(BIOS_ERR, "PCI: pci_scan_bus upper limit too big. " |
| 1173 | "Using 0xff.\n"); |
Juhana Helovuo | 50b78b6 | 2010-09-13 14:43:02 +0000 | [diff] [blame] | 1174 | max_devfn=0xff; |
| 1175 | } |
| 1176 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1177 | post_code(0x24); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1178 | |
| 1179 | /* |
| 1180 | * Probe all devices/functions on this bus with some optimization for |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1181 | * non-existence and single function devices. |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 1182 | */ |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1183 | for (devfn = min_devfn; devfn <= max_devfn; devfn++) { |
Ronald G. Minnich | 466ca2c | 2019-10-22 02:02:24 +0000 | [diff] [blame] | 1184 | if (CONFIG(MINIMAL_PCI_SCANNING)) { |
| 1185 | dev = pcidev_path_behind(bus, devfn); |
| 1186 | if (!dev || !dev->mandatory) |
| 1187 | continue; |
| 1188 | } |
| 1189 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1190 | /* First thing setup the device structure. */ |
Kyösti Mälkki | 8712aa1 | 2019-01-09 11:31:25 +0200 | [diff] [blame] | 1191 | dev = pci_scan_get_dev(bus, devfn); |
Li-Ta Lo | 9782f75 | 2004-05-05 21:15:42 +0000 | [diff] [blame] | 1192 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1193 | /* See if a device is present and setup the device structure. */ |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1194 | dev = pci_probe_dev(dev, bus, devfn); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 1195 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1196 | /* |
| 1197 | * If this is not a multi function device, or the device is |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1198 | * not present don't waste time probing another function. |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1199 | * Skip to next device. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1200 | */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1201 | if ((PCI_FUNC(devfn) == 0x00) && (!dev |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1202 | || (dev->enabled && ((dev->hdr_type & 0x80) != 0x80)))) { |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1203 | devfn += 0x07; |
| 1204 | } |
| 1205 | } |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1206 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1207 | post_code(0x25); |
| 1208 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1209 | /* |
| 1210 | * Warn if any leftover static devices are are found. |
| 1211 | * There's probably a problem in devicetree.cb. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1212 | */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1213 | |
Kyösti Mälkki | 8712aa1 | 2019-01-09 11:31:25 +0200 | [diff] [blame] | 1214 | prev = &bus->children; |
| 1215 | for (dev = bus->children; dev; dev = dev->sibling) { |
| 1216 | /* If we read valid vendor id, it is not leftover device. */ |
| 1217 | if (dev->vendor != 0) { |
| 1218 | prev = &dev->sibling; |
| 1219 | continue; |
| 1220 | } |
| 1221 | |
| 1222 | /* Unlink it from list. */ |
| 1223 | *prev = dev->sibling; |
| 1224 | |
| 1225 | if (!once++) |
| 1226 | printk(BIOS_WARNING, "PCI: Leftover static devices:\n"); |
| 1227 | printk(BIOS_WARNING, "%s\n", dev_path(dev)); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1228 | } |
| 1229 | |
Kyösti Mälkki | 8712aa1 | 2019-01-09 11:31:25 +0200 | [diff] [blame] | 1230 | if (once) |
| 1231 | printk(BIOS_WARNING, "PCI: Check your devicetree.cb.\n"); |
| 1232 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1233 | /* |
| 1234 | * For all children that implement scan_bus() (i.e. bridges) |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 1235 | * scan the bus behind that child. |
| 1236 | */ |
Kyösti Mälkki | de271a8 | 2015-03-18 13:09:47 +0200 | [diff] [blame] | 1237 | |
Kyösti Mälkki | 2d2367c | 2015-02-20 21:28:31 +0200 | [diff] [blame] | 1238 | scan_bridges(bus); |
Kyösti Mälkki | de271a8 | 2015-03-18 13:09:47 +0200 | [diff] [blame] | 1239 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1240 | /* |
| 1241 | * We've scanned the bus and so we know all about what's on the other |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1242 | * side of any bridges that may be on this bus plus any devices. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1243 | * Return how far we've got finding sub-buses. |
| 1244 | */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1245 | post_code(0x55); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1246 | } |
| 1247 | |
Kyösti Mälkki | 3345240 | 2015-02-23 06:58:26 +0200 | [diff] [blame] | 1248 | typedef enum { |
| 1249 | PCI_ROUTE_CLOSE, |
| 1250 | PCI_ROUTE_SCAN, |
| 1251 | PCI_ROUTE_FINAL, |
| 1252 | } scan_state; |
| 1253 | |
| 1254 | static void pci_bridge_route(struct bus *link, scan_state state) |
| 1255 | { |
| 1256 | struct device *dev = link->dev; |
| 1257 | struct bus *parent = dev->bus; |
| 1258 | u32 reg, buses = 0; |
| 1259 | |
Kyösti Mälkki | 757c8b4 | 2015-02-23 06:58:26 +0200 | [diff] [blame] | 1260 | if (state == PCI_ROUTE_SCAN) { |
| 1261 | link->secondary = parent->subordinate + 1; |
Jeremy Soller | cf2ac54 | 2019-10-09 21:40:36 -0600 | [diff] [blame] | 1262 | link->subordinate = link->secondary + dev->hotplug_buses; |
Kyösti Mälkki | 757c8b4 | 2015-02-23 06:58:26 +0200 | [diff] [blame] | 1263 | } |
| 1264 | |
Kyösti Mälkki | 3345240 | 2015-02-23 06:58:26 +0200 | [diff] [blame] | 1265 | if (state == PCI_ROUTE_CLOSE) { |
| 1266 | buses |= 0xfeff << 8; |
| 1267 | } else if (state == PCI_ROUTE_SCAN) { |
Timothy Pearson | 7d8a478 | 2015-10-24 20:34:57 -0500 | [diff] [blame] | 1268 | buses |= parent->secondary & 0xff; |
Kyösti Mälkki | 3345240 | 2015-02-23 06:58:26 +0200 | [diff] [blame] | 1269 | buses |= ((u32) link->secondary & 0xff) << 8; |
Kyösti Mälkki | 757c8b4 | 2015-02-23 06:58:26 +0200 | [diff] [blame] | 1270 | buses |= 0xff << 16; /* MAX PCI_BUS number here */ |
Kyösti Mälkki | 3345240 | 2015-02-23 06:58:26 +0200 | [diff] [blame] | 1271 | } else if (state == PCI_ROUTE_FINAL) { |
| 1272 | buses |= parent->secondary & 0xff; |
| 1273 | buses |= ((u32) link->secondary & 0xff) << 8; |
| 1274 | buses |= ((u32) link->subordinate & 0xff) << 16; |
| 1275 | } |
| 1276 | |
| 1277 | if (state == PCI_ROUTE_SCAN) { |
| 1278 | /* Clear all status bits and turn off memory, I/O and master enables. */ |
| 1279 | link->bridge_cmd = pci_read_config16(dev, PCI_COMMAND); |
| 1280 | pci_write_config16(dev, PCI_COMMAND, 0x0000); |
| 1281 | pci_write_config16(dev, PCI_STATUS, 0xffff); |
| 1282 | } |
| 1283 | |
| 1284 | /* |
| 1285 | * Configure the bus numbers for this bridge: the configuration |
| 1286 | * transactions will not be propagated by the bridge if it is not |
| 1287 | * correctly configured. |
| 1288 | */ |
| 1289 | |
| 1290 | reg = pci_read_config32(dev, PCI_PRIMARY_BUS); |
| 1291 | reg &= 0xff000000; |
| 1292 | reg |= buses; |
| 1293 | pci_write_config32(dev, PCI_PRIMARY_BUS, reg); |
| 1294 | |
| 1295 | if (state == PCI_ROUTE_FINAL) { |
| 1296 | pci_write_config16(dev, PCI_COMMAND, link->bridge_cmd); |
Kyösti Mälkki | 757c8b4 | 2015-02-23 06:58:26 +0200 | [diff] [blame] | 1297 | parent->subordinate = link->subordinate; |
Kyösti Mälkki | 3345240 | 2015-02-23 06:58:26 +0200 | [diff] [blame] | 1298 | } |
| 1299 | } |
| 1300 | |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 1301 | /** |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 1302 | * Scan a PCI bridge and the buses behind the bridge. |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 1303 | * |
| 1304 | * Determine the existence of buses behind the bridge. Set up the bridge |
| 1305 | * according to the result of the scan. |
| 1306 | * |
| 1307 | * This function is the default scan_bus() method for PCI bridge devices. |
| 1308 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1309 | * @param dev Pointer to the bridge device. |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 1310 | * @param do_scan_bus TODO |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1311 | */ |
Kyösti Mälkki | 580e722 | 2015-03-19 21:04:23 +0200 | [diff] [blame] | 1312 | void do_pci_scan_bridge(struct device *dev, |
Kyösti Mälkki | de271a8 | 2015-03-18 13:09:47 +0200 | [diff] [blame] | 1313 | void (*do_scan_bus) (struct bus * bus, |
Martin Roth | 38ddbfb | 2019-10-23 21:41:00 -0600 | [diff] [blame] | 1314 | unsigned int min_devfn, |
| 1315 | unsigned int max_devfn)) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1316 | { |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1317 | struct bus *bus; |
Eric Biederman | 83b991a | 2003-10-11 06:20:25 +0000 | [diff] [blame] | 1318 | |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 1319 | printk(BIOS_SPEW, "%s for %s\n", __func__, dev_path(dev)); |
Li-Ta Lo | 3a81285 | 2004-12-03 22:39:34 +0000 | [diff] [blame] | 1320 | |
Myles Watson | 894a347 | 2010-06-09 22:41:35 +0000 | [diff] [blame] | 1321 | if (dev->link_list == NULL) { |
| 1322 | struct bus *link; |
| 1323 | link = malloc(sizeof(*link)); |
| 1324 | if (link == NULL) |
| 1325 | die("Couldn't allocate a link!\n"); |
| 1326 | memset(link, 0, sizeof(*link)); |
| 1327 | link->dev = dev; |
| 1328 | dev->link_list = link; |
| 1329 | } |
| 1330 | |
| 1331 | bus = dev->link_list; |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1332 | |
Nico Huber | 061b905 | 2019-09-21 15:58:23 +0200 | [diff] [blame] | 1333 | pci_bridge_vga_compat(bus); |
| 1334 | |
Kyösti Mälkki | 3345240 | 2015-02-23 06:58:26 +0200 | [diff] [blame] | 1335 | pci_bridge_route(bus, PCI_ROUTE_SCAN); |
Li-Ta Lo | 3a81285 | 2004-12-03 22:39:34 +0000 | [diff] [blame] | 1336 | |
Kyösti Mälkki | de271a8 | 2015-03-18 13:09:47 +0200 | [diff] [blame] | 1337 | do_scan_bus(bus, 0x00, 0xff); |
Kyösti Mälkki | 3345240 | 2015-02-23 06:58:26 +0200 | [diff] [blame] | 1338 | |
| 1339 | pci_bridge_route(bus, PCI_ROUTE_FINAL); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1340 | } |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 1341 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1342 | /** |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 1343 | * Scan a PCI bridge and the buses behind the bridge. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1344 | * |
| 1345 | * Determine the existence of buses behind the bridge. Set up the bridge |
| 1346 | * according to the result of the scan. |
| 1347 | * |
| 1348 | * This function is the default scan_bus() method for PCI bridge devices. |
| 1349 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1350 | * @param dev Pointer to the bridge device. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1351 | */ |
Kyösti Mälkki | 580e722 | 2015-03-19 21:04:23 +0200 | [diff] [blame] | 1352 | void pci_scan_bridge(struct device *dev) |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1353 | { |
Kyösti Mälkki | 580e722 | 2015-03-19 21:04:23 +0200 | [diff] [blame] | 1354 | do_pci_scan_bridge(dev, pci_scan_bus); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1355 | } |
| 1356 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1357 | /** |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 1358 | * Scan a PCI domain. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1359 | * |
| 1360 | * This function is the default scan_bus() method for PCI domains. |
| 1361 | * |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 1362 | * @param dev Pointer to the domain. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1363 | */ |
Aaron Durbin | c30d913 | 2017-08-07 16:55:43 -0600 | [diff] [blame] | 1364 | void pci_domain_scan_bus(struct device *dev) |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1365 | { |
Kyösti Mälkki | 6f37017 | 2015-03-19 15:26:52 +0200 | [diff] [blame] | 1366 | struct bus *link = dev->link_list; |
Kyösti Mälkki | de271a8 | 2015-03-18 13:09:47 +0200 | [diff] [blame] | 1367 | pci_scan_bus(link, PCI_DEVFN(0, 0), 0xff); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1368 | } |
| 1369 | |
Mike Loptien | 0f5cf5e | 2014-05-12 21:46:31 -0600 | [diff] [blame] | 1370 | /** |
| 1371 | * Take an INT_PIN number (0, 1 - 4) and convert |
| 1372 | * it to a string ("NO PIN", "PIN A" - "PIN D") |
| 1373 | * |
| 1374 | * @param pin PCI Interrupt Pin number (0, 1 - 4) |
| 1375 | * @return A string corresponding to the pin number or "Invalid" |
| 1376 | */ |
| 1377 | const char *pin_to_str(int pin) |
| 1378 | { |
| 1379 | const char *str[5] = { |
| 1380 | "NO PIN", |
| 1381 | "PIN A", |
| 1382 | "PIN B", |
| 1383 | "PIN C", |
| 1384 | "PIN D", |
| 1385 | }; |
| 1386 | |
| 1387 | if (pin >= 0 && pin <= 4) |
| 1388 | return str[pin]; |
| 1389 | else |
| 1390 | return "Invalid PIN, not 0 - 4"; |
| 1391 | } |
| 1392 | |
| 1393 | /** |
| 1394 | * Get the PCI INT_PIN swizzle for a device defined as: |
| 1395 | * pin_parent = (pin_child + devn_child) % 4 + 1 |
| 1396 | * where PIN A = 1 ... PIN_D = 4 |
| 1397 | * |
| 1398 | * Given a PCI device structure 'dev', find the interrupt pin |
| 1399 | * that will be triggered on its parent bridge device when |
| 1400 | * generating an interrupt. For example: Device 1:3.2 may |
| 1401 | * use INT_PIN A but will trigger PIN D on its parent bridge |
| 1402 | * device. In this case, this function will return 4 (PIN D). |
| 1403 | * |
| 1404 | * @param dev A PCI device structure to swizzle interrupt pins for |
Martin Roth | 32bc6b6 | 2015-01-04 16:54:35 -0700 | [diff] [blame] | 1405 | * @param *parent_bridge The PCI device structure for the bridge |
Mike Loptien | 0f5cf5e | 2014-05-12 21:46:31 -0600 | [diff] [blame] | 1406 | * device 'dev' is attached to |
| 1407 | * @return The interrupt pin number (1 - 4) that 'dev' will |
| 1408 | * trigger when generating an interrupt |
| 1409 | */ |
Aaron Durbin | c30d913 | 2017-08-07 16:55:43 -0600 | [diff] [blame] | 1410 | static int swizzle_irq_pins(struct device *dev, struct device **parent_bridge) |
Mike Loptien | 0f5cf5e | 2014-05-12 21:46:31 -0600 | [diff] [blame] | 1411 | { |
Aaron Durbin | c30d913 | 2017-08-07 16:55:43 -0600 | [diff] [blame] | 1412 | struct device *parent; /* Our current device's parent device */ |
| 1413 | struct device *child; /* The child device of the parent */ |
Mike Loptien | 0f5cf5e | 2014-05-12 21:46:31 -0600 | [diff] [blame] | 1414 | uint8_t parent_bus = 0; /* Parent Bus number */ |
| 1415 | uint16_t parent_devfn = 0; /* Parent Device and Function number */ |
| 1416 | uint16_t child_devfn = 0; /* Child Device and Function number */ |
| 1417 | uint8_t swizzled_pin = 0; /* Pin swizzled across a bridge */ |
| 1418 | |
| 1419 | /* Start with PIN A = 0 ... D = 3 */ |
| 1420 | swizzled_pin = pci_read_config8(dev, PCI_INTERRUPT_PIN) - 1; |
| 1421 | |
| 1422 | /* While our current device has parent devices */ |
| 1423 | child = dev; |
| 1424 | for (parent = child->bus->dev; parent; parent = parent->bus->dev) { |
| 1425 | parent_bus = parent->bus->secondary; |
| 1426 | parent_devfn = parent->path.pci.devfn; |
| 1427 | child_devfn = child->path.pci.devfn; |
| 1428 | |
| 1429 | /* Swizzle the INT_PIN for any bridges not on root bus */ |
| 1430 | swizzled_pin = (PCI_SLOT(child_devfn) + swizzled_pin) % 4; |
| 1431 | printk(BIOS_SPEW, "\tWith INT_PIN swizzled to %s\n" |
| 1432 | "\tAttached to bridge device %01X:%02Xh.%02Xh\n", |
| 1433 | pin_to_str(swizzled_pin + 1), parent_bus, |
| 1434 | PCI_SLOT(parent_devfn), PCI_FUNC(parent_devfn)); |
| 1435 | |
| 1436 | /* Continue until we find the root bus */ |
| 1437 | if (parent_bus > 0) { |
| 1438 | /* |
| 1439 | * We will go on to the next parent so this parent |
| 1440 | * becomes the child |
| 1441 | */ |
| 1442 | child = parent; |
| 1443 | continue; |
| 1444 | } else { |
| 1445 | /* |
| 1446 | * Found the root bridge device, |
| 1447 | * fill in the structure and exit |
| 1448 | */ |
| 1449 | *parent_bridge = parent; |
| 1450 | break; |
| 1451 | } |
| 1452 | } |
| 1453 | |
| 1454 | /* End with PIN A = 1 ... D = 4 */ |
| 1455 | return swizzled_pin + 1; |
| 1456 | } |
| 1457 | |
| 1458 | /** |
| 1459 | * Given a device structure 'dev', find its interrupt pin |
| 1460 | * and its parent bridge 'parent_bdg' device structure. |
| 1461 | * If it is behind a bridge, it will return the interrupt |
| 1462 | * pin number (1 - 4) of the parent bridge that the device |
| 1463 | * interrupt pin has been swizzled to, otherwise it will |
| 1464 | * return the interrupt pin that is programmed into the |
| 1465 | * PCI config space of the target device. If 'dev' is |
| 1466 | * behind a bridge, it will fill in 'parent_bdg' with the |
| 1467 | * device structure of the bridge it is behind, otherwise |
| 1468 | * it will copy 'dev' into 'parent_bdg'. |
| 1469 | * |
| 1470 | * @param dev A PCI device structure to get interrupt pins for. |
| 1471 | * @param *parent_bdg The PCI device structure for the bridge |
| 1472 | * device 'dev' is attached to. |
| 1473 | * @return The interrupt pin number (1 - 4) that 'dev' will |
| 1474 | * trigger when generating an interrupt. |
| 1475 | * Errors: -1 is returned if the device is not enabled |
| 1476 | * -2 is returned if a parent bridge could not be found. |
| 1477 | */ |
Aaron Durbin | c30d913 | 2017-08-07 16:55:43 -0600 | [diff] [blame] | 1478 | int get_pci_irq_pins(struct device *dev, struct device **parent_bdg) |
Mike Loptien | 0f5cf5e | 2014-05-12 21:46:31 -0600 | [diff] [blame] | 1479 | { |
| 1480 | uint8_t bus = 0; /* The bus this device is on */ |
| 1481 | uint16_t devfn = 0; /* This device's device and function numbers */ |
| 1482 | uint8_t int_pin = 0; /* Interrupt pin used by the device */ |
| 1483 | uint8_t target_pin = 0; /* Interrupt pin we want to assign an IRQ to */ |
| 1484 | |
| 1485 | /* Make sure this device is enabled */ |
| 1486 | if (!(dev->enabled && (dev->path.type == DEVICE_PATH_PCI))) |
| 1487 | return -1; |
| 1488 | |
| 1489 | bus = dev->bus->secondary; |
| 1490 | devfn = dev->path.pci.devfn; |
| 1491 | |
| 1492 | /* Get and validate the interrupt pin used. Only 1-4 are allowed */ |
| 1493 | int_pin = pci_read_config8(dev, PCI_INTERRUPT_PIN); |
| 1494 | if (int_pin < 1 || int_pin > 4) |
| 1495 | return -1; |
| 1496 | |
| 1497 | printk(BIOS_SPEW, "PCI IRQ: Found device %01X:%02X.%02X using %s\n", |
| 1498 | bus, PCI_SLOT(devfn), PCI_FUNC(devfn), pin_to_str(int_pin)); |
| 1499 | |
| 1500 | /* If this device is on a bridge, swizzle its INT_PIN */ |
| 1501 | if (bus) { |
| 1502 | /* Swizzle its INT_PINs */ |
| 1503 | target_pin = swizzle_irq_pins(dev, parent_bdg); |
| 1504 | |
| 1505 | /* Make sure the swizzle returned valid structures */ |
| 1506 | if (parent_bdg == NULL) { |
| 1507 | printk(BIOS_WARNING, |
| 1508 | "Warning: Could not find parent bridge for this device!\n"); |
| 1509 | return -2; |
| 1510 | } |
| 1511 | } else { /* Device is not behind a bridge */ |
| 1512 | target_pin = int_pin; /* Return its own interrupt pin */ |
| 1513 | *parent_bdg = dev; /* Return its own structure */ |
| 1514 | } |
| 1515 | |
| 1516 | /* Target pin is the interrupt pin we want to assign an IRQ to */ |
| 1517 | return target_pin; |
| 1518 | } |
| 1519 | |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 1520 | #if CONFIG(PC80_SYSTEM) |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1521 | /** |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 1522 | * Assign IRQ numbers. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1523 | * |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1524 | * This function assigns IRQs for all functions contained within the indicated |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1525 | * device address. If the device does not exist or does not require interrupts |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1526 | * then this function has no effect. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1527 | * |
| 1528 | * This function should be called for each PCI slot in your system. |
| 1529 | * |
Kyösti Mälkki | c19d6a6 | 2019-07-04 21:39:28 +0300 | [diff] [blame] | 1530 | * @param dev Pointer to dev structure. |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 1531 | * @param pIntAtoD An array of IRQ #s that are assigned to PINTA through PINTD |
| 1532 | * of this slot. The particular IRQ #s that are passed in depend on the |
| 1533 | * routing inside your southbridge and on your board. |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1534 | */ |
Kyösti Mälkki | c19d6a6 | 2019-07-04 21:39:28 +0300 | [diff] [blame] | 1535 | void pci_assign_irqs(struct device *dev, const unsigned char pIntAtoD[4]) |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1536 | { |
Kyösti Mälkki | c19d6a6 | 2019-07-04 21:39:28 +0300 | [diff] [blame] | 1537 | u8 slot, line, irq; |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1538 | |
Kyösti Mälkki | c19d6a6 | 2019-07-04 21:39:28 +0300 | [diff] [blame] | 1539 | /* Each device may contain up to eight functions. */ |
| 1540 | slot = dev->path.pci.devfn >> 3; |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1541 | |
Kyösti Mälkki | c19d6a6 | 2019-07-04 21:39:28 +0300 | [diff] [blame] | 1542 | for (; dev ; dev = dev->sibling) { |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1543 | |
Kyösti Mälkki | c19d6a6 | 2019-07-04 21:39:28 +0300 | [diff] [blame] | 1544 | if (dev->path.pci.devfn >> 3 != slot) |
| 1545 | break; |
| 1546 | |
| 1547 | line = pci_read_config8(dev, PCI_INTERRUPT_PIN); |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1548 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1549 | /* PCI spec says all values except 1..4 are reserved. */ |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1550 | if ((line < 1) || (line > 4)) |
| 1551 | continue; |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1552 | |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1553 | irq = pIntAtoD[line - 1]; |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1554 | |
Kyösti Mälkki | c19d6a6 | 2019-07-04 21:39:28 +0300 | [diff] [blame] | 1555 | printk(BIOS_DEBUG, "Assigning IRQ %d to %s\n", irq, dev_path(dev)); |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1556 | |
Kyösti Mälkki | c19d6a6 | 2019-07-04 21:39:28 +0300 | [diff] [blame] | 1557 | pci_write_config8(dev, PCI_INTERRUPT_LINE, pIntAtoD[line - 1]); |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1558 | |
| 1559 | #ifdef PARANOID_IRQ_ASSIGNMENTS |
Myles Watson | 17aeeca | 2009-10-07 18:41:08 +0000 | [diff] [blame] | 1560 | irq = pci_read_config8(pdev, PCI_INTERRUPT_LINE); |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 1561 | printk(BIOS_DEBUG, " Readback = %d\n", irq); |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1562 | #endif |
| 1563 | |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 1564 | #if CONFIG(PC80_SYSTEM) |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1565 | /* Change to level triggered. */ |
| 1566 | i8259_configure_irq_trigger(pIntAtoD[line - 1], |
| 1567 | IRQ_LEVEL_TRIGGERED); |
Stefan Reinauer | 5fb6216 | 2010-12-16 23:52:04 +0000 | [diff] [blame] | 1568 | #endif |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1569 | } |
| 1570 | } |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1571 | #endif |