Arthur Heymans | 4c7979a | 2019-06-17 14:30:10 +0200 | [diff] [blame] | 1 | config SOC_INTEL_COMMON_SKYLAKE_BASE |
| 2 | bool |
| 3 | |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 4 | config SOC_INTEL_SKYLAKE |
| 5 | bool |
Arthur Heymans | 4c7979a | 2019-06-17 14:30:10 +0200 | [diff] [blame] | 6 | select SOC_INTEL_COMMON_SKYLAKE_BASE |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 7 | help |
| 8 | Intel Skylake support |
| 9 | |
Rizwan Qureshi | 0700dca | 2017-02-09 15:57:45 +0530 | [diff] [blame] | 10 | config SOC_INTEL_KABYLAKE |
| 11 | bool |
Arthur Heymans | 4c7979a | 2019-06-17 14:30:10 +0200 | [diff] [blame] | 12 | select SOC_INTEL_COMMON_SKYLAKE_BASE |
| 13 | select MAINBOARD_USES_FSP2_0 |
Rizwan Qureshi | 0700dca | 2017-02-09 15:57:45 +0530 | [diff] [blame] | 14 | help |
| 15 | Intel Kabylake support |
| 16 | |
Arthur Heymans | 4c7979a | 2019-06-17 14:30:10 +0200 | [diff] [blame] | 17 | if SOC_INTEL_COMMON_SKYLAKE_BASE |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 18 | |
| 19 | config CPU_SPECIFIC_OPTIONS |
| 20 | def_bool y |
Aaron Durbin | e0a4914 | 2016-07-13 23:20:51 -0500 | [diff] [blame] | 21 | select ACPI_INTEL_HARDWARE_SLEEP_VALUES |
Vadim Bendebury | 5542bb6 | 2018-02-05 19:59:09 -0800 | [diff] [blame] | 22 | select ACPI_NHLT |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 23 | select ARCH_BOOTBLOCK_X86_32 |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 24 | select ARCH_RAMSTAGE_X86_32 |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 25 | select ARCH_ROMSTAGE_X86_32 |
| 26 | select ARCH_VERSTAGE_X86_32 |
Aaron Durbin | e4cc8cd | 2016-08-11 23:55:39 -0500 | [diff] [blame] | 27 | select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH |
Aaron Durbin | e8e118d | 2016-08-12 15:00:10 -0500 | [diff] [blame] | 28 | select BOOT_DEVICE_SUPPORTS_WRITES |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 29 | select CACHE_MRC_SETTINGS |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 30 | select COLLECT_TIMESTAMPS |
Duncan Laurie | 135c2c4 | 2016-10-17 19:47:51 -0700 | [diff] [blame] | 31 | select COMMON_FADT |
Nico Huber | 6275e34 | 2018-11-21 00:11:35 +0100 | [diff] [blame] | 32 | select CPU_INTEL_COMMON |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 33 | select CPU_INTEL_FIRMWARE_INTERFACE_TABLE |
Michael Niewöhner | 7bdedcd | 2019-09-01 16:49:09 +0200 | [diff] [blame^] | 34 | select CPU_INTEL_COMMON_HYPERTHREADING |
Vadim Bendebury | 5542bb6 | 2018-02-05 19:59:09 -0800 | [diff] [blame] | 35 | select C_ENVIRONMENT_BOOTBLOCK |
Matt DeVillier | 9e94607 | 2019-01-26 18:42:35 -0600 | [diff] [blame] | 36 | select FSP_M_XIP if MAINBOARD_USES_FSP2_0 |
| 37 | select FSP_T_XIP if FSP_CAR |
Aaron Durbin | ffdf901 | 2015-07-24 13:00:36 -0500 | [diff] [blame] | 38 | select GENERIC_GPIO_LIB |
Vadim Bendebury | 5542bb6 | 2018-02-05 19:59:09 -0800 | [diff] [blame] | 39 | select HAVE_FSP_GOP |
Stefan Tauner | ef8b957 | 2018-09-06 00:34:28 +0200 | [diff] [blame] | 40 | select INTEL_DESCRIPTOR_MODE_CAPABLE |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 41 | select HAVE_SMI_HANDLER |
Nico Huber | 2f1ef98 | 2018-11-07 16:24:50 +0100 | [diff] [blame] | 42 | select INTEL_CAR_NEM_ENHANCED |
Patrick Rudolph | c7edf18 | 2017-09-26 19:34:35 +0200 | [diff] [blame] | 43 | select INTEL_GMA_ACPI |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 44 | select IOAPIC |
Duncan Laurie | 205ed2d | 2016-06-02 15:23:42 -0700 | [diff] [blame] | 45 | select MRC_SETTINGS_PROTECT |
Vadim Bendebury | 5542bb6 | 2018-02-05 19:59:09 -0800 | [diff] [blame] | 46 | select NO_FIXED_XIP_ROM_SIZE |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 47 | select PARALLEL_MP |
Furquan Shaikh | a585358 | 2017-05-06 12:40:15 -0700 | [diff] [blame] | 48 | select PARALLEL_MP_AP_WORK |
Subrata Banik | 93ebe49 | 2017-03-14 18:24:47 +0530 | [diff] [blame] | 49 | select PCIEX_LENGTH_64MB |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 50 | select REG_SCRIPT |
Subrata Banik | 46a7178 | 2017-06-02 18:52:24 +0530 | [diff] [blame] | 51 | select SA_ENABLE_DPR |
Vadim Bendebury | 5542bb6 | 2018-02-05 19:59:09 -0800 | [diff] [blame] | 52 | select SMP |
Julien Viard de Galbert | 2912e8e | 2018-08-14 16:15:26 +0200 | [diff] [blame] | 53 | select PMC_GLOBAL_RESET_ENABLE_LOCK |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 54 | select SOC_INTEL_COMMON |
Duncan Laurie | a1c8b34d | 2015-09-08 16:12:44 -0700 | [diff] [blame] | 55 | select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE |
Subrata Banik | e074d62 | 2017-02-16 16:16:37 +0530 | [diff] [blame] | 56 | select SOC_INTEL_COMMON_BLOCK |
Nico Huber | 2f1ef98 | 2018-11-07 16:24:50 +0100 | [diff] [blame] | 57 | select SOC_INTEL_COMMON_BLOCK_CAR |
Subrata Banik | c4986eb | 2018-05-09 14:55:09 +0530 | [diff] [blame] | 58 | select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG |
Barnali Sarkar | 0a203d1 | 2017-05-04 18:02:17 +0530 | [diff] [blame] | 59 | select SOC_INTEL_COMMON_BLOCK_CPU |
Barnali Sarkar | 7327386 | 2017-06-13 20:22:33 +0530 | [diff] [blame] | 60 | select SOC_INTEL_COMMON_BLOCK_CPU_MPINIT |
Furquan Shaikh | 2c36889 | 2018-10-18 16:22:37 -0700 | [diff] [blame] | 61 | select SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT |
Hannah Williams | 1760cd3 | 2017-04-06 20:54:11 -0700 | [diff] [blame] | 62 | select SOC_INTEL_COMMON_BLOCK_GPIO_LEGACY_MACROS |
Vadim Bendebury | 5542bb6 | 2018-02-05 19:59:09 -0800 | [diff] [blame] | 63 | select SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL |
Furquan Shaikh | 05a6f29 | 2017-03-31 14:02:47 -0700 | [diff] [blame] | 64 | select SOC_INTEL_COMMON_BLOCK_GSPI |
Furquan Shaikh | 31bff01 | 2018-09-29 23:31:04 -0700 | [diff] [blame] | 65 | select SOC_INTEL_COMMON_BLOCK_HDA |
Subrata Banik | 93ebe49 | 2017-03-14 18:24:47 +0530 | [diff] [blame] | 66 | select SOC_INTEL_COMMON_BLOCK_SA |
Pratik Prajapati | a04aa3d | 2017-06-12 23:02:36 -0700 | [diff] [blame] | 67 | select SOC_INTEL_COMMON_BLOCK_SGX |
Subrata Banik | ece173c | 2017-12-14 18:18:34 +0530 | [diff] [blame] | 68 | select SOC_INTEL_COMMON_BLOCK_SMM |
| 69 | select SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP |
Subrata Banik | afa07f7 | 2018-05-24 12:21:06 +0530 | [diff] [blame] | 70 | select SOC_INTEL_COMMON_BLOCK_UART |
Karthikeyan Ramasubramanian | cc7cdb1 | 2019-03-20 11:38:01 -0600 | [diff] [blame] | 71 | select SOC_INTEL_COMMON_BLOCK_XHCI_ELOG |
Subrata Banik | f513ceb | 2018-05-17 15:57:43 +0530 | [diff] [blame] | 72 | select SOC_INTEL_COMMON_PCH_BASE |
Aaron Durbin | c14a1a9 | 2016-06-28 15:41:07 -0500 | [diff] [blame] | 73 | select SOC_INTEL_COMMON_NHLT |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 74 | select SOC_INTEL_COMMON_RESET |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 75 | select SSE2 |
| 76 | select SUPPORT_CPU_UCODE_IN_CBFS |
| 77 | select TSC_CONSTANT_RATE |
Aamir Bohra | 842776e | 2017-05-25 14:12:01 +0530 | [diff] [blame] | 78 | select TSC_MONOTONIC_TIMER |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 79 | select TSC_SYNC_MFENCE |
| 80 | select UDELAY_TSC |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 81 | |
Patrick Rudolph | 203061c | 2019-09-02 09:35:21 +0200 | [diff] [blame] | 82 | config FSP_HYPERTHREADING |
| 83 | bool "Enable Hyper-Threading" |
| 84 | depends on MAINBOARD_USES_FSP2_0 |
| 85 | default y |
| 86 | |
Arthur Heymans | 27d3f71 | 2018-01-05 17:51:46 +0100 | [diff] [blame] | 87 | config CPU_INTEL_NUM_FIT_ENTRIES |
| 88 | int |
| 89 | default 10 |
| 90 | |
Naresh G Solanki | fe517f6 | 2016-10-17 17:21:08 +0530 | [diff] [blame] | 91 | config MAINBOARD_USES_FSP2_0 |
| 92 | bool |
| 93 | default n |
Naresh G Solanki | a2d4062 | 2016-08-30 20:47:13 +0530 | [diff] [blame] | 94 | |
| 95 | config USE_FSP2_0_DRIVER |
Nico Huber | 956cfa3 | 2017-06-28 12:20:48 +0200 | [diff] [blame] | 96 | def_bool y |
Naresh G Solanki | fe517f6 | 2016-10-17 17:21:08 +0530 | [diff] [blame] | 97 | depends on MAINBOARD_USES_FSP2_0 |
Naresh G Solanki | a2d4062 | 2016-08-30 20:47:13 +0530 | [diff] [blame] | 98 | select PLATFORM_USES_FSP2_0 |
Subrata Banik | 7455881 | 2018-01-25 11:41:04 +0530 | [diff] [blame] | 99 | select UDK_2015_BINDING |
Nico Huber | 29cc331 | 2018-06-06 17:40:02 +0200 | [diff] [blame] | 100 | select INTEL_GMA_ADD_VBT if RUN_FSP_GOP |
Naresh G Solanki | a2d4062 | 2016-08-30 20:47:13 +0530 | [diff] [blame] | 101 | |
| 102 | config USE_FSP1_1_DRIVER |
Nico Huber | 956cfa3 | 2017-06-28 12:20:48 +0200 | [diff] [blame] | 103 | def_bool y |
Naresh G Solanki | fe517f6 | 2016-10-17 17:21:08 +0530 | [diff] [blame] | 104 | depends on !MAINBOARD_USES_FSP2_0 |
Naresh G Solanki | a2d4062 | 2016-08-30 20:47:13 +0530 | [diff] [blame] | 105 | select PLATFORM_USES_FSP1_1 |
Naresh G Solanki | a2d4062 | 2016-08-30 20:47:13 +0530 | [diff] [blame] | 106 | select DISPLAY_FSP_ENTRY_POINTS |
Nico Huber | 2f1ef98 | 2018-11-07 16:24:50 +0100 | [diff] [blame] | 107 | select SKIP_FSP_CAR |
Naresh G Solanki | a2d4062 | 2016-08-30 20:47:13 +0530 | [diff] [blame] | 108 | |
Furquan Shaikh | 610a33a | 2016-07-22 16:17:53 -0700 | [diff] [blame] | 109 | config CHROMEOS |
| 110 | select CHROMEOS_RAMOOPS_DYNAMIC |
Julius Werner | 58c3938 | 2017-02-13 17:53:29 -0800 | [diff] [blame] | 111 | |
| 112 | config VBOOT |
Julius Werner | 58c3938 | 2017-02-13 17:53:29 -0800 | [diff] [blame] | 113 | select VBOOT_SEPARATE_VERSTAGE |
Joel Kitching | 6672bd8 | 2019-04-10 16:06:21 +0800 | [diff] [blame] | 114 | select VBOOT_MUST_REQUEST_DISPLAY |
Furquan Shaikh | b8257df | 2016-07-22 09:20:56 -0700 | [diff] [blame] | 115 | select VBOOT_SAVE_RECOVERY_REASON_ON_REBOOT |
Aaron Durbin | a6914d2 | 2016-08-24 08:49:29 -0500 | [diff] [blame] | 116 | select VBOOT_STARTS_IN_BOOTBLOCK |
Furquan Shaikh | 2a12e2e | 2016-07-25 11:48:03 -0700 | [diff] [blame] | 117 | select VBOOT_VBNV_CMOS |
| 118 | select VBOOT_VBNV_CMOS_BACKUP_TO_FLASH |
Furquan Shaikh | 610a33a | 2016-07-22 16:17:53 -0700 | [diff] [blame] | 119 | |
Martin Roth | 59ff340 | 2016-02-09 09:06:46 -0700 | [diff] [blame] | 120 | config CBFS_SIZE |
| 121 | hex |
| 122 | default 0x200000 |
| 123 | |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 124 | config DCACHE_RAM_BASE |
Arthur Heymans | 432ac61 | 2017-06-13 14:17:05 +0200 | [diff] [blame] | 125 | hex |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 126 | default 0xfef00000 |
| 127 | |
| 128 | config DCACHE_RAM_SIZE |
Arthur Heymans | 432ac61 | 2017-06-13 14:17:05 +0200 | [diff] [blame] | 129 | hex |
Rizwan Qureshi | 3ad6356 | 2016-08-14 15:48:33 +0530 | [diff] [blame] | 130 | default 0x40000 |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 131 | help |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 132 | The size of the cache-as-ram region required during bootblock |
| 133 | and/or romstage. |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 134 | |
Subrata Banik | 68d5d8b | 2016-07-18 14:13:52 +0530 | [diff] [blame] | 135 | config DCACHE_BSP_STACK_SIZE |
| 136 | hex |
| 137 | default 0x4000 |
| 138 | help |
| 139 | The amount of anticipated stack usage in CAR by bootblock and |
| 140 | other stages. |
| 141 | |
| 142 | config C_ENV_BOOTBLOCK_SIZE |
| 143 | hex |
Furquan Shaikh | 7038596 | 2016-08-24 10:28:30 -0700 | [diff] [blame] | 144 | default 0xC000 |
Subrata Banik | 68d5d8b | 2016-07-18 14:13:52 +0530 | [diff] [blame] | 145 | |
Subrata Banik | 086730b | 2015-12-02 11:42:04 +0530 | [diff] [blame] | 146 | config EXCLUDE_NATIVE_SD_INTERFACE |
| 147 | bool |
| 148 | default n |
| 149 | help |
| 150 | If you set this option to n, will not use native SD controller. |
| 151 | |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 152 | config HEAP_SIZE |
| 153 | hex |
| 154 | default 0x80000 |
| 155 | |
| 156 | config IED_REGION_SIZE |
| 157 | hex |
| 158 | default 0x400000 |
| 159 | |
Subrata Banik | e7ceae7 | 2017-03-08 17:59:40 +0530 | [diff] [blame] | 160 | config PCR_BASE_ADDRESS |
| 161 | hex |
| 162 | default 0xfd000000 |
| 163 | help |
| 164 | This option allows you to select MMIO Base Address of sideband bus. |
| 165 | |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 166 | config SMM_RESERVED_SIZE |
| 167 | hex |
| 168 | default 0x200000 |
| 169 | |
| 170 | config SMM_TSEG_SIZE |
| 171 | hex |
| 172 | default 0x800000 |
| 173 | |
Lee Leahy | 1d14b3e | 2015-05-12 18:23:27 -0700 | [diff] [blame] | 174 | config VGA_BIOS_ID |
| 175 | string |
| 176 | default "8086,0406" |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 177 | |
Teo Boon Tiong | 2fc06c8 | 2016-09-15 11:11:45 +0800 | [diff] [blame] | 178 | config SKYLAKE_SOC_PCH_H |
| 179 | bool |
| 180 | default n |
| 181 | help |
| 182 | Choose this option if you have a PCH-H chipset. |
| 183 | |
Aaron Durbin | ed8a723 | 2015-11-24 12:35:06 -0600 | [diff] [blame] | 184 | config NHLT_DMIC_2CH |
| 185 | bool |
| 186 | default n |
| 187 | help |
| 188 | Include DSP firmware settings for 2 channel DMIC array. |
| 189 | |
| 190 | config NHLT_DMIC_4CH |
| 191 | bool |
| 192 | default n |
| 193 | help |
| 194 | Include DSP firmware settings for 4 channel DMIC array. |
| 195 | |
| 196 | config NHLT_NAU88L25 |
| 197 | bool |
| 198 | default n |
| 199 | help |
| 200 | Include DSP firmware settings for nau88l25 headset codec. |
| 201 | |
| 202 | config NHLT_MAX98357 |
| 203 | bool |
| 204 | default n |
| 205 | help |
| 206 | Include DSP firmware settings for max98357 amplifier. |
| 207 | |
Duncan Laurie | e6c8a38 | 2018-03-26 02:45:02 -0700 | [diff] [blame] | 208 | config NHLT_MAX98373 |
| 209 | bool |
| 210 | default n |
| 211 | help |
| 212 | Include DSP firmware settings for max98373 amplifier. |
| 213 | |
Aaron Durbin | ed8a723 | 2015-11-24 12:35:06 -0600 | [diff] [blame] | 214 | config NHLT_SSM4567 |
| 215 | bool |
| 216 | default n |
| 217 | help |
| 218 | Include DSP firmware settings for ssm4567 smart amplifier. |
| 219 | |
Duncan Laurie | 4a75a66 | 2017-03-02 10:13:51 -0800 | [diff] [blame] | 220 | config NHLT_RT5514 |
| 221 | bool |
| 222 | default n |
| 223 | help |
| 224 | Include DSP firmware settings for rt5514 DSP. |
| 225 | |
Rizwan Qureshi | 17335fa | 2017-01-14 06:08:21 +0530 | [diff] [blame] | 226 | config NHLT_RT5663 |
| 227 | bool |
| 228 | default n |
| 229 | help |
| 230 | Include DSP firmware settings for rt5663 headset codec. |
| 231 | |
| 232 | config NHLT_MAX98927 |
| 233 | bool |
| 234 | default n |
| 235 | help |
| 236 | Include DSP firmware settings for max98927 amplifier. |
| 237 | |
Naveen Manohar | 83670c5 | 2017-11-04 02:55:09 +0530 | [diff] [blame] | 238 | config NHLT_DA7219 |
| 239 | bool |
| 240 | default n |
| 241 | help |
| 242 | Include DSP firmware settings for DA7219 headset codec. |
| 243 | |
Patrick Georgi | 6539e10 | 2018-09-13 11:48:43 -0400 | [diff] [blame] | 244 | config FSP_HEADER_PATH |
Patrick Georgi | c6382cd | 2018-10-26 22:03:17 +0200 | [diff] [blame] | 245 | string "Location of FSP headers" |
Patrick Georgi | 6539e10 | 2018-09-13 11:48:43 -0400 | [diff] [blame] | 246 | depends on MAINBOARD_USES_FSP2_0 |
| 247 | # Use KabylakeFsp for both Skylake and Kabylake as it supports both. |
| 248 | # SkylakeFsp is FSP 1.1 and therefore incompatible. |
| 249 | default "3rdparty/fsp/KabylakeFspBinPkg/Include/" if SOC_INTEL_SKYLAKE |
| 250 | default "3rdparty/fsp/KabylakeFspBinPkg/Include/" if SOC_INTEL_KABYLAKE |
| 251 | |
| 252 | config FSP_FD_PATH |
| 253 | string |
| 254 | depends on FSP_USE_REPO |
| 255 | default "3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd" if SOC_INTEL_SKYLAKE |
| 256 | default "3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd" if SOC_INTEL_KABYLAKE |
| 257 | |
Aaron Durbin | e56191e | 2016-08-11 09:50:49 -0500 | [diff] [blame] | 258 | config SPI_FLASH_INCLUDE_ALL_DRIVERS |
| 259 | bool |
| 260 | default n |
| 261 | |
Rizwan Qureshi | d8bb69a | 2016-11-08 21:01:09 +0530 | [diff] [blame] | 262 | config MAX_ROOT_PORTS |
| 263 | int |
| 264 | default 24 if PLATFORM_USES_FSP2_0 |
| 265 | default 20 if PLATFORM_USES_FSP1_1 |
| 266 | |
Jenny TC | 2864f85 | 2017-02-09 16:01:59 +0530 | [diff] [blame] | 267 | config NO_FADT_8042 |
| 268 | bool |
| 269 | default n |
| 270 | help |
| 271 | Choose this option if you want to disable 8042 Keyboard |
| 272 | |
Aaron Durbin | 551e4be | 2018-04-10 09:24:54 -0600 | [diff] [blame] | 273 | config SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ |
Furquan Shaikh | 340908a | 2017-04-04 11:47:19 -0700 | [diff] [blame] | 274 | int |
| 275 | default 120 |
| 276 | |
Chris Ching | b8dc63b | 2017-12-06 14:26:15 -0700 | [diff] [blame] | 277 | config DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ |
| 278 | int |
Aaron Durbin | 551e4be | 2018-04-10 09:24:54 -0600 | [diff] [blame] | 279 | default SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ |
Chris Ching | b8dc63b | 2017-12-06 14:26:15 -0700 | [diff] [blame] | 280 | |
Furquan Shaikh | 05a6f29 | 2017-03-31 14:02:47 -0700 | [diff] [blame] | 281 | config SOC_INTEL_COMMON_BLOCK_GSPI_MAX |
| 282 | int |
| 283 | default 2 |
| 284 | |
Subrata Banik | c4986eb | 2018-05-09 14:55:09 +0530 | [diff] [blame] | 285 | config SOC_INTEL_I2C_DEV_MAX |
| 286 | int |
| 287 | default 6 |
| 288 | |
Aamir Bohra | 1041d39 | 2017-06-02 11:56:14 +0530 | [diff] [blame] | 289 | config CPU_BCLK_MHZ |
| 290 | int |
| 291 | default 100 |
| 292 | |
Nico Huber | 9995418 | 2019-05-29 23:33:06 +0200 | [diff] [blame] | 293 | config CONSOLE_UART_BASE_ADDRESS |
| 294 | hex |
| 295 | default 0xfe030000 |
| 296 | depends on INTEL_LPSS_UART_FOR_CONSOLE |
| 297 | |
Furquan Shaikh | 3406dd6 | 2017-08-04 15:58:26 -0700 | [diff] [blame] | 298 | # Clock divider parameters for 115200 baud rate |
| 299 | config SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL |
| 300 | hex |
| 301 | default 0x30 |
| 302 | |
| 303 | config SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL |
| 304 | hex |
| 305 | default 0xc35 |
| 306 | |
Furquan Shaikh | a3ad990 | 2018-03-21 10:45:08 -0700 | [diff] [blame] | 307 | config IFD_CHIPSET |
| 308 | string |
| 309 | default "sklkbl" |
| 310 | |
Patrick Rudolph | 5fffb5e | 2019-07-25 11:55:30 +0200 | [diff] [blame] | 311 | config INTEL_TXT_BIOSACM_ALIGNMENT |
| 312 | hex |
| 313 | default 0x40000 # 256KB |
| 314 | |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 315 | endif |