commit | cc7cdb19b10fa9b51acf8bc0fa94d202ffa214f3 | [log] [tgz] |
---|---|---|
author | Karthikeyan Ramasubramanian <kramasub@chromium.org> | Wed Mar 20 11:38:01 2019 -0600 |
committer | Patrick Georgi <pgeorgi@google.com> | Thu Mar 28 06:39:38 2019 +0000 |
tree | 37efa9429117e94b7a27b25117a4f7bb084cd034 | |
parent | e2ac5b7a36cd0583a6b62dac4f8dae5529f44b74 [diff] |
soc/intel/common: Move support to log XHCI wake events The policy to identify and log the XHCI wake events is similar between skylake and apollolake. Hence move the similar parts to a common location. BUG=b:123429132 BRANCH=None TEST=Ensure that the system boots to ChromeOS. Ensure that the wake up events due to USB are logged into the event logs. 6 | 2019-03-21 09:22:18 | S0ix Enter 7 | 2019-03-21 09:22:22 | S0ix Exit 8 | 2019-03-21 09:22:22 | Wake Source | PME - XHCI (USB 2.0 port) | 9 9 | 2019-03-21 09:22:22 | Wake Source | GPE # | 13 10 | 2019-03-21 09:23:20 | ACPI Enter | S3 11 | 2019-03-21 09:23:30 | Wake Source | PME - XHCI (USB 2.0 port) | 9 12 | 2019-03-21 09:23:30 | ACPI Wake | S3 13 | 2019-03-21 09:23:30 | Wake Source | GPE # | 13 Change-Id: Ia6643342e3292984e422ff3c3fcd4bc0d99f947e Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31999 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.
With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.
coreboot was formerly known as LinuxBIOS.
After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot.
See https://www.coreboot.org/Payloads for a list of supported payloads.
coreboot supports a wide range of chipsets, devices, and mainboards.
For details please consult:
ANY_TOOLCHAIN
Kconfig option if you're feeling lucky (no support in this case).Optional:
make menuconfig
and make nconfig
)Please consult https://www.coreboot.org/Build_HOWTO for details.
If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.
Please see https://www.coreboot.org/QEMU for details.
Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:
You can contact us directly on the coreboot mailing list:
https://www.coreboot.org/Mailinglist
The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.
coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.
This makes the resulting coreboot images licensed under the GPL, version 2.