| commit | 842776e1dcb310e889d2ba922be9d7b81a1c2dd0 | [log] [tgz] |
|---|---|---|
| author | Aamir Bohra <aamir.bohra@intel.com> | Thu May 25 14:12:01 2017 +0530 |
| committer | Aaron Durbin <adurbin@chromium.org> | Mon Jun 05 00:32:48 2017 +0200 |
| tree | c6276bf0cffe9c8cd436689665b1814757cb92f6 | |
| parent | 1fa16c9cb6c486cdd4b1bcb3734308b28b9c9a22 [diff] |
soc/intel/skylake: Use Intel timer common code Use timer code from soc/intel/common. This code removes monotonic timer refrence w.r.t MSR 24Mhz counter(0x637) and use tsc timer. Change-Id: I7fad620b11c9e5db128f646639c79ea58a0a574f Signed-off-by: Aamir Bohra <aamir.bohra@intel.com> Reviewed-on: https://review.coreboot.org/19912 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>