Stefan Reinauer | 155e9b5 | 2012-04-27 23:19:58 +0200 | [diff] [blame] | 1 | chip northbridge/intel/sandybridge |
Vladimir Serbinenko | dd2bc3f | 2014-10-31 09:16:31 +0100 | [diff] [blame] | 2 | # IGD Displays |
Nico Huber | b0b25c8 | 2020-03-21 20:35:12 +0100 | [diff] [blame] | 3 | register "gfx" = "GMA_STATIC_DISPLAYS(0)" |
Stefan Reinauer | 155e9b5 | 2012-04-27 23:19:58 +0200 | [diff] [blame] | 4 | |
| 5 | # Enable DisplayPort Hotplug with 6ms pulse |
| 6 | register "gpu_dp_d_hotplug" = "0x06" |
| 7 | |
| 8 | # Enable Panel as LVDS and configure power delays |
Angel Pons | dc0c081 | 2020-09-02 19:17:30 +0200 | [diff] [blame^] | 9 | register "gpu_panel_port_select" = "PANEL_PORT_LVDS" |
Stefan Reinauer | 155e9b5 | 2012-04-27 23:19:58 +0200 | [diff] [blame] | 10 | register "gpu_panel_power_cycle_delay" = "5" # T4: 400ms |
| 11 | register "gpu_panel_power_up_delay" = "400" # T1+T2: 40ms |
| 12 | register "gpu_panel_power_down_delay" = "150" # T3: 15ms |
| 13 | register "gpu_panel_power_backlight_on_delay" = "2100" # T5: 210ms |
| 14 | register "gpu_panel_power_backlight_off_delay" = "2100" # TD: 210ms |
| 15 | |
Matt DeVillier | eaea9c9 | 2018-12-31 15:07:42 -0600 | [diff] [blame] | 16 | # Set backlight PWM values |
| 17 | register "gpu_cpu_backlight" = "0x000001e8" |
| 18 | register "gpu_pch_backlight" = "0x03d00000" |
| 19 | |
Vladimir Serbinenko | 0a07c5c | 2016-02-10 03:01:37 +0100 | [diff] [blame] | 20 | register "max_mem_clock_mhz" = "666" |
| 21 | |
Stefan Reinauer | 0aa37c4 | 2013-02-12 15:20:54 -0800 | [diff] [blame] | 22 | device cpu_cluster 0 on |
Stefan Reinauer | 155e9b5 | 2012-04-27 23:19:58 +0200 | [diff] [blame] | 23 | chip cpu/intel/model_206ax |
| 24 | # Magic APIC ID to locate this chip |
Arthur Heymans | 7e6946a | 2019-01-21 17:55:02 +0100 | [diff] [blame] | 25 | device lapic 0x0 on end |
Arthur Heymans | b3f2323 | 2019-01-21 17:48:55 +0100 | [diff] [blame] | 26 | device lapic 0xacac off end |
Stefan Reinauer | 155e9b5 | 2012-04-27 23:19:58 +0200 | [diff] [blame] | 27 | |
Stefan Reinauer | 155e9b5 | 2012-04-27 23:19:58 +0200 | [diff] [blame] | 28 | register "c1_acpower" = "1" # ACPI(C1) = MWAIT(C1) |
| 29 | register "c2_acpower" = "3" # ACPI(C2) = MWAIT(C3) |
| 30 | register "c3_acpower" = "5" # ACPI(C3) = MWAIT(C7) |
| 31 | |
| 32 | register "c1_battery" = "1" # ACPI(C1) = MWAIT(C1) |
| 33 | register "c2_battery" = "3" # ACPI(C2) = MWAIT(C3) |
| 34 | register "c3_battery" = "5" # ACPI(C3) = MWAIT(C7) |
| 35 | end |
| 36 | end |
| 37 | |
Patrick Rudolph | 266a1f7 | 2016-06-09 18:13:34 +0200 | [diff] [blame] | 38 | register "pci_mmio_size" = "1024" |
| 39 | |
Stefan Reinauer | 4aff445 | 2013-02-12 14:17:15 -0800 | [diff] [blame] | 40 | device domain 0 on |
Sven Schnelle | 5be2060 | 2012-08-20 11:21:00 +0200 | [diff] [blame] | 41 | ioapic_irq 4 INTA 0x10 |
| 42 | ioapic_irq 4 INTB 0x11 |
| 43 | ioapic_irq 4 INTC 0x12 |
| 44 | ioapic_irq 4 INTD 0x13 |
Stefan Reinauer | 56c7dc7 | 2012-05-15 12:36:57 -0700 | [diff] [blame] | 45 | subsystemid 0x1ae0 0xc000 inherit |
Stefan Reinauer | 155e9b5 | 2012-04-27 23:19:58 +0200 | [diff] [blame] | 46 | device pci 00.0 on end # host bridge |
| 47 | device pci 02.0 on end # vga controller |
| 48 | |
| 49 | chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH |
Stefan Reinauer | 155e9b5 | 2012-04-27 23:19:58 +0200 | [diff] [blame] | 50 | # GPI routing |
| 51 | # 0 No effect (default) |
| 52 | # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set) |
| 53 | # 2 SCI (if corresponding GPIO_EN bit is also set) |
| 54 | register "alt_gp_smi_en" = "0x0002" |
| 55 | register "gpi1_routing" = "1" |
| 56 | register "gpi7_routing" = "2" |
| 57 | |
Stefan Reinauer | 155e9b5 | 2012-04-27 23:19:58 +0200 | [diff] [blame] | 58 | register "sata_port_map" = "0x1" |
| 59 | |
| 60 | # EC range is 0xa00-0xa3f |
| 61 | register "gen1_dec" = "0x003c0a01" |
| 62 | register "gen2_dec" = "0x003c0b01" |
Arthur Heymans | 6beaef9 | 2019-06-16 23:29:23 +0200 | [diff] [blame] | 63 | register "gen3_dec" = "0x00fc1601" |
Stefan Reinauer | 155e9b5 | 2012-04-27 23:19:58 +0200 | [diff] [blame] | 64 | |
Vladimir Serbinenko | 5b044ae | 2014-10-25 15:20:55 +0200 | [diff] [blame] | 65 | register "c2_latency" = "1" |
Vladimir Serbinenko | 5b044ae | 2014-10-25 15:20:55 +0200 | [diff] [blame] | 66 | |
Stefan Reinauer | 155e9b5 | 2012-04-27 23:19:58 +0200 | [diff] [blame] | 67 | device pci 16.0 on end # Management Engine Interface 1 |
| 68 | device pci 16.1 off end # Management Engine Interface 2 |
| 69 | device pci 16.2 off end # Management Engine IDE-R |
| 70 | device pci 16.3 off end # Management Engine KT |
| 71 | device pci 19.0 off end # Intel Gigabit Ethernet |
Sven Schnelle | 5be2060 | 2012-08-20 11:21:00 +0200 | [diff] [blame] | 72 | device pci 1a.0 on # USB2 EHCI #2 |
| 73 | ioapic_irq 4 INTA 0x11 |
| 74 | end |
| 75 | device pci 1b.0 on # High Definition Audio |
| 76 | ioapic_irq 4 INTA 0x16 |
| 77 | end |
Stefan Reinauer | 155e9b5 | 2012-04-27 23:19:58 +0200 | [diff] [blame] | 78 | device pci 1c.0 on end # PCIe Port #1 (WLAN) |
| 79 | device pci 1c.1 off end # PCIe Port #2 |
| 80 | device pci 1c.2 off end # PCIe Port #3 |
Sven Schnelle | 5be2060 | 2012-08-20 11:21:00 +0200 | [diff] [blame] | 81 | device pci 1c.3 on # PCIe Port #4 (LAN) |
| 82 | # ioapic_irq 4 INTA 0x13 |
| 83 | end |
Stefan Reinauer | 155e9b5 | 2012-04-27 23:19:58 +0200 | [diff] [blame] | 84 | device pci 1c.4 off end # PCIe Port #5 |
| 85 | device pci 1c.5 off end # PCIe Port #6 |
| 86 | device pci 1c.6 off end # PCIe Port #7 |
| 87 | device pci 1c.7 off end # PCIe Port #8 |
Sven Schnelle | 5be2060 | 2012-08-20 11:21:00 +0200 | [diff] [blame] | 88 | device pci 1d.0 on # USB2 EHCI #1 |
| 89 | ioapic_irq 4 INTA 0x13 |
| 90 | end |
Stefan Reinauer | 155e9b5 | 2012-04-27 23:19:58 +0200 | [diff] [blame] | 91 | device pci 1e.0 off end # PCI bridge |
| 92 | device pci 1f.0 on # LPC bridge |
Sven Schnelle | 5be2060 | 2012-08-20 11:21:00 +0200 | [diff] [blame] | 93 | ioapic_irq 4 INTA 0x10 |
Stefan Reinauer | 155e9b5 | 2012-04-27 23:19:58 +0200 | [diff] [blame] | 94 | chip superio/smsc/mec1308 |
| 95 | device pnp 2e.1 on # PM1 |
| 96 | io 0x60 = 0xb00 |
| 97 | end |
| 98 | device pnp 2e.2 off end # EC1 |
| 99 | device pnp 2e.3 off end # EC2 |
| 100 | device pnp 2e.4 off end # UART |
| 101 | device pnp 2e.7 on # KBC |
| 102 | irq 0x70 = 1 |
| 103 | end |
| 104 | device pnp 2e.8 on # EC0 |
| 105 | io 0x60 = 0x62 |
| 106 | end |
| 107 | device pnp 2e.9 on # MBX |
| 108 | io 0x60 = 0xa00 |
| 109 | end |
| 110 | end |
| 111 | chip ec/smsc/mec1308 |
| 112 | register "mailbox_port" = "0xa00" |
| 113 | device pnp ff.1 off end |
| 114 | end |
Sven Schnelle | 5be2060 | 2012-08-20 11:21:00 +0200 | [diff] [blame] | 115 | |
| 116 | chip drivers/generic/ioapic |
| 117 | register "have_isa_interrupts" = "1" |
| 118 | register "irq_on_fsb" = "1" |
| 119 | register "enable_virtual_wire" = "1" |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 120 | register "base" = "(void *)0xfec00000" |
Sven Schnelle | 5be2060 | 2012-08-20 11:21:00 +0200 | [diff] [blame] | 121 | device ioapic 4 on end |
| 122 | end |
Matt DeVillier | 3044af7 | 2018-08-01 13:05:14 -0500 | [diff] [blame] | 123 | chip drivers/pc80/tpm |
| 124 | device pnp 0c31.0 on end |
| 125 | end |
Stefan Reinauer | 155e9b5 | 2012-04-27 23:19:58 +0200 | [diff] [blame] | 126 | end |
Sven Schnelle | 5be2060 | 2012-08-20 11:21:00 +0200 | [diff] [blame] | 127 | device pci 1f.2 on # SATA Controller 1 |
| 128 | ioapic_irq 4 INTA 0x10 |
| 129 | end |
| 130 | device pci 1f.3 on # SMBus |
| 131 | ioapic_irq 4 INTC 0x17 |
| 132 | end |
Stefan Reinauer | 155e9b5 | 2012-04-27 23:19:58 +0200 | [diff] [blame] | 133 | device pci 1f.5 off end # SATA Controller 2 |
| 134 | device pci 1f.6 on end # Thermal |
| 135 | end |
| 136 | end |
| 137 | end |