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Stefan Reinauer155e9b52012-04-27 23:19:58 +02001chip northbridge/intel/sandybridge
Vladimir Serbinenkodd2bc3f2014-10-31 09:16:31 +01002 # IGD Displays
Nico Huberb0b25c82020-03-21 20:35:12 +01003 register "gfx" = "GMA_STATIC_DISPLAYS(0)"
Stefan Reinauer155e9b52012-04-27 23:19:58 +02004
5 # Enable DisplayPort Hotplug with 6ms pulse
6 register "gpu_dp_d_hotplug" = "0x06"
7
8 # Enable Panel as LVDS and configure power delays
Angel Ponsdc0c0812020-09-02 19:17:30 +02009 register "gpu_panel_port_select" = "PANEL_PORT_LVDS"
Stefan Reinauer155e9b52012-04-27 23:19:58 +020010 register "gpu_panel_power_cycle_delay" = "5" # T4: 400ms
11 register "gpu_panel_power_up_delay" = "400" # T1+T2: 40ms
12 register "gpu_panel_power_down_delay" = "150" # T3: 15ms
13 register "gpu_panel_power_backlight_on_delay" = "2100" # T5: 210ms
14 register "gpu_panel_power_backlight_off_delay" = "2100" # TD: 210ms
15
Matt DeVilliereaea9c92018-12-31 15:07:42 -060016 # Set backlight PWM values
17 register "gpu_cpu_backlight" = "0x000001e8"
18 register "gpu_pch_backlight" = "0x03d00000"
19
Vladimir Serbinenko0a07c5c2016-02-10 03:01:37 +010020 register "max_mem_clock_mhz" = "666"
21
Stefan Reinauer0aa37c42013-02-12 15:20:54 -080022 device cpu_cluster 0 on
Stefan Reinauer155e9b52012-04-27 23:19:58 +020023 chip cpu/intel/model_206ax
24 # Magic APIC ID to locate this chip
Arthur Heymans7e6946a2019-01-21 17:55:02 +010025 device lapic 0x0 on end
Arthur Heymansb3f23232019-01-21 17:48:55 +010026 device lapic 0xacac off end
Stefan Reinauer155e9b52012-04-27 23:19:58 +020027
Stefan Reinauer155e9b52012-04-27 23:19:58 +020028 register "c1_acpower" = "1" # ACPI(C1) = MWAIT(C1)
29 register "c2_acpower" = "3" # ACPI(C2) = MWAIT(C3)
30 register "c3_acpower" = "5" # ACPI(C3) = MWAIT(C7)
31
32 register "c1_battery" = "1" # ACPI(C1) = MWAIT(C1)
33 register "c2_battery" = "3" # ACPI(C2) = MWAIT(C3)
34 register "c3_battery" = "5" # ACPI(C3) = MWAIT(C7)
35 end
36 end
37
Patrick Rudolph266a1f72016-06-09 18:13:34 +020038 register "pci_mmio_size" = "1024"
39
Stefan Reinauer4aff4452013-02-12 14:17:15 -080040 device domain 0 on
Sven Schnelle5be20602012-08-20 11:21:00 +020041 ioapic_irq 4 INTA 0x10
42 ioapic_irq 4 INTB 0x11
43 ioapic_irq 4 INTC 0x12
44 ioapic_irq 4 INTD 0x13
Stefan Reinauer56c7dc72012-05-15 12:36:57 -070045 subsystemid 0x1ae0 0xc000 inherit
Stefan Reinauer155e9b52012-04-27 23:19:58 +020046 device pci 00.0 on end # host bridge
47 device pci 02.0 on end # vga controller
48
49 chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
Stefan Reinauer155e9b52012-04-27 23:19:58 +020050 # GPI routing
51 # 0 No effect (default)
52 # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
53 # 2 SCI (if corresponding GPIO_EN bit is also set)
54 register "alt_gp_smi_en" = "0x0002"
55 register "gpi1_routing" = "1"
56 register "gpi7_routing" = "2"
57
Stefan Reinauer155e9b52012-04-27 23:19:58 +020058 register "sata_port_map" = "0x1"
59
60 # EC range is 0xa00-0xa3f
61 register "gen1_dec" = "0x003c0a01"
62 register "gen2_dec" = "0x003c0b01"
Arthur Heymans6beaef92019-06-16 23:29:23 +020063 register "gen3_dec" = "0x00fc1601"
Stefan Reinauer155e9b52012-04-27 23:19:58 +020064
Vladimir Serbinenko5b044ae2014-10-25 15:20:55 +020065 register "c2_latency" = "1"
Vladimir Serbinenko5b044ae2014-10-25 15:20:55 +020066
Stefan Reinauer155e9b52012-04-27 23:19:58 +020067 device pci 16.0 on end # Management Engine Interface 1
68 device pci 16.1 off end # Management Engine Interface 2
69 device pci 16.2 off end # Management Engine IDE-R
70 device pci 16.3 off end # Management Engine KT
71 device pci 19.0 off end # Intel Gigabit Ethernet
Sven Schnelle5be20602012-08-20 11:21:00 +020072 device pci 1a.0 on # USB2 EHCI #2
73 ioapic_irq 4 INTA 0x11
74 end
75 device pci 1b.0 on # High Definition Audio
76 ioapic_irq 4 INTA 0x16
77 end
Stefan Reinauer155e9b52012-04-27 23:19:58 +020078 device pci 1c.0 on end # PCIe Port #1 (WLAN)
79 device pci 1c.1 off end # PCIe Port #2
80 device pci 1c.2 off end # PCIe Port #3
Sven Schnelle5be20602012-08-20 11:21:00 +020081 device pci 1c.3 on # PCIe Port #4 (LAN)
82 # ioapic_irq 4 INTA 0x13
83 end
Stefan Reinauer155e9b52012-04-27 23:19:58 +020084 device pci 1c.4 off end # PCIe Port #5
85 device pci 1c.5 off end # PCIe Port #6
86 device pci 1c.6 off end # PCIe Port #7
87 device pci 1c.7 off end # PCIe Port #8
Sven Schnelle5be20602012-08-20 11:21:00 +020088 device pci 1d.0 on # USB2 EHCI #1
89 ioapic_irq 4 INTA 0x13
90 end
Stefan Reinauer155e9b52012-04-27 23:19:58 +020091 device pci 1e.0 off end # PCI bridge
92 device pci 1f.0 on # LPC bridge
Sven Schnelle5be20602012-08-20 11:21:00 +020093 ioapic_irq 4 INTA 0x10
Stefan Reinauer155e9b52012-04-27 23:19:58 +020094 chip superio/smsc/mec1308
95 device pnp 2e.1 on # PM1
96 io 0x60 = 0xb00
97 end
98 device pnp 2e.2 off end # EC1
99 device pnp 2e.3 off end # EC2
100 device pnp 2e.4 off end # UART
101 device pnp 2e.7 on # KBC
102 irq 0x70 = 1
103 end
104 device pnp 2e.8 on # EC0
105 io 0x60 = 0x62
106 end
107 device pnp 2e.9 on # MBX
108 io 0x60 = 0xa00
109 end
110 end
111 chip ec/smsc/mec1308
112 register "mailbox_port" = "0xa00"
113 device pnp ff.1 off end
114 end
Sven Schnelle5be20602012-08-20 11:21:00 +0200115
116 chip drivers/generic/ioapic
117 register "have_isa_interrupts" = "1"
118 register "irq_on_fsb" = "1"
119 register "enable_virtual_wire" = "1"
Kevin Paul Herbertbde6d302014-12-24 18:43:20 -0800120 register "base" = "(void *)0xfec00000"
Sven Schnelle5be20602012-08-20 11:21:00 +0200121 device ioapic 4 on end
122 end
Matt DeVillier3044af72018-08-01 13:05:14 -0500123 chip drivers/pc80/tpm
124 device pnp 0c31.0 on end
125 end
Stefan Reinauer155e9b52012-04-27 23:19:58 +0200126 end
Sven Schnelle5be20602012-08-20 11:21:00 +0200127 device pci 1f.2 on # SATA Controller 1
128 ioapic_irq 4 INTA 0x10
129 end
130 device pci 1f.3 on # SMBus
131 ioapic_irq 4 INTC 0x17
132 end
Stefan Reinauer155e9b52012-04-27 23:19:58 +0200133 device pci 1f.5 off end # SATA Controller 2
134 device pci 1f.6 on end # Thermal
135 end
136 end
137end