blob: feae5bf1e8788983e85c0828fccb479dfdfe66a9 [file] [log] [blame]
Stefan Reinauer155e9b52012-04-27 23:19:58 +02001chip northbridge/intel/sandybridge
Vladimir Serbinenkodd2bc3f2014-10-31 09:16:31 +01002 # IGD Displays
3 register "gfx.ndid" = "3"
4 register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
Stefan Reinauer155e9b52012-04-27 23:19:58 +02005
6 # Enable DisplayPort Hotplug with 6ms pulse
7 register "gpu_dp_d_hotplug" = "0x06"
8
9 # Enable Panel as LVDS and configure power delays
10 register "gpu_panel_port_select" = "0" # LVDS
11 register "gpu_panel_power_cycle_delay" = "5" # T4: 400ms
12 register "gpu_panel_power_up_delay" = "400" # T1+T2: 40ms
13 register "gpu_panel_power_down_delay" = "150" # T3: 15ms
14 register "gpu_panel_power_backlight_on_delay" = "2100" # T5: 210ms
15 register "gpu_panel_power_backlight_off_delay" = "2100" # TD: 210ms
16
Matt DeVilliereaea9c92018-12-31 15:07:42 -060017 # Set backlight PWM values
18 register "gpu_cpu_backlight" = "0x000001e8"
19 register "gpu_pch_backlight" = "0x03d00000"
20
Vladimir Serbinenko0a07c5c2016-02-10 03:01:37 +010021 register "max_mem_clock_mhz" = "666"
22
Stefan Reinauer0aa37c42013-02-12 15:20:54 -080023 device cpu_cluster 0 on
Stefan Reinauer155e9b52012-04-27 23:19:58 +020024 chip cpu/intel/model_206ax
25 # Magic APIC ID to locate this chip
Arthur Heymans7e6946a2019-01-21 17:55:02 +010026 device lapic 0x0 on end
Arthur Heymansb3f23232019-01-21 17:48:55 +010027 device lapic 0xacac off end
Stefan Reinauer155e9b52012-04-27 23:19:58 +020028
Stefan Reinauer155e9b52012-04-27 23:19:58 +020029 register "c1_acpower" = "1" # ACPI(C1) = MWAIT(C1)
30 register "c2_acpower" = "3" # ACPI(C2) = MWAIT(C3)
31 register "c3_acpower" = "5" # ACPI(C3) = MWAIT(C7)
32
33 register "c1_battery" = "1" # ACPI(C1) = MWAIT(C1)
34 register "c2_battery" = "3" # ACPI(C2) = MWAIT(C3)
35 register "c3_battery" = "5" # ACPI(C3) = MWAIT(C7)
36 end
37 end
38
Patrick Rudolph266a1f72016-06-09 18:13:34 +020039 register "pci_mmio_size" = "1024"
40
Stefan Reinauer4aff4452013-02-12 14:17:15 -080041 device domain 0 on
Sven Schnelle5be20602012-08-20 11:21:00 +020042 ioapic_irq 4 INTA 0x10
43 ioapic_irq 4 INTB 0x11
44 ioapic_irq 4 INTC 0x12
45 ioapic_irq 4 INTD 0x13
Stefan Reinauer56c7dc72012-05-15 12:36:57 -070046 subsystemid 0x1ae0 0xc000 inherit
Stefan Reinauer155e9b52012-04-27 23:19:58 +020047 device pci 00.0 on end # host bridge
48 device pci 02.0 on end # vga controller
49
50 chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
Stefan Reinauer155e9b52012-04-27 23:19:58 +020051 # GPI routing
52 # 0 No effect (default)
53 # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
54 # 2 SCI (if corresponding GPIO_EN bit is also set)
55 register "alt_gp_smi_en" = "0x0002"
56 register "gpi1_routing" = "1"
57 register "gpi7_routing" = "2"
58
Stefan Reinauer155e9b52012-04-27 23:19:58 +020059 register "sata_port_map" = "0x1"
60
61 # EC range is 0xa00-0xa3f
62 register "gen1_dec" = "0x003c0a01"
63 register "gen2_dec" = "0x003c0b01"
Arthur Heymans6beaef92019-06-16 23:29:23 +020064 register "gen3_dec" = "0x00fc1601"
Stefan Reinauer155e9b52012-04-27 23:19:58 +020065
Vladimir Serbinenko5b044ae2014-10-25 15:20:55 +020066 register "c2_latency" = "1"
67 register "p_cnt_throttling_supported" = "0"
68
Stefan Reinauer155e9b52012-04-27 23:19:58 +020069 device pci 16.0 on end # Management Engine Interface 1
70 device pci 16.1 off end # Management Engine Interface 2
71 device pci 16.2 off end # Management Engine IDE-R
72 device pci 16.3 off end # Management Engine KT
73 device pci 19.0 off end # Intel Gigabit Ethernet
Sven Schnelle5be20602012-08-20 11:21:00 +020074 device pci 1a.0 on # USB2 EHCI #2
75 ioapic_irq 4 INTA 0x11
76 end
77 device pci 1b.0 on # High Definition Audio
78 ioapic_irq 4 INTA 0x16
79 end
Stefan Reinauer155e9b52012-04-27 23:19:58 +020080 device pci 1c.0 on end # PCIe Port #1 (WLAN)
81 device pci 1c.1 off end # PCIe Port #2
82 device pci 1c.2 off end # PCIe Port #3
Sven Schnelle5be20602012-08-20 11:21:00 +020083 device pci 1c.3 on # PCIe Port #4 (LAN)
84 # ioapic_irq 4 INTA 0x13
85 end
Stefan Reinauer155e9b52012-04-27 23:19:58 +020086 device pci 1c.4 off end # PCIe Port #5
87 device pci 1c.5 off end # PCIe Port #6
88 device pci 1c.6 off end # PCIe Port #7
89 device pci 1c.7 off end # PCIe Port #8
Sven Schnelle5be20602012-08-20 11:21:00 +020090 device pci 1d.0 on # USB2 EHCI #1
91 ioapic_irq 4 INTA 0x13
92 end
Stefan Reinauer155e9b52012-04-27 23:19:58 +020093 device pci 1e.0 off end # PCI bridge
94 device pci 1f.0 on # LPC bridge
Sven Schnelle5be20602012-08-20 11:21:00 +020095 ioapic_irq 4 INTA 0x10
Stefan Reinauer155e9b52012-04-27 23:19:58 +020096 chip superio/smsc/mec1308
97 device pnp 2e.1 on # PM1
98 io 0x60 = 0xb00
99 end
100 device pnp 2e.2 off end # EC1
101 device pnp 2e.3 off end # EC2
102 device pnp 2e.4 off end # UART
103 device pnp 2e.7 on # KBC
104 irq 0x70 = 1
105 end
106 device pnp 2e.8 on # EC0
107 io 0x60 = 0x62
108 end
109 device pnp 2e.9 on # MBX
110 io 0x60 = 0xa00
111 end
112 end
113 chip ec/smsc/mec1308
114 register "mailbox_port" = "0xa00"
115 device pnp ff.1 off end
116 end
Sven Schnelle5be20602012-08-20 11:21:00 +0200117
118 chip drivers/generic/ioapic
119 register "have_isa_interrupts" = "1"
120 register "irq_on_fsb" = "1"
121 register "enable_virtual_wire" = "1"
Kevin Paul Herbertbde6d302014-12-24 18:43:20 -0800122 register "base" = "(void *)0xfec00000"
Sven Schnelle5be20602012-08-20 11:21:00 +0200123 device ioapic 4 on end
124 end
Matt DeVillier3044af72018-08-01 13:05:14 -0500125 chip drivers/pc80/tpm
126 device pnp 0c31.0 on end
127 end
Stefan Reinauer155e9b52012-04-27 23:19:58 +0200128 end
Sven Schnelle5be20602012-08-20 11:21:00 +0200129 device pci 1f.2 on # SATA Controller 1
130 ioapic_irq 4 INTA 0x10
131 end
132 device pci 1f.3 on # SMBus
133 ioapic_irq 4 INTC 0x17
134 end
Stefan Reinauer155e9b52012-04-27 23:19:58 +0200135 device pci 1f.5 off end # SATA Controller 2
136 device pci 1f.6 on end # Thermal
137 end
138 end
139end