blob: 3071fae62b6cba0957944ab1aee2eed3fd609f2c [file] [log] [blame]
Angel Ponsf4a99552020-04-02 20:12:40 +02001## SPDX-License-Identifier: GPL-2.0-only
Aaron Durbin76c37002012-10-30 09:03:43 -05002
3config SOUTHBRIDGE_INTEL_LYNXPOINT
4 bool
5
6if SOUTHBRIDGE_INTEL_LYNXPOINT
7
8config SOUTH_BRIDGE_OPTIONS # dummy
9 def_bool y
Aaron Durbinda5f5092016-07-13 23:23:16 -050010 select ACPI_INTEL_HARDWARE_SLEEP_VALUES
Arthur Heymans16fe7902017-04-12 17:01:31 +020011 select SOUTHBRIDGE_INTEL_COMMON_SMBUS
Angel Pons64285772020-06-01 20:06:03 +020012 select SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS
Arthur Heymans47a66032019-10-25 23:43:14 +020013 select SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9
Tristan Corrick167a5122018-10-31 02:28:32 +130014 select SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT
Tristan Corrick63626b12018-11-30 22:53:50 +130015 select SOUTHBRIDGE_INTEL_COMMON_FINALIZE
Patrick Rudolpha3caa2d2019-03-24 14:59:45 +010016 select SOUTHBRIDGE_INTEL_COMMON_PMCLIB
Arthur Heymansb8bda112019-06-04 13:57:47 +020017 select SOUTHBRIDGE_INTEL_COMMON_PMBASE
Arthur Heymans074730c2019-06-04 14:05:53 +020018 select SOUTHBRIDGE_INTEL_COMMON_RTC
Arthur Heymans23a6c792019-10-13 22:36:04 +020019 select SOUTHBRIDGE_INTEL_COMMON_RESET
Aaron Durbin76c37002012-10-30 09:03:43 -050020 select IOAPIC
Tristan Corrick8a347952018-12-02 03:23:11 +130021 select HAVE_SMI_HANDLER
Kyösti Mälkki0306b502013-08-13 09:10:31 +030022 select HAVE_USBDEBUG_OPTIONS
Aaron Durbin76c37002012-10-30 09:03:43 -050023 select USE_WATCHDOG_ON_BOOT
24 select PCIEXP_ASPM
25 select PCIEXP_COMMON_CLOCK
Stefan Tauneref8b9572018-09-06 00:34:28 +020026 select INTEL_DESCRIPTOR_MODE_CAPABLE
Martin Roth3a543182015-09-28 15:27:24 -060027 select HAVE_SPI_CONSOLE_SUPPORT
Aaron Durbin16246ea2016-08-05 21:23:37 -050028 select RTC
Patrick Rudolph273a8dc2016-02-06 18:07:59 +010029 select SOUTHBRIDGE_INTEL_COMMON_GPIO if !INTEL_LYNXPOINT_LP
Tristan Corrickf3127d42018-10-31 02:25:54 +130030 select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ
Bill XIEd533b162017-08-22 16:26:22 +080031 select HAVE_INTEL_CHIPSET_LOCKDOWN
Nico Huber9faae2b2018-11-14 00:00:35 +010032 select HAVE_POWER_STATE_AFTER_FAILURE
33 select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE
Elyes HAOUAS551a7592019-05-01 16:56:36 +020034 select SOUTHBRIDGE_INTEL_COMMON_WATCHDOG
Arthur Heymans3457df12019-11-16 10:04:41 +010035 select SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG
Aaron Durbin76c37002012-10-30 09:03:43 -050036
Duncan Lauriefb9928f2012-12-17 11:11:26 -080037config INTEL_LYNXPOINT_LP
38 bool
39 default n
40 help
41 Set this option to y for Lynxpont LP (Haswell ULT).
42
Aaron Durbin76c37002012-10-30 09:03:43 -050043config EHCI_BAR
44 hex
Kyösti Mälkki0306b502013-08-13 09:10:31 +030045 default 0xe8000000
Aaron Durbin76c37002012-10-30 09:03:43 -050046
Aaron Durbin76c37002012-10-30 09:03:43 -050047config SERIRQ_CONTINUOUS_MODE
48 bool
49 default n
50 help
51 If you set this option to y, the serial IRQ machine will be
52 operated in continuous mode.
53
Duncan Laurie3d299c42013-07-19 08:48:05 -070054config ME_MBP_CLEAR_LATE
55 bool "Defer wait for ME MBP Cleared"
56 default y
57 help
58 If you set this option to y, the Management Engine driver
59 will defer waiting for the MBP Cleared indicator until the
60 finalize step. This can speed up boot time if the ME takes
61 a long time to indicate this status.
62
Duncan Laurie911cedf2013-07-30 16:05:55 -070063config FINALIZE_USB_ROUTE_XHCI
64 bool "Route all ports to XHCI controller in finalize step"
65 default y
66 help
67 If you set this option to y, the USB ports will be routed
68 to the XHCI controller during the finalize SMM callback.
69
Aaron Durbin76c37002012-10-30 09:03:43 -050070endif