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Aaron Durbin76c37002012-10-30 09:03:43 -05001##
2## This file is part of the coreboot project.
3##
4## Copyright (C) 2011 Google Inc.
5##
6## This program is free software; you can redistribute it and/or modify
7## it under the terms of the GNU General Public License as published by
8## the Free Software Foundation; version 2 of the License.
9##
10## This program is distributed in the hope that it will be useful,
11## but WITHOUT ANY WARRANTY; without even the implied warranty of
12## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13## GNU General Public License for more details.
14##
15## You should have received a copy of the GNU General Public License
16## along with this program; if not, write to the Free Software
17## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18##
19
20config SOUTHBRIDGE_INTEL_LYNXPOINT
21 bool
22
23if SOUTHBRIDGE_INTEL_LYNXPOINT
24
25config SOUTH_BRIDGE_OPTIONS # dummy
26 def_bool y
Kyösti Mälkki71216c92013-07-28 23:39:37 +030027 select SOUTHBRIDGE_INTEL_COMMON
Aaron Durbin76c37002012-10-30 09:03:43 -050028 select IOAPIC
29 select HAVE_HARD_RESET
Kyösti Mälkki0306b502013-08-13 09:10:31 +030030 select HAVE_USBDEBUG_OPTIONS
Aaron Durbin76c37002012-10-30 09:03:43 -050031 select USE_WATCHDOG_ON_BOOT
32 select PCIEXP_ASPM
33 select PCIEXP_COMMON_CLOCK
34 select SPI_FLASH
Aaron Durbin94998c42013-01-22 13:54:12 -060035 select ALT_CBFS_LOAD_PAYLOAD
Aaron Durbin76c37002012-10-30 09:03:43 -050036
Duncan Lauriefb9928f2012-12-17 11:11:26 -080037config INTEL_LYNXPOINT_LP
38 bool
39 default n
40 help
41 Set this option to y for Lynxpont LP (Haswell ULT).
42
Aaron Durbin76c37002012-10-30 09:03:43 -050043config EHCI_BAR
44 hex
Kyösti Mälkki0306b502013-08-13 09:10:31 +030045 default 0xe8000000
Aaron Durbin76c37002012-10-30 09:03:43 -050046
47config EHCI_DEBUG_OFFSET
48 hex
49 default 0xa0
50
51config BOOTBLOCK_SOUTHBRIDGE_INIT
52 string
53 default "southbridge/intel/lynxpoint/bootblock.c"
54
55config SERIRQ_CONTINUOUS_MODE
56 bool
57 default n
58 help
59 If you set this option to y, the serial IRQ machine will be
60 operated in continuous mode.
61
Patrick Georgi3cc151e2013-06-13 15:07:02 +020062config ME_BIN_PATH
63 string "Path to management engine firmware"
64 default "3rdparty/mainboard/$(MAINBOARDDIR)/me.bin"
65
66config IFD_BIN_PATH
67 string "Path to intel firmware descriptor"
68 default "3rdparty/mainboard/$(MAINBOARDDIR)/descriptor.bin"
69
Duncan Laurie3d299c42013-07-19 08:48:05 -070070config ME_MBP_CLEAR_LATE
71 bool "Defer wait for ME MBP Cleared"
72 default y
73 help
74 If you set this option to y, the Management Engine driver
75 will defer waiting for the MBP Cleared indicator until the
76 finalize step. This can speed up boot time if the ME takes
77 a long time to indicate this status.
78
Duncan Laurie911cedf2013-07-30 16:05:55 -070079config FINALIZE_USB_ROUTE_XHCI
80 bool "Route all ports to XHCI controller in finalize step"
81 default y
82 help
83 If you set this option to y, the USB ports will be routed
84 to the XHCI controller during the finalize SMM callback.
85
Aaron Durbin76c37002012-10-30 09:03:43 -050086endif