Angel Pons | c74dae9 | 2020-04-02 23:48:16 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 2 | |
| 3 | #include <console/console.h> |
| 4 | #include <device/device.h> |
| 5 | #include <device/pci.h> |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 6 | #include <device/azalia_device.h> |
Kyösti Mälkki | 13f6650 | 2019-03-03 08:01:05 +0200 | [diff] [blame] | 7 | #include <device/mmio.h> |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 8 | #include <delay.h> |
Patrick Rudolph | 9f5261e | 2021-02-16 09:18:07 +0100 | [diff] [blame] | 9 | #include <timer.h> |
Nicholas Sudsgaard | 516d05f | 2024-02-02 18:21:34 +0900 | [diff] [blame] | 10 | #include <types.h> |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 11 | |
Angel Pons | 61dd836 | 2020-12-05 18:02:32 +0100 | [diff] [blame] | 12 | int azalia_set_bits(void *port, u32 mask, u32 val) |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 13 | { |
Patrick Rudolph | 9f5261e | 2021-02-16 09:18:07 +0100 | [diff] [blame] | 14 | struct stopwatch sw; |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 15 | u32 reg32; |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 16 | |
| 17 | /* Write (val & mask) to port */ |
| 18 | val &= mask; |
| 19 | reg32 = read32(port); |
| 20 | reg32 &= ~mask; |
| 21 | reg32 |= val; |
| 22 | write32(port, reg32); |
| 23 | |
Elyes HAOUAS | 6ea24ff | 2020-08-11 09:21:24 +0200 | [diff] [blame] | 24 | /* Wait for readback of register to match what was just written to it */ |
Patrick Rudolph | 9f5261e | 2021-02-16 09:18:07 +0100 | [diff] [blame] | 25 | stopwatch_init_msecs_expire(&sw, 50); |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 26 | do { |
| 27 | /* Wait 1ms based on BKDG wait time */ |
| 28 | mdelay(1); |
| 29 | reg32 = read32(port); |
| 30 | reg32 &= mask; |
Patrick Rudolph | 9f5261e | 2021-02-16 09:18:07 +0100 | [diff] [blame] | 31 | } while ((reg32 != val) && !stopwatch_expired(&sw)); |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 32 | |
| 33 | /* Timeout occurred */ |
Patrick Rudolph | 9f5261e | 2021-02-16 09:18:07 +0100 | [diff] [blame] | 34 | if (stopwatch_expired(&sw)) |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 35 | return -1; |
| 36 | return 0; |
| 37 | } |
| 38 | |
Angel Pons | 4919028 | 2020-12-05 18:52:38 +0100 | [diff] [blame] | 39 | int azalia_enter_reset(u8 *base) |
| 40 | { |
| 41 | /* Set bit 0 to 0 to enter reset state (BAR + 0x8)[0] */ |
| 42 | return azalia_set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, 0); |
| 43 | } |
| 44 | |
| 45 | int azalia_exit_reset(u8 *base) |
| 46 | { |
| 47 | /* Set bit 0 to 1 to exit reset state (BAR + 0x8)[0] */ |
| 48 | return azalia_set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, HDA_GCTL_CRST); |
| 49 | } |
| 50 | |
Angel Pons | 6da7866 | 2021-03-18 15:43:42 +0100 | [diff] [blame] | 51 | static u16 codec_detect(u8 *base) |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 52 | { |
Patrick Rudolph | 9f5261e | 2021-02-16 09:18:07 +0100 | [diff] [blame] | 53 | struct stopwatch sw; |
Angel Pons | 6da7866 | 2021-03-18 15:43:42 +0100 | [diff] [blame] | 54 | u16 reg16; |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 55 | |
Angel Pons | 7f839f6 | 2020-12-05 19:02:14 +0100 | [diff] [blame] | 56 | if (azalia_exit_reset(base) < 0) |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 57 | goto no_codec; |
| 58 | |
Angel Pons | 4bdb089 | 2024-06-26 11:29:24 +0200 | [diff] [blame^] | 59 | /* |
| 60 | * In the HD Audio Specification Rev. 1.0a, every bitfield in the GCAP |
| 61 | * register is RO (Read Only). However, it is known that in some Intel |
| 62 | * PCHs (e.g 6-series and 7-series, documents 324645 and 326776), some |
| 63 | * of the bitfields in the GCAP register are R/WO (Read / Write Once). |
| 64 | * GCAP is RO on 5-series PCHs; 8-series and 9-series PCHs have a lock |
| 65 | * bit for GCAP elsewhere. |
| 66 | * |
| 67 | * Lock GCAP by reading GCAP and writing back the same value. This has |
| 68 | * no effect on platforms that implement GCAP as a RO register or lock |
| 69 | * GCAP through a different mechanism. |
| 70 | */ |
| 71 | write16(base + HDA_GCAP_REG, read16(base + HDA_GCAP_REG)); |
Angel Pons | b922cbb | 2021-03-22 14:21:28 +0100 | [diff] [blame] | 72 | |
Elyes Haouas | fd93cff | 2022-02-20 11:09:07 +0100 | [diff] [blame] | 73 | /* clear STATESTS bits (BAR + 0x0e)[14:0] */ |
Angel Pons | 6da7866 | 2021-03-18 15:43:42 +0100 | [diff] [blame] | 74 | reg16 = read16(base + HDA_STATESTS_REG); |
Elyes Haouas | fd93cff | 2022-02-20 11:09:07 +0100 | [diff] [blame] | 75 | reg16 |= 0x7fff; |
Angel Pons | 6da7866 | 2021-03-18 15:43:42 +0100 | [diff] [blame] | 76 | write16(base + HDA_STATESTS_REG, reg16); |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 77 | |
| 78 | /* Wait for readback of register to |
| 79 | * match what was just written to it |
| 80 | */ |
Patrick Rudolph | 9f5261e | 2021-02-16 09:18:07 +0100 | [diff] [blame] | 81 | stopwatch_init_msecs_expire(&sw, 50); |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 82 | do { |
| 83 | /* Wait 1ms based on BKDG wait time */ |
| 84 | mdelay(1); |
Angel Pons | 6da7866 | 2021-03-18 15:43:42 +0100 | [diff] [blame] | 85 | reg16 = read16(base + HDA_STATESTS_REG); |
| 86 | } while ((reg16 != 0) && !stopwatch_expired(&sw)); |
Patrick Rudolph | 9f5261e | 2021-02-16 09:18:07 +0100 | [diff] [blame] | 87 | |
Martin Roth | 2ed0aa2 | 2016-01-05 20:58:58 -0700 | [diff] [blame] | 88 | /* Timeout occurred */ |
Patrick Rudolph | 9f5261e | 2021-02-16 09:18:07 +0100 | [diff] [blame] | 89 | if (stopwatch_expired(&sw)) |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 90 | goto no_codec; |
| 91 | |
Angel Pons | 2e0053b | 2020-12-05 19:06:55 +0100 | [diff] [blame] | 92 | if (azalia_enter_reset(base) < 0) |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 93 | goto no_codec; |
| 94 | |
Angel Pons | 7f839f6 | 2020-12-05 19:02:14 +0100 | [diff] [blame] | 95 | if (azalia_exit_reset(base) < 0) |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 96 | goto no_codec; |
| 97 | |
Elyes Haouas | fd93cff | 2022-02-20 11:09:07 +0100 | [diff] [blame] | 98 | /* Read in Codec location (BAR + 0x0e)[14:0] */ |
Angel Pons | 6da7866 | 2021-03-18 15:43:42 +0100 | [diff] [blame] | 99 | reg16 = read16(base + HDA_STATESTS_REG); |
Elyes Haouas | fd93cff | 2022-02-20 11:09:07 +0100 | [diff] [blame] | 100 | reg16 &= 0x7fff; |
Angel Pons | 6da7866 | 2021-03-18 15:43:42 +0100 | [diff] [blame] | 101 | if (!reg16) |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 102 | goto no_codec; |
| 103 | |
Angel Pons | 6da7866 | 2021-03-18 15:43:42 +0100 | [diff] [blame] | 104 | return reg16; |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 105 | |
| 106 | no_codec: |
| 107 | /* Codec Not found */ |
Angel Pons | 245b688 | 2024-06-26 10:40:43 +0200 | [diff] [blame] | 108 | azalia_enter_reset(base); |
Nicholas Sudsgaard | 516d05f | 2024-02-02 18:21:34 +0900 | [diff] [blame] | 109 | printk(BIOS_DEBUG, "azalia_audio: no codec!\n"); |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 110 | return 0; |
| 111 | } |
| 112 | |
Angel Pons | d3f7028 | 2020-12-05 18:28:33 +0100 | [diff] [blame] | 113 | /* |
| 114 | * Find a specific entry within a verb table |
| 115 | * |
| 116 | * @param verb_table: verb table data |
| 117 | * @param verb_table_bytes: verb table size in bytes |
| 118 | * @param viddid: vendor/device to search for |
| 119 | * @param verb: pointer to entry within table |
| 120 | * |
| 121 | * Returns size of the entry within the verb table, |
| 122 | * Returns 0 if the entry is not found |
| 123 | * |
| 124 | * The HDA verb table is composed of dwords. A set of 4 dwords is |
| 125 | * grouped together to form a "jack" descriptor. |
| 126 | * Bits 31:28 - Codec Address |
| 127 | * Bits 27:20 - NID |
| 128 | * Bits 19:8 - Verb ID |
| 129 | * Bits 7:0 - Payload |
| 130 | * |
| 131 | * coreboot groups different codec verb tables into a single table |
| 132 | * and prefixes each with a specific header consisting of 3 |
| 133 | * dword entries: |
| 134 | * 1 - Codec Vendor/Device ID |
| 135 | * 2 - Subsystem ID |
| 136 | * 3 - Number of jacks (groups of 4 dwords) for this codec |
| 137 | */ |
Angel Pons | d425ddd | 2020-12-05 18:22:58 +0100 | [diff] [blame] | 138 | u32 azalia_find_verb(const u32 *verb_table, u32 verb_table_bytes, u32 viddid, const u32 **verb) |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 139 | { |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 140 | int idx = 0; |
| 141 | |
Angel Pons | d425ddd | 2020-12-05 18:22:58 +0100 | [diff] [blame] | 142 | while (idx < (verb_table_bytes / sizeof(u32))) { |
Angel Pons | f23c6a8 | 2020-12-05 18:32:05 +0100 | [diff] [blame] | 143 | /* Header contains the number of jacks, aka groups of 4 dwords */ |
| 144 | u32 verb_size = 4 * verb_table[idx + 2]; |
Angel Pons | d425ddd | 2020-12-05 18:22:58 +0100 | [diff] [blame] | 145 | if (verb_table[idx] != viddid) { |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 146 | idx += verb_size + 3; // skip verb + header |
| 147 | continue; |
| 148 | } |
Angel Pons | d425ddd | 2020-12-05 18:22:58 +0100 | [diff] [blame] | 149 | *verb = &verb_table[idx + 3]; |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 150 | return verb_size; |
| 151 | } |
| 152 | |
| 153 | /* Not all codecs need to load another verb */ |
| 154 | return 0; |
| 155 | } |
| 156 | |
Elyes HAOUAS | 6ea24ff | 2020-08-11 09:21:24 +0200 | [diff] [blame] | 157 | /* |
| 158 | * Wait 50usec for the codec to indicate it is ready. |
| 159 | * No response would imply that the codec is non-operative. |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 160 | */ |
| 161 | |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 162 | static int wait_for_ready(u8 *base) |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 163 | { |
Patrick Rudolph | 9f5261e | 2021-02-16 09:18:07 +0100 | [diff] [blame] | 164 | struct stopwatch sw; |
Elyes HAOUAS | 6ea24ff | 2020-08-11 09:21:24 +0200 | [diff] [blame] | 165 | /* Use a 50 usec timeout - the Linux kernel uses the same duration */ |
Patrick Rudolph | 9f5261e | 2021-02-16 09:18:07 +0100 | [diff] [blame] | 166 | stopwatch_init_usecs_expire(&sw, 50); |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 167 | |
Patrick Rudolph | 9f5261e | 2021-02-16 09:18:07 +0100 | [diff] [blame] | 168 | while (!stopwatch_expired(&sw)) { |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 169 | u32 reg32 = read32(base + HDA_ICII_REG); |
| 170 | if (!(reg32 & HDA_ICII_BUSY)) |
| 171 | return 0; |
| 172 | udelay(1); |
| 173 | } |
| 174 | |
| 175 | return -1; |
| 176 | } |
| 177 | |
Elyes HAOUAS | 6ea24ff | 2020-08-11 09:21:24 +0200 | [diff] [blame] | 178 | /* |
Angel Pons | fa1befc | 2021-03-18 14:12:32 +0100 | [diff] [blame] | 179 | * Wait for the codec to indicate that it accepted the previous command. |
| 180 | * No response would imply that the codec is non-operative. |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 181 | */ |
| 182 | |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 183 | static int wait_for_valid(u8 *base) |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 184 | { |
Patrick Rudolph | 9f5261e | 2021-02-16 09:18:07 +0100 | [diff] [blame] | 185 | struct stopwatch sw; |
Elyes HAOUAS | 6ea24ff | 2020-08-11 09:21:24 +0200 | [diff] [blame] | 186 | u32 reg32; |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 187 | |
Elyes HAOUAS | 6ea24ff | 2020-08-11 09:21:24 +0200 | [diff] [blame] | 188 | /* Send the verb to the codec */ |
| 189 | reg32 = read32(base + HDA_ICII_REG); |
| 190 | reg32 |= HDA_ICII_BUSY | HDA_ICII_VALID; |
| 191 | write32(base + HDA_ICII_REG, reg32); |
| 192 | |
Angel Pons | fa1befc | 2021-03-18 14:12:32 +0100 | [diff] [blame] | 193 | /* |
| 194 | * The timeout is never reached when the codec is functioning properly. |
| 195 | * Using a small timeout value can result in spurious errors with some |
| 196 | * codecs, e.g. a codec that is slow to respond but operates correctly. |
| 197 | * When a codec is non-operative, the timeout is only reached once per |
| 198 | * verb table, thus the impact on booting time is relatively small. So, |
| 199 | * use a reasonably long enough timeout to cover all possible cases. |
| 200 | */ |
| 201 | stopwatch_init_msecs_expire(&sw, 1); |
Patrick Rudolph | 9f5261e | 2021-02-16 09:18:07 +0100 | [diff] [blame] | 202 | while (!stopwatch_expired(&sw)) { |
Elyes HAOUAS | 6ea24ff | 2020-08-11 09:21:24 +0200 | [diff] [blame] | 203 | reg32 = read32(base + HDA_ICII_REG); |
| 204 | if ((reg32 & (HDA_ICII_VALID | HDA_ICII_BUSY)) == HDA_ICII_VALID) |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 205 | return 0; |
| 206 | udelay(1); |
| 207 | } |
| 208 | |
| 209 | return -1; |
| 210 | } |
| 211 | |
Angel Pons | 44c431e | 2021-02-08 12:37:56 +0100 | [diff] [blame] | 212 | static int azalia_write_verb(u8 *base, u32 verb) |
| 213 | { |
| 214 | if (wait_for_ready(base) < 0) |
| 215 | return -1; |
| 216 | |
| 217 | write32(base + HDA_IC_REG, verb); |
| 218 | |
| 219 | return wait_for_valid(base); |
| 220 | } |
| 221 | |
| 222 | int azalia_program_verb_table(u8 *base, const u32 *verbs, u32 verb_size) |
| 223 | { |
| 224 | if (!verbs) |
| 225 | return 0; |
| 226 | |
| 227 | for (u32 i = 0; i < verb_size; i++) { |
| 228 | if (azalia_write_verb(base, verbs[i]) < 0) |
| 229 | return -1; |
| 230 | } |
| 231 | return 0; |
| 232 | } |
| 233 | |
Angel Pons | d6d71ce | 2021-02-08 12:47:29 +0100 | [diff] [blame] | 234 | __weak void mainboard_azalia_program_runtime_verbs(u8 *base, u32 viddid) |
| 235 | { |
| 236 | } |
| 237 | |
Nicholas Sudsgaard | 516d05f | 2024-02-02 18:21:34 +0900 | [diff] [blame] | 238 | static bool codec_is_operative(u8 *base, const int addr) |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 239 | { |
Angel Pons | 554713e | 2020-10-24 23:23:07 +0200 | [diff] [blame] | 240 | if (wait_for_ready(base) < 0) { |
Nicholas Sudsgaard | 516d05f | 2024-02-02 18:21:34 +0900 | [diff] [blame] | 241 | printk(BIOS_DEBUG, "azalia_audio: codec #%d not ready\n", addr); |
| 242 | return false; |
Elyes HAOUAS | 6ea24ff | 2020-08-11 09:21:24 +0200 | [diff] [blame] | 243 | } |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 244 | |
Nicholas Sudsgaard | 516d05f | 2024-02-02 18:21:34 +0900 | [diff] [blame] | 245 | const u32 reg32 = (addr << 28) | 0x000f0000; |
Elyes HAOUAS | d8c4799 | 2020-08-03 15:31:39 +0200 | [diff] [blame] | 246 | write32(base + HDA_IC_REG, reg32); |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 247 | |
Angel Pons | 554713e | 2020-10-24 23:23:07 +0200 | [diff] [blame] | 248 | if (wait_for_valid(base) < 0) { |
Nicholas Sudsgaard | 516d05f | 2024-02-02 18:21:34 +0900 | [diff] [blame] | 249 | printk(BIOS_DEBUG, "azalia_audio: codec #%d not valid\n", addr); |
| 250 | return false; |
| 251 | } |
| 252 | return true; |
| 253 | } |
| 254 | |
| 255 | void azalia_codec_init(u8 *base, int addr, const u32 *verb_table, u32 verb_table_bytes) |
| 256 | { |
| 257 | const u32 viddid = read32(base + HDA_IR_REG); |
| 258 | const u32 *verb; |
| 259 | u32 verb_size; |
| 260 | |
| 261 | printk(BIOS_DEBUG, "azalia_audio: initializing codec #%d...\n", addr); |
| 262 | printk(BIOS_DEBUG, "azalia_audio: - vendor/device id: 0x%08x\n", viddid); |
| 263 | |
| 264 | verb_size = azalia_find_verb(verb_table, verb_table_bytes, viddid, &verb); |
| 265 | |
| 266 | if (verb_size == 0) { |
| 267 | printk(BIOS_DEBUG, "azalia_audio: - no verb!\n"); |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 268 | return; |
Elyes HAOUAS | 6ea24ff | 2020-08-11 09:21:24 +0200 | [diff] [blame] | 269 | } |
Nicholas Sudsgaard | 516d05f | 2024-02-02 18:21:34 +0900 | [diff] [blame] | 270 | printk(BIOS_DEBUG, "azalia_audio: - verb size: %u\n", verb_size); |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 271 | |
Nicholas Sudsgaard | 516d05f | 2024-02-02 18:21:34 +0900 | [diff] [blame] | 272 | if (azalia_program_verb_table(base, verb, verb_size) < 0) |
| 273 | printk(BIOS_DEBUG, "azalia_audio: - verb not loaded\n"); |
Angel Pons | 1297b9c | 2021-11-10 17:47:22 +0100 | [diff] [blame] | 274 | else |
Nicholas Sudsgaard | 516d05f | 2024-02-02 18:21:34 +0900 | [diff] [blame] | 275 | printk(BIOS_DEBUG, "azalia_audio: - verb loaded\n"); |
Angel Pons | d6d71ce | 2021-02-08 12:47:29 +0100 | [diff] [blame] | 276 | |
Nicholas Sudsgaard | 516d05f | 2024-02-02 18:21:34 +0900 | [diff] [blame] | 277 | mainboard_azalia_program_runtime_verbs(base, viddid); |
| 278 | } |
| 279 | |
| 280 | static bool codec_can_init(const u16 codec_mask, u8 *base, const int addr) |
| 281 | { |
| 282 | return codec_mask & (1 << addr) && codec_is_operative(base, addr); |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 283 | } |
| 284 | |
Angel Pons | aae6b55 | 2021-11-10 18:10:38 +0100 | [diff] [blame] | 285 | void azalia_codecs_init(u8 *base, u16 codec_mask) |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 286 | { |
Nicholas Sudsgaard | 516d05f | 2024-02-02 18:21:34 +0900 | [diff] [blame] | 287 | for (int i = AZALIA_MAX_CODECS - 1; i >= 0; i--) { |
| 288 | if (codec_can_init(codec_mask, base, i)) |
Angel Pons | 86dfd3c | 2021-11-10 17:58:12 +0100 | [diff] [blame] | 289 | azalia_codec_init(base, i, cim_verb_data, cim_verb_data_size); |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 290 | } |
Patrick Rudolph | 1834fbb | 2021-02-16 10:03:07 +0100 | [diff] [blame] | 291 | |
| 292 | azalia_program_verb_table(base, pc_beep_verbs, pc_beep_verbs_size); |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 293 | } |
| 294 | |
| 295 | void azalia_audio_init(struct device *dev) |
| 296 | { |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 297 | u8 *base; |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 298 | struct resource *res; |
Angel Pons | 6da7866 | 2021-03-18 15:43:42 +0100 | [diff] [blame] | 299 | u16 codec_mask; |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 300 | |
Angel Pons | 32d09be | 2021-11-03 13:27:45 +0100 | [diff] [blame] | 301 | res = probe_resource(dev, PCI_BASE_ADDRESS_0); |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 302 | if (!res) |
| 303 | return; |
| 304 | |
Martin Roth | 0949e73 | 2021-10-01 14:28:22 -0600 | [diff] [blame] | 305 | // NOTE this will break as soon as the azalia_audio gets a bar above 4G. |
Elyes HAOUAS | 6ea24ff | 2020-08-11 09:21:24 +0200 | [diff] [blame] | 306 | // Is there anything we can do about it? |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 307 | base = res2mmio(res, 0, 0); |
| 308 | printk(BIOS_DEBUG, "azalia_audio: base = %p\n", base); |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 309 | codec_mask = codec_detect(base); |
| 310 | |
| 311 | if (codec_mask) { |
Nicholas Sudsgaard | 516d05f | 2024-02-02 18:21:34 +0900 | [diff] [blame] | 312 | printk(BIOS_DEBUG, "azalia_audio: codec_mask = 0x%02x\n", codec_mask); |
Angel Pons | aae6b55 | 2021-11-10 18:10:38 +0100 | [diff] [blame] | 313 | azalia_codecs_init(base, codec_mask); |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 314 | } |
| 315 | } |
| 316 | |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 317 | struct device_operations default_azalia_audio_ops = { |
| 318 | .read_resources = pci_dev_read_resources, |
| 319 | .set_resources = pci_dev_set_resources, |
| 320 | .enable_resources = pci_dev_enable_resources, |
| 321 | .init = azalia_audio_init, |
Angel Pons | 1fc0edd | 2020-05-31 00:03:28 +0200 | [diff] [blame] | 322 | .ops_pci = &pci_dev_ops_pci, |
Andrew Wu | b7bb70d | 2013-08-12 20:07:47 +0800 | [diff] [blame] | 323 | }; |