blob: 8051f2e7ee5325f05aea7d691c574f0006fe7f6a [file] [log] [blame]
Angel Ponsc74dae92020-04-02 23:48:16 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Andrew Wub7bb70d2013-08-12 20:07:47 +08002
3#include <console/console.h>
4#include <device/device.h>
5#include <device/pci.h>
Andrew Wub7bb70d2013-08-12 20:07:47 +08006#include <device/azalia_device.h>
Kyösti Mälkki13f66502019-03-03 08:01:05 +02007#include <device/mmio.h>
Andrew Wub7bb70d2013-08-12 20:07:47 +08008#include <delay.h>
Patrick Rudolph9f5261e2021-02-16 09:18:07 +01009#include <timer.h>
Nicholas Sudsgaard516d05f2024-02-02 18:21:34 +090010#include <types.h>
Andrew Wub7bb70d2013-08-12 20:07:47 +080011
Angel Pons61dd8362020-12-05 18:02:32 +010012int azalia_set_bits(void *port, u32 mask, u32 val)
Andrew Wub7bb70d2013-08-12 20:07:47 +080013{
Patrick Rudolph9f5261e2021-02-16 09:18:07 +010014 struct stopwatch sw;
Andrew Wub7bb70d2013-08-12 20:07:47 +080015 u32 reg32;
Andrew Wub7bb70d2013-08-12 20:07:47 +080016
17 /* Write (val & mask) to port */
18 val &= mask;
19 reg32 = read32(port);
20 reg32 &= ~mask;
21 reg32 |= val;
22 write32(port, reg32);
23
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +020024 /* Wait for readback of register to match what was just written to it */
Patrick Rudolph9f5261e2021-02-16 09:18:07 +010025 stopwatch_init_msecs_expire(&sw, 50);
Andrew Wub7bb70d2013-08-12 20:07:47 +080026 do {
27 /* Wait 1ms based on BKDG wait time */
28 mdelay(1);
29 reg32 = read32(port);
30 reg32 &= mask;
Patrick Rudolph9f5261e2021-02-16 09:18:07 +010031 } while ((reg32 != val) && !stopwatch_expired(&sw));
Andrew Wub7bb70d2013-08-12 20:07:47 +080032
33 /* Timeout occurred */
Patrick Rudolph9f5261e2021-02-16 09:18:07 +010034 if (stopwatch_expired(&sw))
Andrew Wub7bb70d2013-08-12 20:07:47 +080035 return -1;
36 return 0;
37}
38
Angel Pons49190282020-12-05 18:52:38 +010039int azalia_enter_reset(u8 *base)
40{
41 /* Set bit 0 to 0 to enter reset state (BAR + 0x8)[0] */
42 return azalia_set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, 0);
43}
44
45int azalia_exit_reset(u8 *base)
46{
47 /* Set bit 0 to 1 to exit reset state (BAR + 0x8)[0] */
48 return azalia_set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, HDA_GCTL_CRST);
49}
50
Angel Pons6da78662021-03-18 15:43:42 +010051static u16 codec_detect(u8 *base)
Andrew Wub7bb70d2013-08-12 20:07:47 +080052{
Patrick Rudolph9f5261e2021-02-16 09:18:07 +010053 struct stopwatch sw;
Angel Pons6da78662021-03-18 15:43:42 +010054 u16 reg16;
Andrew Wub7bb70d2013-08-12 20:07:47 +080055
Angel Pons7f839f62020-12-05 19:02:14 +010056 if (azalia_exit_reset(base) < 0)
Andrew Wub7bb70d2013-08-12 20:07:47 +080057 goto no_codec;
58
Angel Ponsb922cbb2021-03-22 14:21:28 +010059 if (CONFIG(AZALIA_LOCK_DOWN_R_WO_GCAP)) {
60 /* If GCAP is R/WO, lock it down after deasserting controller reset */
61 write16(base + HDA_GCAP_REG, read16(base + HDA_GCAP_REG));
62 }
63
Elyes Haouasfd93cff2022-02-20 11:09:07 +010064 /* clear STATESTS bits (BAR + 0x0e)[14:0] */
Angel Pons6da78662021-03-18 15:43:42 +010065 reg16 = read16(base + HDA_STATESTS_REG);
Elyes Haouasfd93cff2022-02-20 11:09:07 +010066 reg16 |= 0x7fff;
Angel Pons6da78662021-03-18 15:43:42 +010067 write16(base + HDA_STATESTS_REG, reg16);
Andrew Wub7bb70d2013-08-12 20:07:47 +080068
69 /* Wait for readback of register to
70 * match what was just written to it
71 */
Patrick Rudolph9f5261e2021-02-16 09:18:07 +010072 stopwatch_init_msecs_expire(&sw, 50);
Andrew Wub7bb70d2013-08-12 20:07:47 +080073 do {
74 /* Wait 1ms based on BKDG wait time */
75 mdelay(1);
Angel Pons6da78662021-03-18 15:43:42 +010076 reg16 = read16(base + HDA_STATESTS_REG);
77 } while ((reg16 != 0) && !stopwatch_expired(&sw));
Patrick Rudolph9f5261e2021-02-16 09:18:07 +010078
Martin Roth2ed0aa22016-01-05 20:58:58 -070079 /* Timeout occurred */
Patrick Rudolph9f5261e2021-02-16 09:18:07 +010080 if (stopwatch_expired(&sw))
Andrew Wub7bb70d2013-08-12 20:07:47 +080081 goto no_codec;
82
Angel Pons2e0053b2020-12-05 19:06:55 +010083 if (azalia_enter_reset(base) < 0)
Andrew Wub7bb70d2013-08-12 20:07:47 +080084 goto no_codec;
85
Angel Pons7f839f62020-12-05 19:02:14 +010086 if (azalia_exit_reset(base) < 0)
Andrew Wub7bb70d2013-08-12 20:07:47 +080087 goto no_codec;
88
Elyes Haouasfd93cff2022-02-20 11:09:07 +010089 /* Read in Codec location (BAR + 0x0e)[14:0] */
Angel Pons6da78662021-03-18 15:43:42 +010090 reg16 = read16(base + HDA_STATESTS_REG);
Elyes Haouasfd93cff2022-02-20 11:09:07 +010091 reg16 &= 0x7fff;
Angel Pons6da78662021-03-18 15:43:42 +010092 if (!reg16)
Andrew Wub7bb70d2013-08-12 20:07:47 +080093 goto no_codec;
94
Angel Pons6da78662021-03-18 15:43:42 +010095 return reg16;
Andrew Wub7bb70d2013-08-12 20:07:47 +080096
97no_codec:
98 /* Codec Not found */
99 /* Put HDA back in reset (BAR + 0x8) [0] */
Angel Pons61dd8362020-12-05 18:02:32 +0100100 azalia_set_bits(base + HDA_GCTL_REG, 1, 0);
Nicholas Sudsgaard516d05f2024-02-02 18:21:34 +0900101 printk(BIOS_DEBUG, "azalia_audio: no codec!\n");
Andrew Wub7bb70d2013-08-12 20:07:47 +0800102 return 0;
103}
104
Angel Ponsd3f70282020-12-05 18:28:33 +0100105/*
106 * Find a specific entry within a verb table
107 *
108 * @param verb_table: verb table data
109 * @param verb_table_bytes: verb table size in bytes
110 * @param viddid: vendor/device to search for
111 * @param verb: pointer to entry within table
112 *
113 * Returns size of the entry within the verb table,
114 * Returns 0 if the entry is not found
115 *
116 * The HDA verb table is composed of dwords. A set of 4 dwords is
117 * grouped together to form a "jack" descriptor.
118 * Bits 31:28 - Codec Address
119 * Bits 27:20 - NID
120 * Bits 19:8 - Verb ID
121 * Bits 7:0 - Payload
122 *
123 * coreboot groups different codec verb tables into a single table
124 * and prefixes each with a specific header consisting of 3
125 * dword entries:
126 * 1 - Codec Vendor/Device ID
127 * 2 - Subsystem ID
128 * 3 - Number of jacks (groups of 4 dwords) for this codec
129 */
Angel Ponsd425ddd2020-12-05 18:22:58 +0100130u32 azalia_find_verb(const u32 *verb_table, u32 verb_table_bytes, u32 viddid, const u32 **verb)
Andrew Wub7bb70d2013-08-12 20:07:47 +0800131{
Andrew Wub7bb70d2013-08-12 20:07:47 +0800132 int idx = 0;
133
Angel Ponsd425ddd2020-12-05 18:22:58 +0100134 while (idx < (verb_table_bytes / sizeof(u32))) {
Angel Ponsf23c6a82020-12-05 18:32:05 +0100135 /* Header contains the number of jacks, aka groups of 4 dwords */
136 u32 verb_size = 4 * verb_table[idx + 2];
Angel Ponsd425ddd2020-12-05 18:22:58 +0100137 if (verb_table[idx] != viddid) {
Andrew Wub7bb70d2013-08-12 20:07:47 +0800138 idx += verb_size + 3; // skip verb + header
139 continue;
140 }
Angel Ponsd425ddd2020-12-05 18:22:58 +0100141 *verb = &verb_table[idx + 3];
Andrew Wub7bb70d2013-08-12 20:07:47 +0800142 return verb_size;
143 }
144
145 /* Not all codecs need to load another verb */
146 return 0;
147}
148
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200149/*
150 * Wait 50usec for the codec to indicate it is ready.
151 * No response would imply that the codec is non-operative.
Andrew Wub7bb70d2013-08-12 20:07:47 +0800152 */
153
Kevin Paul Herbertbde6d302014-12-24 18:43:20 -0800154static int wait_for_ready(u8 *base)
Andrew Wub7bb70d2013-08-12 20:07:47 +0800155{
Patrick Rudolph9f5261e2021-02-16 09:18:07 +0100156 struct stopwatch sw;
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200157 /* Use a 50 usec timeout - the Linux kernel uses the same duration */
Patrick Rudolph9f5261e2021-02-16 09:18:07 +0100158 stopwatch_init_usecs_expire(&sw, 50);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800159
Patrick Rudolph9f5261e2021-02-16 09:18:07 +0100160 while (!stopwatch_expired(&sw)) {
Andrew Wub7bb70d2013-08-12 20:07:47 +0800161 u32 reg32 = read32(base + HDA_ICII_REG);
162 if (!(reg32 & HDA_ICII_BUSY))
163 return 0;
164 udelay(1);
165 }
166
167 return -1;
168}
169
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200170/*
Angel Ponsfa1befc2021-03-18 14:12:32 +0100171 * Wait for the codec to indicate that it accepted the previous command.
172 * No response would imply that the codec is non-operative.
Andrew Wub7bb70d2013-08-12 20:07:47 +0800173 */
174
Kevin Paul Herbertbde6d302014-12-24 18:43:20 -0800175static int wait_for_valid(u8 *base)
Andrew Wub7bb70d2013-08-12 20:07:47 +0800176{
Patrick Rudolph9f5261e2021-02-16 09:18:07 +0100177 struct stopwatch sw;
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200178 u32 reg32;
Andrew Wub7bb70d2013-08-12 20:07:47 +0800179
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200180 /* Send the verb to the codec */
181 reg32 = read32(base + HDA_ICII_REG);
182 reg32 |= HDA_ICII_BUSY | HDA_ICII_VALID;
183 write32(base + HDA_ICII_REG, reg32);
184
Angel Ponsfa1befc2021-03-18 14:12:32 +0100185 /*
186 * The timeout is never reached when the codec is functioning properly.
187 * Using a small timeout value can result in spurious errors with some
188 * codecs, e.g. a codec that is slow to respond but operates correctly.
189 * When a codec is non-operative, the timeout is only reached once per
190 * verb table, thus the impact on booting time is relatively small. So,
191 * use a reasonably long enough timeout to cover all possible cases.
192 */
193 stopwatch_init_msecs_expire(&sw, 1);
Patrick Rudolph9f5261e2021-02-16 09:18:07 +0100194 while (!stopwatch_expired(&sw)) {
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200195 reg32 = read32(base + HDA_ICII_REG);
196 if ((reg32 & (HDA_ICII_VALID | HDA_ICII_BUSY)) == HDA_ICII_VALID)
Andrew Wub7bb70d2013-08-12 20:07:47 +0800197 return 0;
198 udelay(1);
199 }
200
201 return -1;
202}
203
Angel Pons44c431e2021-02-08 12:37:56 +0100204static int azalia_write_verb(u8 *base, u32 verb)
205{
206 if (wait_for_ready(base) < 0)
207 return -1;
208
209 write32(base + HDA_IC_REG, verb);
210
211 return wait_for_valid(base);
212}
213
214int azalia_program_verb_table(u8 *base, const u32 *verbs, u32 verb_size)
215{
216 if (!verbs)
217 return 0;
218
219 for (u32 i = 0; i < verb_size; i++) {
220 if (azalia_write_verb(base, verbs[i]) < 0)
221 return -1;
222 }
223 return 0;
224}
225
Angel Ponsd6d71ce2021-02-08 12:47:29 +0100226__weak void mainboard_azalia_program_runtime_verbs(u8 *base, u32 viddid)
227{
228}
229
Nicholas Sudsgaard516d05f2024-02-02 18:21:34 +0900230static bool codec_is_operative(u8 *base, const int addr)
Andrew Wub7bb70d2013-08-12 20:07:47 +0800231{
Angel Pons554713e2020-10-24 23:23:07 +0200232 if (wait_for_ready(base) < 0) {
Nicholas Sudsgaard516d05f2024-02-02 18:21:34 +0900233 printk(BIOS_DEBUG, "azalia_audio: codec #%d not ready\n", addr);
234 return false;
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200235 }
Andrew Wub7bb70d2013-08-12 20:07:47 +0800236
Nicholas Sudsgaard516d05f2024-02-02 18:21:34 +0900237 const u32 reg32 = (addr << 28) | 0x000f0000;
Elyes HAOUASd8c47992020-08-03 15:31:39 +0200238 write32(base + HDA_IC_REG, reg32);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800239
Angel Pons554713e2020-10-24 23:23:07 +0200240 if (wait_for_valid(base) < 0) {
Nicholas Sudsgaard516d05f2024-02-02 18:21:34 +0900241 printk(BIOS_DEBUG, "azalia_audio: codec #%d not valid\n", addr);
242 return false;
243 }
244 return true;
245}
246
247void azalia_codec_init(u8 *base, int addr, const u32 *verb_table, u32 verb_table_bytes)
248{
249 const u32 viddid = read32(base + HDA_IR_REG);
250 const u32 *verb;
251 u32 verb_size;
252
253 printk(BIOS_DEBUG, "azalia_audio: initializing codec #%d...\n", addr);
254 printk(BIOS_DEBUG, "azalia_audio: - vendor/device id: 0x%08x\n", viddid);
255
256 verb_size = azalia_find_verb(verb_table, verb_table_bytes, viddid, &verb);
257
258 if (verb_size == 0) {
259 printk(BIOS_DEBUG, "azalia_audio: - no verb!\n");
Andrew Wub7bb70d2013-08-12 20:07:47 +0800260 return;
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200261 }
Nicholas Sudsgaard516d05f2024-02-02 18:21:34 +0900262 printk(BIOS_DEBUG, "azalia_audio: - verb size: %u\n", verb_size);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800263
Nicholas Sudsgaard516d05f2024-02-02 18:21:34 +0900264 if (azalia_program_verb_table(base, verb, verb_size) < 0)
265 printk(BIOS_DEBUG, "azalia_audio: - verb not loaded\n");
Angel Pons1297b9c2021-11-10 17:47:22 +0100266 else
Nicholas Sudsgaard516d05f2024-02-02 18:21:34 +0900267 printk(BIOS_DEBUG, "azalia_audio: - verb loaded\n");
Angel Ponsd6d71ce2021-02-08 12:47:29 +0100268
Nicholas Sudsgaard516d05f2024-02-02 18:21:34 +0900269 mainboard_azalia_program_runtime_verbs(base, viddid);
270}
271
272static bool codec_can_init(const u16 codec_mask, u8 *base, const int addr)
273{
274 return codec_mask & (1 << addr) && codec_is_operative(base, addr);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800275}
276
Angel Ponsaae6b552021-11-10 18:10:38 +0100277void azalia_codecs_init(u8 *base, u16 codec_mask)
Andrew Wub7bb70d2013-08-12 20:07:47 +0800278{
Nicholas Sudsgaard516d05f2024-02-02 18:21:34 +0900279 for (int i = AZALIA_MAX_CODECS - 1; i >= 0; i--) {
280 if (codec_can_init(codec_mask, base, i))
Angel Pons86dfd3c2021-11-10 17:58:12 +0100281 azalia_codec_init(base, i, cim_verb_data, cim_verb_data_size);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800282 }
Patrick Rudolph1834fbb2021-02-16 10:03:07 +0100283
284 azalia_program_verb_table(base, pc_beep_verbs, pc_beep_verbs_size);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800285}
286
287void azalia_audio_init(struct device *dev)
288{
Kevin Paul Herbertbde6d302014-12-24 18:43:20 -0800289 u8 *base;
Andrew Wub7bb70d2013-08-12 20:07:47 +0800290 struct resource *res;
Angel Pons6da78662021-03-18 15:43:42 +0100291 u16 codec_mask;
Andrew Wub7bb70d2013-08-12 20:07:47 +0800292
Angel Pons32d09be2021-11-03 13:27:45 +0100293 res = probe_resource(dev, PCI_BASE_ADDRESS_0);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800294 if (!res)
295 return;
296
Martin Roth0949e732021-10-01 14:28:22 -0600297 // NOTE this will break as soon as the azalia_audio gets a bar above 4G.
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200298 // Is there anything we can do about it?
Kevin Paul Herbertbde6d302014-12-24 18:43:20 -0800299 base = res2mmio(res, 0, 0);
300 printk(BIOS_DEBUG, "azalia_audio: base = %p\n", base);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800301 codec_mask = codec_detect(base);
302
303 if (codec_mask) {
Nicholas Sudsgaard516d05f2024-02-02 18:21:34 +0900304 printk(BIOS_DEBUG, "azalia_audio: codec_mask = 0x%02x\n", codec_mask);
Angel Ponsaae6b552021-11-10 18:10:38 +0100305 azalia_codecs_init(base, codec_mask);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800306 }
307}
308
Andrew Wub7bb70d2013-08-12 20:07:47 +0800309struct device_operations default_azalia_audio_ops = {
310 .read_resources = pci_dev_read_resources,
311 .set_resources = pci_dev_set_resources,
312 .enable_resources = pci_dev_enable_resources,
313 .init = azalia_audio_init,
Angel Pons1fc0edd2020-05-31 00:03:28 +0200314 .ops_pci = &pci_dev_ops_pci,
Andrew Wub7bb70d2013-08-12 20:07:47 +0800315};