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Angel Ponsc74dae92020-04-02 23:48:16 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Andrew Wub7bb70d2013-08-12 20:07:47 +08002
3#include <console/console.h>
4#include <device/device.h>
5#include <device/pci.h>
Andrew Wub7bb70d2013-08-12 20:07:47 +08006#include <device/azalia_device.h>
Kyösti Mälkki13f66502019-03-03 08:01:05 +02007#include <device/mmio.h>
Andrew Wub7bb70d2013-08-12 20:07:47 +08008#include <delay.h>
9
Angel Pons61dd8362020-12-05 18:02:32 +010010int azalia_set_bits(void *port, u32 mask, u32 val)
Andrew Wub7bb70d2013-08-12 20:07:47 +080011{
12 u32 reg32;
13 int count;
14
15 /* Write (val & mask) to port */
16 val &= mask;
17 reg32 = read32(port);
18 reg32 &= ~mask;
19 reg32 |= val;
20 write32(port, reg32);
21
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +020022 /* Wait for readback of register to match what was just written to it */
Andrew Wub7bb70d2013-08-12 20:07:47 +080023 count = 50;
24 do {
25 /* Wait 1ms based on BKDG wait time */
26 mdelay(1);
27 reg32 = read32(port);
28 reg32 &= mask;
29 } while ((reg32 != val) && --count);
30
31 /* Timeout occurred */
32 if (!count)
33 return -1;
34 return 0;
35}
36
Angel Pons49190282020-12-05 18:52:38 +010037int azalia_enter_reset(u8 *base)
38{
39 /* Set bit 0 to 0 to enter reset state (BAR + 0x8)[0] */
40 return azalia_set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, 0);
41}
42
43int azalia_exit_reset(u8 *base)
44{
45 /* Set bit 0 to 1 to exit reset state (BAR + 0x8)[0] */
46 return azalia_set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, HDA_GCTL_CRST);
47}
48
Kevin Paul Herbertbde6d302014-12-24 18:43:20 -080049static int codec_detect(u8 *base)
Andrew Wub7bb70d2013-08-12 20:07:47 +080050{
51 u32 reg32;
52 int count;
53
Angel Pons7f839f62020-12-05 19:02:14 +010054 if (azalia_exit_reset(base) < 0)
Andrew Wub7bb70d2013-08-12 20:07:47 +080055 goto no_codec;
56
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +020057 /* clear STATESTS bits (BAR + 0xe)[2:0] */
Elyes HAOUASd8c47992020-08-03 15:31:39 +020058 reg32 = read32(base + HDA_STATESTS_REG);
Andrew Wub7bb70d2013-08-12 20:07:47 +080059 reg32 |= 7;
Elyes HAOUASd8c47992020-08-03 15:31:39 +020060 write32(base + HDA_STATESTS_REG, reg32);
Andrew Wub7bb70d2013-08-12 20:07:47 +080061
62 /* Wait for readback of register to
63 * match what was just written to it
64 */
65 count = 50;
66 do {
67 /* Wait 1ms based on BKDG wait time */
68 mdelay(1);
Elyes HAOUASd8c47992020-08-03 15:31:39 +020069 reg32 = read32(base + HDA_STATESTS_REG);
Andrew Wub7bb70d2013-08-12 20:07:47 +080070 } while ((reg32 != 0) && --count);
Martin Roth2ed0aa22016-01-05 20:58:58 -070071 /* Timeout occurred */
Andrew Wub7bb70d2013-08-12 20:07:47 +080072 if (!count)
73 goto no_codec;
74
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +020075 /* Set Bit 0 to 0 to enter reset state (BAR + 0x8)[0] */
Angel Pons61dd8362020-12-05 18:02:32 +010076 if (azalia_set_bits(base + HDA_GCTL_REG, 1, 0) < 0)
Andrew Wub7bb70d2013-08-12 20:07:47 +080077 goto no_codec;
78
Angel Pons7f839f62020-12-05 19:02:14 +010079 if (azalia_exit_reset(base) < 0)
Andrew Wub7bb70d2013-08-12 20:07:47 +080080 goto no_codec;
81
82 /* Read in Codec location (BAR + 0xe)[2..0] */
Elyes HAOUASd8c47992020-08-03 15:31:39 +020083 reg32 = read32(base + HDA_STATESTS_REG);
Andrew Wub7bb70d2013-08-12 20:07:47 +080084 reg32 &= 0x0f;
85 if (!reg32)
86 goto no_codec;
87
88 return reg32;
89
90no_codec:
91 /* Codec Not found */
92 /* Put HDA back in reset (BAR + 0x8) [0] */
Angel Pons61dd8362020-12-05 18:02:32 +010093 azalia_set_bits(base + HDA_GCTL_REG, 1, 0);
Andrew Wub7bb70d2013-08-12 20:07:47 +080094 printk(BIOS_DEBUG, "azalia_audio: No codec!\n");
95 return 0;
96}
97
Angel Ponsd3f70282020-12-05 18:28:33 +010098/*
99 * Find a specific entry within a verb table
100 *
101 * @param verb_table: verb table data
102 * @param verb_table_bytes: verb table size in bytes
103 * @param viddid: vendor/device to search for
104 * @param verb: pointer to entry within table
105 *
106 * Returns size of the entry within the verb table,
107 * Returns 0 if the entry is not found
108 *
109 * The HDA verb table is composed of dwords. A set of 4 dwords is
110 * grouped together to form a "jack" descriptor.
111 * Bits 31:28 - Codec Address
112 * Bits 27:20 - NID
113 * Bits 19:8 - Verb ID
114 * Bits 7:0 - Payload
115 *
116 * coreboot groups different codec verb tables into a single table
117 * and prefixes each with a specific header consisting of 3
118 * dword entries:
119 * 1 - Codec Vendor/Device ID
120 * 2 - Subsystem ID
121 * 3 - Number of jacks (groups of 4 dwords) for this codec
122 */
Angel Ponsd425ddd2020-12-05 18:22:58 +0100123u32 azalia_find_verb(const u32 *verb_table, u32 verb_table_bytes, u32 viddid, const u32 **verb)
Andrew Wub7bb70d2013-08-12 20:07:47 +0800124{
Andrew Wub7bb70d2013-08-12 20:07:47 +0800125 int idx = 0;
126
Angel Ponsd425ddd2020-12-05 18:22:58 +0100127 while (idx < (verb_table_bytes / sizeof(u32))) {
Angel Ponsf23c6a82020-12-05 18:32:05 +0100128 /* Header contains the number of jacks, aka groups of 4 dwords */
129 u32 verb_size = 4 * verb_table[idx + 2];
Angel Ponsd425ddd2020-12-05 18:22:58 +0100130 if (verb_table[idx] != viddid) {
Andrew Wub7bb70d2013-08-12 20:07:47 +0800131 idx += verb_size + 3; // skip verb + header
132 continue;
133 }
Angel Ponsd425ddd2020-12-05 18:22:58 +0100134 *verb = &verb_table[idx + 3];
Andrew Wub7bb70d2013-08-12 20:07:47 +0800135 return verb_size;
136 }
137
138 /* Not all codecs need to load another verb */
139 return 0;
140}
141
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200142/*
143 * Wait 50usec for the codec to indicate it is ready.
144 * No response would imply that the codec is non-operative.
Andrew Wub7bb70d2013-08-12 20:07:47 +0800145 */
146
Kevin Paul Herbertbde6d302014-12-24 18:43:20 -0800147static int wait_for_ready(u8 *base)
Andrew Wub7bb70d2013-08-12 20:07:47 +0800148{
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200149 /* Use a 50 usec timeout - the Linux kernel uses the same duration */
Andrew Wub7bb70d2013-08-12 20:07:47 +0800150 int timeout = 50;
151
152 while (timeout--) {
153 u32 reg32 = read32(base + HDA_ICII_REG);
154 if (!(reg32 & HDA_ICII_BUSY))
155 return 0;
156 udelay(1);
157 }
158
159 return -1;
160}
161
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200162/*
163 * Wait 50usec for the codec to indicate that it accepted the previous command.
164 * No response would imply that the code is non-operative.
Andrew Wub7bb70d2013-08-12 20:07:47 +0800165 */
166
Kevin Paul Herbertbde6d302014-12-24 18:43:20 -0800167static int wait_for_valid(u8 *base)
Andrew Wub7bb70d2013-08-12 20:07:47 +0800168{
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200169 u32 reg32;
170 /* Use a 50 usec timeout - the Linux kernel uses the same duration */
Andrew Wub7bb70d2013-08-12 20:07:47 +0800171 int timeout = 25;
172
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200173 /* Send the verb to the codec */
174 reg32 = read32(base + HDA_ICII_REG);
175 reg32 |= HDA_ICII_BUSY | HDA_ICII_VALID;
176 write32(base + HDA_ICII_REG, reg32);
177
Andrew Wub7bb70d2013-08-12 20:07:47 +0800178 while (timeout--) {
179 udelay(1);
180 }
181 timeout = 50;
182 while (timeout--) {
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200183 reg32 = read32(base + HDA_ICII_REG);
184 if ((reg32 & (HDA_ICII_VALID | HDA_ICII_BUSY)) == HDA_ICII_VALID)
Andrew Wub7bb70d2013-08-12 20:07:47 +0800185 return 0;
186 udelay(1);
187 }
188
189 return -1;
190}
191
Kevin Paul Herbertbde6d302014-12-24 18:43:20 -0800192static void codec_init(struct device *dev, u8 *base, int addr)
Andrew Wub7bb70d2013-08-12 20:07:47 +0800193{
194 u32 reg32;
195 const u32 *verb;
196 u32 verb_size;
197 int i;
198
199 printk(BIOS_DEBUG, "azalia_audio: Initializing codec #%d\n", addr);
200
201 /* 1 */
Angel Pons554713e2020-10-24 23:23:07 +0200202 if (wait_for_ready(base) < 0) {
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200203 printk(BIOS_DEBUG, " codec not ready.\n");
Andrew Wub7bb70d2013-08-12 20:07:47 +0800204 return;
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200205 }
Andrew Wub7bb70d2013-08-12 20:07:47 +0800206
207 reg32 = (addr << 28) | 0x000f0000;
Elyes HAOUASd8c47992020-08-03 15:31:39 +0200208 write32(base + HDA_IC_REG, reg32);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800209
Angel Pons554713e2020-10-24 23:23:07 +0200210 if (wait_for_valid(base) < 0) {
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200211 printk(BIOS_DEBUG, " codec not valid.\n");
Andrew Wub7bb70d2013-08-12 20:07:47 +0800212 return;
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200213 }
Andrew Wub7bb70d2013-08-12 20:07:47 +0800214
215 /* 2 */
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200216 reg32 = read32(base + HDA_IR_REG);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800217 printk(BIOS_DEBUG, "azalia_audio: codec viddid: %08x\n", reg32);
Angel Ponsd425ddd2020-12-05 18:22:58 +0100218 verb_size = azalia_find_verb(cim_verb_data, cim_verb_data_size, reg32, &verb);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800219
220 if (!verb_size) {
221 printk(BIOS_DEBUG, "azalia_audio: No verb!\n");
222 return;
223 }
224 printk(BIOS_DEBUG, "azalia_audio: verb_size: %d\n", verb_size);
225
226 /* 3 */
227 for (i = 0; i < verb_size; i++) {
Angel Pons554713e2020-10-24 23:23:07 +0200228 if (wait_for_ready(base) < 0)
Andrew Wub7bb70d2013-08-12 20:07:47 +0800229 return;
230
Elyes HAOUASd8c47992020-08-03 15:31:39 +0200231 write32(base + HDA_IC_REG, verb[i]);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800232
Angel Pons554713e2020-10-24 23:23:07 +0200233 if (wait_for_valid(base) < 0)
Andrew Wub7bb70d2013-08-12 20:07:47 +0800234 return;
235 }
236 printk(BIOS_DEBUG, "azalia_audio: verb loaded.\n");
237}
238
Kevin Paul Herbertbde6d302014-12-24 18:43:20 -0800239static void codecs_init(struct device *dev, u8 *base, u32 codec_mask)
Andrew Wub7bb70d2013-08-12 20:07:47 +0800240{
241 int i;
242
243 for (i = 2; i >= 0; i--) {
244 if (codec_mask & (1 << i))
245 codec_init(dev, base, i);
246 }
247}
248
249void azalia_audio_init(struct device *dev)
250{
Kevin Paul Herbertbde6d302014-12-24 18:43:20 -0800251 u8 *base;
Andrew Wub7bb70d2013-08-12 20:07:47 +0800252 struct resource *res;
253 u32 codec_mask;
254
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200255 res = find_resource(dev, PCI_BASE_ADDRESS_0);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800256 if (!res)
257 return;
258
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200259 // NOTE this will break as soon as the azalia_audio get's a bar above 4G.
260 // Is there anything we can do about it?
Kevin Paul Herbertbde6d302014-12-24 18:43:20 -0800261 base = res2mmio(res, 0, 0);
262 printk(BIOS_DEBUG, "azalia_audio: base = %p\n", base);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800263 codec_mask = codec_detect(base);
264
265 if (codec_mask) {
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200266 printk(BIOS_DEBUG, "azalia_audio: codec_mask = %02x\n", codec_mask);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800267 codecs_init(dev, base, codec_mask);
268 }
269}
270
Andrew Wub7bb70d2013-08-12 20:07:47 +0800271struct device_operations default_azalia_audio_ops = {
272 .read_resources = pci_dev_read_resources,
273 .set_resources = pci_dev_set_resources,
274 .enable_resources = pci_dev_enable_resources,
275 .init = azalia_audio_init,
Angel Pons1fc0edd2020-05-31 00:03:28 +0200276 .ops_pci = &pci_dev_ops_pci,
Andrew Wub7bb70d2013-08-12 20:07:47 +0800277};