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Angel Ponsc74dae92020-04-02 23:48:16 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Andrew Wub7bb70d2013-08-12 20:07:47 +08002
3#include <console/console.h>
4#include <device/device.h>
5#include <device/pci.h>
Andrew Wub7bb70d2013-08-12 20:07:47 +08006#include <device/azalia_device.h>
Kyösti Mälkki13f66502019-03-03 08:01:05 +02007#include <device/mmio.h>
Andrew Wub7bb70d2013-08-12 20:07:47 +08008#include <delay.h>
9
Angel Pons61dd8362020-12-05 18:02:32 +010010int azalia_set_bits(void *port, u32 mask, u32 val)
Andrew Wub7bb70d2013-08-12 20:07:47 +080011{
12 u32 reg32;
13 int count;
14
15 /* Write (val & mask) to port */
16 val &= mask;
17 reg32 = read32(port);
18 reg32 &= ~mask;
19 reg32 |= val;
20 write32(port, reg32);
21
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +020022 /* Wait for readback of register to match what was just written to it */
Andrew Wub7bb70d2013-08-12 20:07:47 +080023 count = 50;
24 do {
25 /* Wait 1ms based on BKDG wait time */
26 mdelay(1);
27 reg32 = read32(port);
28 reg32 &= mask;
29 } while ((reg32 != val) && --count);
30
31 /* Timeout occurred */
32 if (!count)
33 return -1;
34 return 0;
35}
36
Kevin Paul Herbertbde6d302014-12-24 18:43:20 -080037static int codec_detect(u8 *base)
Andrew Wub7bb70d2013-08-12 20:07:47 +080038{
39 u32 reg32;
40 int count;
41
42 /* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */
Angel Pons61dd8362020-12-05 18:02:32 +010043 if (azalia_set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) < 0)
Andrew Wub7bb70d2013-08-12 20:07:47 +080044 goto no_codec;
45
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +020046 /* clear STATESTS bits (BAR + 0xe)[2:0] */
Elyes HAOUASd8c47992020-08-03 15:31:39 +020047 reg32 = read32(base + HDA_STATESTS_REG);
Andrew Wub7bb70d2013-08-12 20:07:47 +080048 reg32 |= 7;
Elyes HAOUASd8c47992020-08-03 15:31:39 +020049 write32(base + HDA_STATESTS_REG, reg32);
Andrew Wub7bb70d2013-08-12 20:07:47 +080050
51 /* Wait for readback of register to
52 * match what was just written to it
53 */
54 count = 50;
55 do {
56 /* Wait 1ms based on BKDG wait time */
57 mdelay(1);
Elyes HAOUASd8c47992020-08-03 15:31:39 +020058 reg32 = read32(base + HDA_STATESTS_REG);
Andrew Wub7bb70d2013-08-12 20:07:47 +080059 } while ((reg32 != 0) && --count);
Martin Roth2ed0aa22016-01-05 20:58:58 -070060 /* Timeout occurred */
Andrew Wub7bb70d2013-08-12 20:07:47 +080061 if (!count)
62 goto no_codec;
63
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +020064 /* Set Bit 0 to 0 to enter reset state (BAR + 0x8)[0] */
Angel Pons61dd8362020-12-05 18:02:32 +010065 if (azalia_set_bits(base + HDA_GCTL_REG, 1, 0) < 0)
Andrew Wub7bb70d2013-08-12 20:07:47 +080066 goto no_codec;
67
68 /* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */
Angel Pons61dd8362020-12-05 18:02:32 +010069 if (azalia_set_bits(base + HDA_GCTL_REG, 1, HDA_GCTL_CRST) < 0)
Andrew Wub7bb70d2013-08-12 20:07:47 +080070 goto no_codec;
71
72 /* Read in Codec location (BAR + 0xe)[2..0] */
Elyes HAOUASd8c47992020-08-03 15:31:39 +020073 reg32 = read32(base + HDA_STATESTS_REG);
Andrew Wub7bb70d2013-08-12 20:07:47 +080074 reg32 &= 0x0f;
75 if (!reg32)
76 goto no_codec;
77
78 return reg32;
79
80no_codec:
81 /* Codec Not found */
82 /* Put HDA back in reset (BAR + 0x8) [0] */
Angel Pons61dd8362020-12-05 18:02:32 +010083 azalia_set_bits(base + HDA_GCTL_REG, 1, 0);
Andrew Wub7bb70d2013-08-12 20:07:47 +080084 printk(BIOS_DEBUG, "azalia_audio: No codec!\n");
85 return 0;
86}
87
Angel Ponsd425ddd2020-12-05 18:22:58 +010088u32 azalia_find_verb(const u32 *verb_table, u32 verb_table_bytes, u32 viddid, const u32 **verb)
Andrew Wub7bb70d2013-08-12 20:07:47 +080089{
Andrew Wub7bb70d2013-08-12 20:07:47 +080090 int idx = 0;
91
Angel Ponsd425ddd2020-12-05 18:22:58 +010092 while (idx < (verb_table_bytes / sizeof(u32))) {
93 u32 verb_size = 4 * verb_table[idx + 2]; // in u32
94 if (verb_table[idx] != viddid) {
Andrew Wub7bb70d2013-08-12 20:07:47 +080095 idx += verb_size + 3; // skip verb + header
96 continue;
97 }
Angel Ponsd425ddd2020-12-05 18:22:58 +010098 *verb = &verb_table[idx + 3];
Andrew Wub7bb70d2013-08-12 20:07:47 +080099 return verb_size;
100 }
101
102 /* Not all codecs need to load another verb */
103 return 0;
104}
105
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200106/*
107 * Wait 50usec for the codec to indicate it is ready.
108 * No response would imply that the codec is non-operative.
Andrew Wub7bb70d2013-08-12 20:07:47 +0800109 */
110
Kevin Paul Herbertbde6d302014-12-24 18:43:20 -0800111static int wait_for_ready(u8 *base)
Andrew Wub7bb70d2013-08-12 20:07:47 +0800112{
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200113 /* Use a 50 usec timeout - the Linux kernel uses the same duration */
Andrew Wub7bb70d2013-08-12 20:07:47 +0800114 int timeout = 50;
115
116 while (timeout--) {
117 u32 reg32 = read32(base + HDA_ICII_REG);
118 if (!(reg32 & HDA_ICII_BUSY))
119 return 0;
120 udelay(1);
121 }
122
123 return -1;
124}
125
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200126/*
127 * Wait 50usec for the codec to indicate that it accepted the previous command.
128 * No response would imply that the code is non-operative.
Andrew Wub7bb70d2013-08-12 20:07:47 +0800129 */
130
Kevin Paul Herbertbde6d302014-12-24 18:43:20 -0800131static int wait_for_valid(u8 *base)
Andrew Wub7bb70d2013-08-12 20:07:47 +0800132{
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200133 u32 reg32;
134 /* Use a 50 usec timeout - the Linux kernel uses the same duration */
Andrew Wub7bb70d2013-08-12 20:07:47 +0800135 int timeout = 25;
136
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200137 /* Send the verb to the codec */
138 reg32 = read32(base + HDA_ICII_REG);
139 reg32 |= HDA_ICII_BUSY | HDA_ICII_VALID;
140 write32(base + HDA_ICII_REG, reg32);
141
Andrew Wub7bb70d2013-08-12 20:07:47 +0800142 while (timeout--) {
143 udelay(1);
144 }
145 timeout = 50;
146 while (timeout--) {
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200147 reg32 = read32(base + HDA_ICII_REG);
148 if ((reg32 & (HDA_ICII_VALID | HDA_ICII_BUSY)) == HDA_ICII_VALID)
Andrew Wub7bb70d2013-08-12 20:07:47 +0800149 return 0;
150 udelay(1);
151 }
152
153 return -1;
154}
155
Kevin Paul Herbertbde6d302014-12-24 18:43:20 -0800156static void codec_init(struct device *dev, u8 *base, int addr)
Andrew Wub7bb70d2013-08-12 20:07:47 +0800157{
158 u32 reg32;
159 const u32 *verb;
160 u32 verb_size;
161 int i;
162
163 printk(BIOS_DEBUG, "azalia_audio: Initializing codec #%d\n", addr);
164
165 /* 1 */
Angel Pons554713e2020-10-24 23:23:07 +0200166 if (wait_for_ready(base) < 0) {
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200167 printk(BIOS_DEBUG, " codec not ready.\n");
Andrew Wub7bb70d2013-08-12 20:07:47 +0800168 return;
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200169 }
Andrew Wub7bb70d2013-08-12 20:07:47 +0800170
171 reg32 = (addr << 28) | 0x000f0000;
Elyes HAOUASd8c47992020-08-03 15:31:39 +0200172 write32(base + HDA_IC_REG, reg32);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800173
Angel Pons554713e2020-10-24 23:23:07 +0200174 if (wait_for_valid(base) < 0) {
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200175 printk(BIOS_DEBUG, " codec not valid.\n");
Andrew Wub7bb70d2013-08-12 20:07:47 +0800176 return;
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200177 }
Andrew Wub7bb70d2013-08-12 20:07:47 +0800178
179 /* 2 */
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200180 reg32 = read32(base + HDA_IR_REG);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800181 printk(BIOS_DEBUG, "azalia_audio: codec viddid: %08x\n", reg32);
Angel Ponsd425ddd2020-12-05 18:22:58 +0100182 verb_size = azalia_find_verb(cim_verb_data, cim_verb_data_size, reg32, &verb);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800183
184 if (!verb_size) {
185 printk(BIOS_DEBUG, "azalia_audio: No verb!\n");
186 return;
187 }
188 printk(BIOS_DEBUG, "azalia_audio: verb_size: %d\n", verb_size);
189
190 /* 3 */
191 for (i = 0; i < verb_size; i++) {
Angel Pons554713e2020-10-24 23:23:07 +0200192 if (wait_for_ready(base) < 0)
Andrew Wub7bb70d2013-08-12 20:07:47 +0800193 return;
194
Elyes HAOUASd8c47992020-08-03 15:31:39 +0200195 write32(base + HDA_IC_REG, verb[i]);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800196
Angel Pons554713e2020-10-24 23:23:07 +0200197 if (wait_for_valid(base) < 0)
Andrew Wub7bb70d2013-08-12 20:07:47 +0800198 return;
199 }
200 printk(BIOS_DEBUG, "azalia_audio: verb loaded.\n");
201}
202
Kevin Paul Herbertbde6d302014-12-24 18:43:20 -0800203static void codecs_init(struct device *dev, u8 *base, u32 codec_mask)
Andrew Wub7bb70d2013-08-12 20:07:47 +0800204{
205 int i;
206
207 for (i = 2; i >= 0; i--) {
208 if (codec_mask & (1 << i))
209 codec_init(dev, base, i);
210 }
211}
212
213void azalia_audio_init(struct device *dev)
214{
Kevin Paul Herbertbde6d302014-12-24 18:43:20 -0800215 u8 *base;
Andrew Wub7bb70d2013-08-12 20:07:47 +0800216 struct resource *res;
217 u32 codec_mask;
218
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200219 res = find_resource(dev, PCI_BASE_ADDRESS_0);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800220 if (!res)
221 return;
222
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200223 // NOTE this will break as soon as the azalia_audio get's a bar above 4G.
224 // Is there anything we can do about it?
Kevin Paul Herbertbde6d302014-12-24 18:43:20 -0800225 base = res2mmio(res, 0, 0);
226 printk(BIOS_DEBUG, "azalia_audio: base = %p\n", base);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800227 codec_mask = codec_detect(base);
228
229 if (codec_mask) {
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200230 printk(BIOS_DEBUG, "azalia_audio: codec_mask = %02x\n", codec_mask);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800231 codecs_init(dev, base, codec_mask);
232 }
233}
234
Andrew Wub7bb70d2013-08-12 20:07:47 +0800235struct device_operations default_azalia_audio_ops = {
236 .read_resources = pci_dev_read_resources,
237 .set_resources = pci_dev_set_resources,
238 .enable_resources = pci_dev_enable_resources,
239 .init = azalia_audio_init,
Angel Pons1fc0edd2020-05-31 00:03:28 +0200240 .ops_pci = &pci_dev_ops_pci,
Andrew Wub7bb70d2013-08-12 20:07:47 +0800241};