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Angel Ponsc74dae92020-04-02 23:48:16 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Andrew Wub7bb70d2013-08-12 20:07:47 +08002
3#include <console/console.h>
4#include <device/device.h>
5#include <device/pci.h>
Andrew Wub7bb70d2013-08-12 20:07:47 +08006#include <device/azalia_device.h>
Kyösti Mälkki13f66502019-03-03 08:01:05 +02007#include <device/mmio.h>
Andrew Wub7bb70d2013-08-12 20:07:47 +08008#include <delay.h>
9
Angel Pons61dd8362020-12-05 18:02:32 +010010int azalia_set_bits(void *port, u32 mask, u32 val)
Andrew Wub7bb70d2013-08-12 20:07:47 +080011{
12 u32 reg32;
13 int count;
14
15 /* Write (val & mask) to port */
16 val &= mask;
17 reg32 = read32(port);
18 reg32 &= ~mask;
19 reg32 |= val;
20 write32(port, reg32);
21
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +020022 /* Wait for readback of register to match what was just written to it */
Andrew Wub7bb70d2013-08-12 20:07:47 +080023 count = 50;
24 do {
25 /* Wait 1ms based on BKDG wait time */
26 mdelay(1);
27 reg32 = read32(port);
28 reg32 &= mask;
29 } while ((reg32 != val) && --count);
30
31 /* Timeout occurred */
32 if (!count)
33 return -1;
34 return 0;
35}
36
Angel Pons49190282020-12-05 18:52:38 +010037int azalia_enter_reset(u8 *base)
38{
39 /* Set bit 0 to 0 to enter reset state (BAR + 0x8)[0] */
40 return azalia_set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, 0);
41}
42
43int azalia_exit_reset(u8 *base)
44{
45 /* Set bit 0 to 1 to exit reset state (BAR + 0x8)[0] */
46 return azalia_set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, HDA_GCTL_CRST);
47}
48
Kevin Paul Herbertbde6d302014-12-24 18:43:20 -080049static int codec_detect(u8 *base)
Andrew Wub7bb70d2013-08-12 20:07:47 +080050{
51 u32 reg32;
52 int count;
53
Angel Pons7f839f62020-12-05 19:02:14 +010054 if (azalia_exit_reset(base) < 0)
Andrew Wub7bb70d2013-08-12 20:07:47 +080055 goto no_codec;
56
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +020057 /* clear STATESTS bits (BAR + 0xe)[2:0] */
Elyes HAOUASd8c47992020-08-03 15:31:39 +020058 reg32 = read32(base + HDA_STATESTS_REG);
Andrew Wub7bb70d2013-08-12 20:07:47 +080059 reg32 |= 7;
Elyes HAOUASd8c47992020-08-03 15:31:39 +020060 write32(base + HDA_STATESTS_REG, reg32);
Andrew Wub7bb70d2013-08-12 20:07:47 +080061
62 /* Wait for readback of register to
63 * match what was just written to it
64 */
65 count = 50;
66 do {
67 /* Wait 1ms based on BKDG wait time */
68 mdelay(1);
Elyes HAOUASd8c47992020-08-03 15:31:39 +020069 reg32 = read32(base + HDA_STATESTS_REG);
Andrew Wub7bb70d2013-08-12 20:07:47 +080070 } while ((reg32 != 0) && --count);
Martin Roth2ed0aa22016-01-05 20:58:58 -070071 /* Timeout occurred */
Andrew Wub7bb70d2013-08-12 20:07:47 +080072 if (!count)
73 goto no_codec;
74
Angel Pons2e0053b2020-12-05 19:06:55 +010075 if (azalia_enter_reset(base) < 0)
Andrew Wub7bb70d2013-08-12 20:07:47 +080076 goto no_codec;
77
Angel Pons7f839f62020-12-05 19:02:14 +010078 if (azalia_exit_reset(base) < 0)
Andrew Wub7bb70d2013-08-12 20:07:47 +080079 goto no_codec;
80
81 /* Read in Codec location (BAR + 0xe)[2..0] */
Elyes HAOUASd8c47992020-08-03 15:31:39 +020082 reg32 = read32(base + HDA_STATESTS_REG);
Andrew Wub7bb70d2013-08-12 20:07:47 +080083 reg32 &= 0x0f;
84 if (!reg32)
85 goto no_codec;
86
87 return reg32;
88
89no_codec:
90 /* Codec Not found */
91 /* Put HDA back in reset (BAR + 0x8) [0] */
Angel Pons61dd8362020-12-05 18:02:32 +010092 azalia_set_bits(base + HDA_GCTL_REG, 1, 0);
Andrew Wub7bb70d2013-08-12 20:07:47 +080093 printk(BIOS_DEBUG, "azalia_audio: No codec!\n");
94 return 0;
95}
96
Angel Ponsd3f70282020-12-05 18:28:33 +010097/*
98 * Find a specific entry within a verb table
99 *
100 * @param verb_table: verb table data
101 * @param verb_table_bytes: verb table size in bytes
102 * @param viddid: vendor/device to search for
103 * @param verb: pointer to entry within table
104 *
105 * Returns size of the entry within the verb table,
106 * Returns 0 if the entry is not found
107 *
108 * The HDA verb table is composed of dwords. A set of 4 dwords is
109 * grouped together to form a "jack" descriptor.
110 * Bits 31:28 - Codec Address
111 * Bits 27:20 - NID
112 * Bits 19:8 - Verb ID
113 * Bits 7:0 - Payload
114 *
115 * coreboot groups different codec verb tables into a single table
116 * and prefixes each with a specific header consisting of 3
117 * dword entries:
118 * 1 - Codec Vendor/Device ID
119 * 2 - Subsystem ID
120 * 3 - Number of jacks (groups of 4 dwords) for this codec
121 */
Angel Ponsd425ddd2020-12-05 18:22:58 +0100122u32 azalia_find_verb(const u32 *verb_table, u32 verb_table_bytes, u32 viddid, const u32 **verb)
Andrew Wub7bb70d2013-08-12 20:07:47 +0800123{
Andrew Wub7bb70d2013-08-12 20:07:47 +0800124 int idx = 0;
125
Angel Ponsd425ddd2020-12-05 18:22:58 +0100126 while (idx < (verb_table_bytes / sizeof(u32))) {
Angel Ponsf23c6a82020-12-05 18:32:05 +0100127 /* Header contains the number of jacks, aka groups of 4 dwords */
128 u32 verb_size = 4 * verb_table[idx + 2];
Angel Ponsd425ddd2020-12-05 18:22:58 +0100129 if (verb_table[idx] != viddid) {
Andrew Wub7bb70d2013-08-12 20:07:47 +0800130 idx += verb_size + 3; // skip verb + header
131 continue;
132 }
Angel Ponsd425ddd2020-12-05 18:22:58 +0100133 *verb = &verb_table[idx + 3];
Andrew Wub7bb70d2013-08-12 20:07:47 +0800134 return verb_size;
135 }
136
137 /* Not all codecs need to load another verb */
138 return 0;
139}
140
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200141/*
142 * Wait 50usec for the codec to indicate it is ready.
143 * No response would imply that the codec is non-operative.
Andrew Wub7bb70d2013-08-12 20:07:47 +0800144 */
145
Kevin Paul Herbertbde6d302014-12-24 18:43:20 -0800146static int wait_for_ready(u8 *base)
Andrew Wub7bb70d2013-08-12 20:07:47 +0800147{
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200148 /* Use a 50 usec timeout - the Linux kernel uses the same duration */
Andrew Wub7bb70d2013-08-12 20:07:47 +0800149 int timeout = 50;
150
151 while (timeout--) {
152 u32 reg32 = read32(base + HDA_ICII_REG);
153 if (!(reg32 & HDA_ICII_BUSY))
154 return 0;
155 udelay(1);
156 }
157
158 return -1;
159}
160
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200161/*
162 * Wait 50usec for the codec to indicate that it accepted the previous command.
163 * No response would imply that the code is non-operative.
Andrew Wub7bb70d2013-08-12 20:07:47 +0800164 */
165
Kevin Paul Herbertbde6d302014-12-24 18:43:20 -0800166static int wait_for_valid(u8 *base)
Andrew Wub7bb70d2013-08-12 20:07:47 +0800167{
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200168 u32 reg32;
169 /* Use a 50 usec timeout - the Linux kernel uses the same duration */
Andrew Wub7bb70d2013-08-12 20:07:47 +0800170 int timeout = 25;
171
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200172 /* Send the verb to the codec */
173 reg32 = read32(base + HDA_ICII_REG);
174 reg32 |= HDA_ICII_BUSY | HDA_ICII_VALID;
175 write32(base + HDA_ICII_REG, reg32);
176
Frans Hendriksa9caa502021-02-01 11:44:37 +0100177 while (timeout--)
Andrew Wub7bb70d2013-08-12 20:07:47 +0800178 udelay(1);
Frans Hendriksa9caa502021-02-01 11:44:37 +0100179
Andrew Wub7bb70d2013-08-12 20:07:47 +0800180 timeout = 50;
181 while (timeout--) {
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200182 reg32 = read32(base + HDA_ICII_REG);
183 if ((reg32 & (HDA_ICII_VALID | HDA_ICII_BUSY)) == HDA_ICII_VALID)
Andrew Wub7bb70d2013-08-12 20:07:47 +0800184 return 0;
185 udelay(1);
186 }
187
188 return -1;
189}
190
Angel Pons44c431e2021-02-08 12:37:56 +0100191static int azalia_write_verb(u8 *base, u32 verb)
192{
193 if (wait_for_ready(base) < 0)
194 return -1;
195
196 write32(base + HDA_IC_REG, verb);
197
198 return wait_for_valid(base);
199}
200
201int azalia_program_verb_table(u8 *base, const u32 *verbs, u32 verb_size)
202{
203 if (!verbs)
204 return 0;
205
206 for (u32 i = 0; i < verb_size; i++) {
207 if (azalia_write_verb(base, verbs[i]) < 0)
208 return -1;
209 }
210 return 0;
211}
212
Kevin Paul Herbertbde6d302014-12-24 18:43:20 -0800213static void codec_init(struct device *dev, u8 *base, int addr)
Andrew Wub7bb70d2013-08-12 20:07:47 +0800214{
215 u32 reg32;
216 const u32 *verb;
217 u32 verb_size;
Andrew Wub7bb70d2013-08-12 20:07:47 +0800218
219 printk(BIOS_DEBUG, "azalia_audio: Initializing codec #%d\n", addr);
220
221 /* 1 */
Angel Pons554713e2020-10-24 23:23:07 +0200222 if (wait_for_ready(base) < 0) {
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200223 printk(BIOS_DEBUG, " codec not ready.\n");
Andrew Wub7bb70d2013-08-12 20:07:47 +0800224 return;
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200225 }
Andrew Wub7bb70d2013-08-12 20:07:47 +0800226
227 reg32 = (addr << 28) | 0x000f0000;
Elyes HAOUASd8c47992020-08-03 15:31:39 +0200228 write32(base + HDA_IC_REG, reg32);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800229
Angel Pons554713e2020-10-24 23:23:07 +0200230 if (wait_for_valid(base) < 0) {
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200231 printk(BIOS_DEBUG, " codec not valid.\n");
Andrew Wub7bb70d2013-08-12 20:07:47 +0800232 return;
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200233 }
Andrew Wub7bb70d2013-08-12 20:07:47 +0800234
235 /* 2 */
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200236 reg32 = read32(base + HDA_IR_REG);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800237 printk(BIOS_DEBUG, "azalia_audio: codec viddid: %08x\n", reg32);
Angel Ponsd425ddd2020-12-05 18:22:58 +0100238 verb_size = azalia_find_verb(cim_verb_data, cim_verb_data_size, reg32, &verb);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800239
240 if (!verb_size) {
241 printk(BIOS_DEBUG, "azalia_audio: No verb!\n");
242 return;
243 }
Angel Pons2e774432021-02-08 12:40:06 +0100244 printk(BIOS_DEBUG, "azalia_audio: verb_size: %u\n", verb_size);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800245
246 /* 3 */
Angel Pons44c431e2021-02-08 12:37:56 +0100247 azalia_program_verb_table(base, verb, verb_size);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800248 printk(BIOS_DEBUG, "azalia_audio: verb loaded.\n");
249}
250
Kevin Paul Herbertbde6d302014-12-24 18:43:20 -0800251static void codecs_init(struct device *dev, u8 *base, u32 codec_mask)
Andrew Wub7bb70d2013-08-12 20:07:47 +0800252{
253 int i;
254
255 for (i = 2; i >= 0; i--) {
256 if (codec_mask & (1 << i))
257 codec_init(dev, base, i);
258 }
259}
260
261void azalia_audio_init(struct device *dev)
262{
Kevin Paul Herbertbde6d302014-12-24 18:43:20 -0800263 u8 *base;
Andrew Wub7bb70d2013-08-12 20:07:47 +0800264 struct resource *res;
265 u32 codec_mask;
266
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200267 res = find_resource(dev, PCI_BASE_ADDRESS_0);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800268 if (!res)
269 return;
270
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200271 // NOTE this will break as soon as the azalia_audio get's a bar above 4G.
272 // Is there anything we can do about it?
Kevin Paul Herbertbde6d302014-12-24 18:43:20 -0800273 base = res2mmio(res, 0, 0);
274 printk(BIOS_DEBUG, "azalia_audio: base = %p\n", base);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800275 codec_mask = codec_detect(base);
276
277 if (codec_mask) {
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200278 printk(BIOS_DEBUG, "azalia_audio: codec_mask = %02x\n", codec_mask);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800279 codecs_init(dev, base, codec_mask);
280 }
281}
282
Andrew Wub7bb70d2013-08-12 20:07:47 +0800283struct device_operations default_azalia_audio_ops = {
284 .read_resources = pci_dev_read_resources,
285 .set_resources = pci_dev_set_resources,
286 .enable_resources = pci_dev_enable_resources,
287 .init = azalia_audio_init,
Angel Pons1fc0edd2020-05-31 00:03:28 +0200288 .ops_pci = &pci_dev_ops_pci,
Andrew Wub7bb70d2013-08-12 20:07:47 +0800289};