blob: 4ac585dac121bb6909104937a09e157bc7957b95 [file] [log] [blame]
Angel Ponsc74dae92020-04-02 23:48:16 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Andrew Wub7bb70d2013-08-12 20:07:47 +08002
3#include <console/console.h>
4#include <device/device.h>
5#include <device/pci.h>
Andrew Wub7bb70d2013-08-12 20:07:47 +08006#include <device/azalia_device.h>
Kyösti Mälkki13f66502019-03-03 08:01:05 +02007#include <device/mmio.h>
Andrew Wub7bb70d2013-08-12 20:07:47 +08008#include <delay.h>
Patrick Rudolph9f5261e2021-02-16 09:18:07 +01009#include <timer.h>
Andrew Wub7bb70d2013-08-12 20:07:47 +080010
Angel Pons61dd8362020-12-05 18:02:32 +010011int azalia_set_bits(void *port, u32 mask, u32 val)
Andrew Wub7bb70d2013-08-12 20:07:47 +080012{
Patrick Rudolph9f5261e2021-02-16 09:18:07 +010013 struct stopwatch sw;
Andrew Wub7bb70d2013-08-12 20:07:47 +080014 u32 reg32;
Andrew Wub7bb70d2013-08-12 20:07:47 +080015
16 /* Write (val & mask) to port */
17 val &= mask;
18 reg32 = read32(port);
19 reg32 &= ~mask;
20 reg32 |= val;
21 write32(port, reg32);
22
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +020023 /* Wait for readback of register to match what was just written to it */
Patrick Rudolph9f5261e2021-02-16 09:18:07 +010024 stopwatch_init_msecs_expire(&sw, 50);
Andrew Wub7bb70d2013-08-12 20:07:47 +080025 do {
26 /* Wait 1ms based on BKDG wait time */
27 mdelay(1);
28 reg32 = read32(port);
29 reg32 &= mask;
Patrick Rudolph9f5261e2021-02-16 09:18:07 +010030 } while ((reg32 != val) && !stopwatch_expired(&sw));
Andrew Wub7bb70d2013-08-12 20:07:47 +080031
32 /* Timeout occurred */
Patrick Rudolph9f5261e2021-02-16 09:18:07 +010033 if (stopwatch_expired(&sw))
Andrew Wub7bb70d2013-08-12 20:07:47 +080034 return -1;
35 return 0;
36}
37
Angel Pons49190282020-12-05 18:52:38 +010038int azalia_enter_reset(u8 *base)
39{
40 /* Set bit 0 to 0 to enter reset state (BAR + 0x8)[0] */
41 return azalia_set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, 0);
42}
43
44int azalia_exit_reset(u8 *base)
45{
46 /* Set bit 0 to 1 to exit reset state (BAR + 0x8)[0] */
47 return azalia_set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, HDA_GCTL_CRST);
48}
49
Angel Pons6da78662021-03-18 15:43:42 +010050static u16 codec_detect(u8 *base)
Andrew Wub7bb70d2013-08-12 20:07:47 +080051{
Patrick Rudolph9f5261e2021-02-16 09:18:07 +010052 struct stopwatch sw;
Angel Pons6da78662021-03-18 15:43:42 +010053 u16 reg16;
Andrew Wub7bb70d2013-08-12 20:07:47 +080054
Angel Pons7f839f62020-12-05 19:02:14 +010055 if (azalia_exit_reset(base) < 0)
Andrew Wub7bb70d2013-08-12 20:07:47 +080056 goto no_codec;
57
Angel Ponsb922cbb2021-03-22 14:21:28 +010058 if (CONFIG(AZALIA_LOCK_DOWN_R_WO_GCAP)) {
59 /* If GCAP is R/WO, lock it down after deasserting controller reset */
60 write16(base + HDA_GCAP_REG, read16(base + HDA_GCAP_REG));
61 }
62
Elyes Haouasfd93cff2022-02-20 11:09:07 +010063 /* clear STATESTS bits (BAR + 0x0e)[14:0] */
Angel Pons6da78662021-03-18 15:43:42 +010064 reg16 = read16(base + HDA_STATESTS_REG);
Elyes Haouasfd93cff2022-02-20 11:09:07 +010065 reg16 |= 0x7fff;
Angel Pons6da78662021-03-18 15:43:42 +010066 write16(base + HDA_STATESTS_REG, reg16);
Andrew Wub7bb70d2013-08-12 20:07:47 +080067
68 /* Wait for readback of register to
69 * match what was just written to it
70 */
Patrick Rudolph9f5261e2021-02-16 09:18:07 +010071 stopwatch_init_msecs_expire(&sw, 50);
Andrew Wub7bb70d2013-08-12 20:07:47 +080072 do {
73 /* Wait 1ms based on BKDG wait time */
74 mdelay(1);
Angel Pons6da78662021-03-18 15:43:42 +010075 reg16 = read16(base + HDA_STATESTS_REG);
76 } while ((reg16 != 0) && !stopwatch_expired(&sw));
Patrick Rudolph9f5261e2021-02-16 09:18:07 +010077
Martin Roth2ed0aa22016-01-05 20:58:58 -070078 /* Timeout occurred */
Patrick Rudolph9f5261e2021-02-16 09:18:07 +010079 if (stopwatch_expired(&sw))
Andrew Wub7bb70d2013-08-12 20:07:47 +080080 goto no_codec;
81
Angel Pons2e0053b2020-12-05 19:06:55 +010082 if (azalia_enter_reset(base) < 0)
Andrew Wub7bb70d2013-08-12 20:07:47 +080083 goto no_codec;
84
Angel Pons7f839f62020-12-05 19:02:14 +010085 if (azalia_exit_reset(base) < 0)
Andrew Wub7bb70d2013-08-12 20:07:47 +080086 goto no_codec;
87
Elyes Haouasfd93cff2022-02-20 11:09:07 +010088 /* Read in Codec location (BAR + 0x0e)[14:0] */
Angel Pons6da78662021-03-18 15:43:42 +010089 reg16 = read16(base + HDA_STATESTS_REG);
Elyes Haouasfd93cff2022-02-20 11:09:07 +010090 reg16 &= 0x7fff;
Angel Pons6da78662021-03-18 15:43:42 +010091 if (!reg16)
Andrew Wub7bb70d2013-08-12 20:07:47 +080092 goto no_codec;
93
Angel Pons6da78662021-03-18 15:43:42 +010094 return reg16;
Andrew Wub7bb70d2013-08-12 20:07:47 +080095
96no_codec:
97 /* Codec Not found */
98 /* Put HDA back in reset (BAR + 0x8) [0] */
Angel Pons61dd8362020-12-05 18:02:32 +010099 azalia_set_bits(base + HDA_GCTL_REG, 1, 0);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800100 printk(BIOS_DEBUG, "azalia_audio: No codec!\n");
101 return 0;
102}
103
Angel Ponsd3f70282020-12-05 18:28:33 +0100104/*
105 * Find a specific entry within a verb table
106 *
107 * @param verb_table: verb table data
108 * @param verb_table_bytes: verb table size in bytes
109 * @param viddid: vendor/device to search for
110 * @param verb: pointer to entry within table
111 *
112 * Returns size of the entry within the verb table,
113 * Returns 0 if the entry is not found
114 *
115 * The HDA verb table is composed of dwords. A set of 4 dwords is
116 * grouped together to form a "jack" descriptor.
117 * Bits 31:28 - Codec Address
118 * Bits 27:20 - NID
119 * Bits 19:8 - Verb ID
120 * Bits 7:0 - Payload
121 *
122 * coreboot groups different codec verb tables into a single table
123 * and prefixes each with a specific header consisting of 3
124 * dword entries:
125 * 1 - Codec Vendor/Device ID
126 * 2 - Subsystem ID
127 * 3 - Number of jacks (groups of 4 dwords) for this codec
128 */
Angel Ponsd425ddd2020-12-05 18:22:58 +0100129u32 azalia_find_verb(const u32 *verb_table, u32 verb_table_bytes, u32 viddid, const u32 **verb)
Andrew Wub7bb70d2013-08-12 20:07:47 +0800130{
Andrew Wub7bb70d2013-08-12 20:07:47 +0800131 int idx = 0;
132
Angel Ponsd425ddd2020-12-05 18:22:58 +0100133 while (idx < (verb_table_bytes / sizeof(u32))) {
Angel Ponsf23c6a82020-12-05 18:32:05 +0100134 /* Header contains the number of jacks, aka groups of 4 dwords */
135 u32 verb_size = 4 * verb_table[idx + 2];
Angel Ponsd425ddd2020-12-05 18:22:58 +0100136 if (verb_table[idx] != viddid) {
Andrew Wub7bb70d2013-08-12 20:07:47 +0800137 idx += verb_size + 3; // skip verb + header
138 continue;
139 }
Angel Ponsd425ddd2020-12-05 18:22:58 +0100140 *verb = &verb_table[idx + 3];
Andrew Wub7bb70d2013-08-12 20:07:47 +0800141 return verb_size;
142 }
143
144 /* Not all codecs need to load another verb */
145 return 0;
146}
147
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200148/*
149 * Wait 50usec for the codec to indicate it is ready.
150 * No response would imply that the codec is non-operative.
Andrew Wub7bb70d2013-08-12 20:07:47 +0800151 */
152
Kevin Paul Herbertbde6d302014-12-24 18:43:20 -0800153static int wait_for_ready(u8 *base)
Andrew Wub7bb70d2013-08-12 20:07:47 +0800154{
Patrick Rudolph9f5261e2021-02-16 09:18:07 +0100155 struct stopwatch sw;
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200156 /* Use a 50 usec timeout - the Linux kernel uses the same duration */
Patrick Rudolph9f5261e2021-02-16 09:18:07 +0100157 stopwatch_init_usecs_expire(&sw, 50);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800158
Patrick Rudolph9f5261e2021-02-16 09:18:07 +0100159 while (!stopwatch_expired(&sw)) {
Andrew Wub7bb70d2013-08-12 20:07:47 +0800160 u32 reg32 = read32(base + HDA_ICII_REG);
161 if (!(reg32 & HDA_ICII_BUSY))
162 return 0;
163 udelay(1);
164 }
165
166 return -1;
167}
168
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200169/*
Angel Ponsfa1befc2021-03-18 14:12:32 +0100170 * Wait for the codec to indicate that it accepted the previous command.
171 * No response would imply that the codec is non-operative.
Andrew Wub7bb70d2013-08-12 20:07:47 +0800172 */
173
Kevin Paul Herbertbde6d302014-12-24 18:43:20 -0800174static int wait_for_valid(u8 *base)
Andrew Wub7bb70d2013-08-12 20:07:47 +0800175{
Patrick Rudolph9f5261e2021-02-16 09:18:07 +0100176 struct stopwatch sw;
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200177 u32 reg32;
Andrew Wub7bb70d2013-08-12 20:07:47 +0800178
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200179 /* Send the verb to the codec */
180 reg32 = read32(base + HDA_ICII_REG);
181 reg32 |= HDA_ICII_BUSY | HDA_ICII_VALID;
182 write32(base + HDA_ICII_REG, reg32);
183
Angel Ponsfa1befc2021-03-18 14:12:32 +0100184 /*
185 * The timeout is never reached when the codec is functioning properly.
186 * Using a small timeout value can result in spurious errors with some
187 * codecs, e.g. a codec that is slow to respond but operates correctly.
188 * When a codec is non-operative, the timeout is only reached once per
189 * verb table, thus the impact on booting time is relatively small. So,
190 * use a reasonably long enough timeout to cover all possible cases.
191 */
192 stopwatch_init_msecs_expire(&sw, 1);
Patrick Rudolph9f5261e2021-02-16 09:18:07 +0100193 while (!stopwatch_expired(&sw)) {
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200194 reg32 = read32(base + HDA_ICII_REG);
195 if ((reg32 & (HDA_ICII_VALID | HDA_ICII_BUSY)) == HDA_ICII_VALID)
Andrew Wub7bb70d2013-08-12 20:07:47 +0800196 return 0;
197 udelay(1);
198 }
199
200 return -1;
201}
202
Angel Pons44c431e2021-02-08 12:37:56 +0100203static int azalia_write_verb(u8 *base, u32 verb)
204{
205 if (wait_for_ready(base) < 0)
206 return -1;
207
208 write32(base + HDA_IC_REG, verb);
209
210 return wait_for_valid(base);
211}
212
213int azalia_program_verb_table(u8 *base, const u32 *verbs, u32 verb_size)
214{
215 if (!verbs)
216 return 0;
217
218 for (u32 i = 0; i < verb_size; i++) {
219 if (azalia_write_verb(base, verbs[i]) < 0)
220 return -1;
221 }
222 return 0;
223}
224
Angel Ponsd6d71ce2021-02-08 12:47:29 +0100225__weak void mainboard_azalia_program_runtime_verbs(u8 *base, u32 viddid)
226{
227}
228
Angel Pons86dfd3c2021-11-10 17:58:12 +0100229void azalia_codec_init(u8 *base, int addr, const u32 *verb_table, u32 verb_table_bytes)
Andrew Wub7bb70d2013-08-12 20:07:47 +0800230{
231 u32 reg32;
232 const u32 *verb;
233 u32 verb_size;
Andrew Wub7bb70d2013-08-12 20:07:47 +0800234
235 printk(BIOS_DEBUG, "azalia_audio: Initializing codec #%d\n", addr);
236
237 /* 1 */
Angel Pons554713e2020-10-24 23:23:07 +0200238 if (wait_for_ready(base) < 0) {
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200239 printk(BIOS_DEBUG, " codec not ready.\n");
Andrew Wub7bb70d2013-08-12 20:07:47 +0800240 return;
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200241 }
Andrew Wub7bb70d2013-08-12 20:07:47 +0800242
243 reg32 = (addr << 28) | 0x000f0000;
Elyes HAOUASd8c47992020-08-03 15:31:39 +0200244 write32(base + HDA_IC_REG, reg32);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800245
Angel Pons554713e2020-10-24 23:23:07 +0200246 if (wait_for_valid(base) < 0) {
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200247 printk(BIOS_DEBUG, " codec not valid.\n");
Andrew Wub7bb70d2013-08-12 20:07:47 +0800248 return;
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200249 }
Andrew Wub7bb70d2013-08-12 20:07:47 +0800250
251 /* 2 */
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200252 reg32 = read32(base + HDA_IR_REG);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800253 printk(BIOS_DEBUG, "azalia_audio: codec viddid: %08x\n", reg32);
Angel Pons86dfd3c2021-11-10 17:58:12 +0100254 verb_size = azalia_find_verb(verb_table, verb_table_bytes, reg32, &verb);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800255
256 if (!verb_size) {
257 printk(BIOS_DEBUG, "azalia_audio: No verb!\n");
258 return;
259 }
Angel Pons2e774432021-02-08 12:40:06 +0100260 printk(BIOS_DEBUG, "azalia_audio: verb_size: %u\n", verb_size);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800261
262 /* 3 */
Angel Pons1297b9c2021-11-10 17:47:22 +0100263 const int rc = azalia_program_verb_table(base, verb, verb_size);
264 if (rc < 0)
265 printk(BIOS_DEBUG, "azalia_audio: verb not loaded.\n");
266 else
267 printk(BIOS_DEBUG, "azalia_audio: verb loaded.\n");
Angel Ponsd6d71ce2021-02-08 12:47:29 +0100268
269 mainboard_azalia_program_runtime_verbs(base, reg32);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800270}
271
Angel Ponsaae6b552021-11-10 18:10:38 +0100272void azalia_codecs_init(u8 *base, u16 codec_mask)
Andrew Wub7bb70d2013-08-12 20:07:47 +0800273{
274 int i;
275
Elyes Haouasfd93cff2022-02-20 11:09:07 +0100276 for (i = 14; i >= 0; i--) {
Andrew Wub7bb70d2013-08-12 20:07:47 +0800277 if (codec_mask & (1 << i))
Angel Pons86dfd3c2021-11-10 17:58:12 +0100278 azalia_codec_init(base, i, cim_verb_data, cim_verb_data_size);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800279 }
Patrick Rudolph1834fbb2021-02-16 10:03:07 +0100280
281 azalia_program_verb_table(base, pc_beep_verbs, pc_beep_verbs_size);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800282}
283
284void azalia_audio_init(struct device *dev)
285{
Kevin Paul Herbertbde6d302014-12-24 18:43:20 -0800286 u8 *base;
Andrew Wub7bb70d2013-08-12 20:07:47 +0800287 struct resource *res;
Angel Pons6da78662021-03-18 15:43:42 +0100288 u16 codec_mask;
Andrew Wub7bb70d2013-08-12 20:07:47 +0800289
Angel Pons32d09be2021-11-03 13:27:45 +0100290 res = probe_resource(dev, PCI_BASE_ADDRESS_0);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800291 if (!res)
292 return;
293
Martin Roth0949e732021-10-01 14:28:22 -0600294 // NOTE this will break as soon as the azalia_audio gets a bar above 4G.
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200295 // Is there anything we can do about it?
Kevin Paul Herbertbde6d302014-12-24 18:43:20 -0800296 base = res2mmio(res, 0, 0);
297 printk(BIOS_DEBUG, "azalia_audio: base = %p\n", base);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800298 codec_mask = codec_detect(base);
299
300 if (codec_mask) {
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200301 printk(BIOS_DEBUG, "azalia_audio: codec_mask = %02x\n", codec_mask);
Angel Ponsaae6b552021-11-10 18:10:38 +0100302 azalia_codecs_init(base, codec_mask);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800303 }
304}
305
Andrew Wub7bb70d2013-08-12 20:07:47 +0800306struct device_operations default_azalia_audio_ops = {
307 .read_resources = pci_dev_read_resources,
308 .set_resources = pci_dev_set_resources,
309 .enable_resources = pci_dev_enable_resources,
310 .init = azalia_audio_init,
Angel Pons1fc0edd2020-05-31 00:03:28 +0200311 .ops_pci = &pci_dev_ops_pci,
Andrew Wub7bb70d2013-08-12 20:07:47 +0800312};