blob: 013a49a2c07b01a085e938f5e9a206ecaab14e05 [file] [log] [blame]
Angel Ponsc74dae92020-04-02 23:48:16 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Andrew Wub7bb70d2013-08-12 20:07:47 +08002
3#include <console/console.h>
4#include <device/device.h>
5#include <device/pci.h>
Andrew Wub7bb70d2013-08-12 20:07:47 +08006#include <device/azalia_device.h>
Kyösti Mälkki13f66502019-03-03 08:01:05 +02007#include <device/mmio.h>
Andrew Wub7bb70d2013-08-12 20:07:47 +08008#include <delay.h>
Patrick Rudolph9f5261e2021-02-16 09:18:07 +01009#include <timer.h>
Andrew Wub7bb70d2013-08-12 20:07:47 +080010
Angel Pons61dd8362020-12-05 18:02:32 +010011int azalia_set_bits(void *port, u32 mask, u32 val)
Andrew Wub7bb70d2013-08-12 20:07:47 +080012{
Patrick Rudolph9f5261e2021-02-16 09:18:07 +010013 struct stopwatch sw;
Andrew Wub7bb70d2013-08-12 20:07:47 +080014 u32 reg32;
Andrew Wub7bb70d2013-08-12 20:07:47 +080015
16 /* Write (val & mask) to port */
17 val &= mask;
18 reg32 = read32(port);
19 reg32 &= ~mask;
20 reg32 |= val;
21 write32(port, reg32);
22
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +020023 /* Wait for readback of register to match what was just written to it */
Patrick Rudolph9f5261e2021-02-16 09:18:07 +010024 stopwatch_init_msecs_expire(&sw, 50);
Andrew Wub7bb70d2013-08-12 20:07:47 +080025 do {
26 /* Wait 1ms based on BKDG wait time */
27 mdelay(1);
28 reg32 = read32(port);
29 reg32 &= mask;
Patrick Rudolph9f5261e2021-02-16 09:18:07 +010030 } while ((reg32 != val) && !stopwatch_expired(&sw));
Andrew Wub7bb70d2013-08-12 20:07:47 +080031
32 /* Timeout occurred */
Patrick Rudolph9f5261e2021-02-16 09:18:07 +010033 if (stopwatch_expired(&sw))
Andrew Wub7bb70d2013-08-12 20:07:47 +080034 return -1;
35 return 0;
36}
37
Angel Pons49190282020-12-05 18:52:38 +010038int azalia_enter_reset(u8 *base)
39{
40 /* Set bit 0 to 0 to enter reset state (BAR + 0x8)[0] */
41 return azalia_set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, 0);
42}
43
44int azalia_exit_reset(u8 *base)
45{
46 /* Set bit 0 to 1 to exit reset state (BAR + 0x8)[0] */
47 return azalia_set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, HDA_GCTL_CRST);
48}
49
Angel Pons6da78662021-03-18 15:43:42 +010050static u16 codec_detect(u8 *base)
Andrew Wub7bb70d2013-08-12 20:07:47 +080051{
Patrick Rudolph9f5261e2021-02-16 09:18:07 +010052 struct stopwatch sw;
Angel Pons5d31dfa2021-03-18 16:00:14 +010053 const u16 codec_mask = (1 << CONFIG_AZALIA_MAX_CODECS) - 1;
Angel Pons6da78662021-03-18 15:43:42 +010054 u16 reg16;
Andrew Wub7bb70d2013-08-12 20:07:47 +080055
Angel Pons7f839f62020-12-05 19:02:14 +010056 if (azalia_exit_reset(base) < 0)
Andrew Wub7bb70d2013-08-12 20:07:47 +080057 goto no_codec;
58
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +020059 /* clear STATESTS bits (BAR + 0xe)[2:0] */
Angel Pons6da78662021-03-18 15:43:42 +010060 reg16 = read16(base + HDA_STATESTS_REG);
Angel Pons5d31dfa2021-03-18 16:00:14 +010061 reg16 |= codec_mask;
Angel Pons6da78662021-03-18 15:43:42 +010062 write16(base + HDA_STATESTS_REG, reg16);
Andrew Wub7bb70d2013-08-12 20:07:47 +080063
64 /* Wait for readback of register to
65 * match what was just written to it
66 */
Patrick Rudolph9f5261e2021-02-16 09:18:07 +010067 stopwatch_init_msecs_expire(&sw, 50);
Andrew Wub7bb70d2013-08-12 20:07:47 +080068 do {
69 /* Wait 1ms based on BKDG wait time */
70 mdelay(1);
Angel Pons6da78662021-03-18 15:43:42 +010071 reg16 = read16(base + HDA_STATESTS_REG);
72 } while ((reg16 != 0) && !stopwatch_expired(&sw));
Patrick Rudolph9f5261e2021-02-16 09:18:07 +010073
Martin Roth2ed0aa22016-01-05 20:58:58 -070074 /* Timeout occurred */
Patrick Rudolph9f5261e2021-02-16 09:18:07 +010075 if (stopwatch_expired(&sw))
Andrew Wub7bb70d2013-08-12 20:07:47 +080076 goto no_codec;
77
Angel Pons2e0053b2020-12-05 19:06:55 +010078 if (azalia_enter_reset(base) < 0)
Andrew Wub7bb70d2013-08-12 20:07:47 +080079 goto no_codec;
80
Angel Pons7f839f62020-12-05 19:02:14 +010081 if (azalia_exit_reset(base) < 0)
Andrew Wub7bb70d2013-08-12 20:07:47 +080082 goto no_codec;
83
84 /* Read in Codec location (BAR + 0xe)[2..0] */
Angel Pons6da78662021-03-18 15:43:42 +010085 reg16 = read16(base + HDA_STATESTS_REG);
Angel Pons5d31dfa2021-03-18 16:00:14 +010086 reg16 &= codec_mask;
Angel Pons6da78662021-03-18 15:43:42 +010087 if (!reg16)
Andrew Wub7bb70d2013-08-12 20:07:47 +080088 goto no_codec;
89
Angel Pons6da78662021-03-18 15:43:42 +010090 return reg16;
Andrew Wub7bb70d2013-08-12 20:07:47 +080091
92no_codec:
93 /* Codec Not found */
94 /* Put HDA back in reset (BAR + 0x8) [0] */
Angel Pons61dd8362020-12-05 18:02:32 +010095 azalia_set_bits(base + HDA_GCTL_REG, 1, 0);
Andrew Wub7bb70d2013-08-12 20:07:47 +080096 printk(BIOS_DEBUG, "azalia_audio: No codec!\n");
97 return 0;
98}
99
Angel Ponsd3f70282020-12-05 18:28:33 +0100100/*
101 * Find a specific entry within a verb table
102 *
103 * @param verb_table: verb table data
104 * @param verb_table_bytes: verb table size in bytes
105 * @param viddid: vendor/device to search for
106 * @param verb: pointer to entry within table
107 *
108 * Returns size of the entry within the verb table,
109 * Returns 0 if the entry is not found
110 *
111 * The HDA verb table is composed of dwords. A set of 4 dwords is
112 * grouped together to form a "jack" descriptor.
113 * Bits 31:28 - Codec Address
114 * Bits 27:20 - NID
115 * Bits 19:8 - Verb ID
116 * Bits 7:0 - Payload
117 *
118 * coreboot groups different codec verb tables into a single table
119 * and prefixes each with a specific header consisting of 3
120 * dword entries:
121 * 1 - Codec Vendor/Device ID
122 * 2 - Subsystem ID
123 * 3 - Number of jacks (groups of 4 dwords) for this codec
124 */
Angel Ponsd425ddd2020-12-05 18:22:58 +0100125u32 azalia_find_verb(const u32 *verb_table, u32 verb_table_bytes, u32 viddid, const u32 **verb)
Andrew Wub7bb70d2013-08-12 20:07:47 +0800126{
Andrew Wub7bb70d2013-08-12 20:07:47 +0800127 int idx = 0;
128
Angel Ponsd425ddd2020-12-05 18:22:58 +0100129 while (idx < (verb_table_bytes / sizeof(u32))) {
Angel Ponsf23c6a82020-12-05 18:32:05 +0100130 /* Header contains the number of jacks, aka groups of 4 dwords */
131 u32 verb_size = 4 * verb_table[idx + 2];
Angel Ponsd425ddd2020-12-05 18:22:58 +0100132 if (verb_table[idx] != viddid) {
Andrew Wub7bb70d2013-08-12 20:07:47 +0800133 idx += verb_size + 3; // skip verb + header
134 continue;
135 }
Angel Ponsd425ddd2020-12-05 18:22:58 +0100136 *verb = &verb_table[idx + 3];
Andrew Wub7bb70d2013-08-12 20:07:47 +0800137 return verb_size;
138 }
139
140 /* Not all codecs need to load another verb */
141 return 0;
142}
143
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200144/*
145 * Wait 50usec for the codec to indicate it is ready.
146 * No response would imply that the codec is non-operative.
Andrew Wub7bb70d2013-08-12 20:07:47 +0800147 */
148
Kevin Paul Herbertbde6d302014-12-24 18:43:20 -0800149static int wait_for_ready(u8 *base)
Andrew Wub7bb70d2013-08-12 20:07:47 +0800150{
Patrick Rudolph9f5261e2021-02-16 09:18:07 +0100151 struct stopwatch sw;
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200152 /* Use a 50 usec timeout - the Linux kernel uses the same duration */
Patrick Rudolph9f5261e2021-02-16 09:18:07 +0100153 stopwatch_init_usecs_expire(&sw, 50);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800154
Patrick Rudolph9f5261e2021-02-16 09:18:07 +0100155 while (!stopwatch_expired(&sw)) {
Andrew Wub7bb70d2013-08-12 20:07:47 +0800156 u32 reg32 = read32(base + HDA_ICII_REG);
157 if (!(reg32 & HDA_ICII_BUSY))
158 return 0;
159 udelay(1);
160 }
161
162 return -1;
163}
164
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200165/*
Angel Ponsfa1befc2021-03-18 14:12:32 +0100166 * Wait for the codec to indicate that it accepted the previous command.
167 * No response would imply that the codec is non-operative.
Andrew Wub7bb70d2013-08-12 20:07:47 +0800168 */
169
Kevin Paul Herbertbde6d302014-12-24 18:43:20 -0800170static int wait_for_valid(u8 *base)
Andrew Wub7bb70d2013-08-12 20:07:47 +0800171{
Patrick Rudolph9f5261e2021-02-16 09:18:07 +0100172 struct stopwatch sw;
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200173 u32 reg32;
Andrew Wub7bb70d2013-08-12 20:07:47 +0800174
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200175 /* Send the verb to the codec */
176 reg32 = read32(base + HDA_ICII_REG);
177 reg32 |= HDA_ICII_BUSY | HDA_ICII_VALID;
178 write32(base + HDA_ICII_REG, reg32);
179
Angel Ponsfa1befc2021-03-18 14:12:32 +0100180 /*
181 * The timeout is never reached when the codec is functioning properly.
182 * Using a small timeout value can result in spurious errors with some
183 * codecs, e.g. a codec that is slow to respond but operates correctly.
184 * When a codec is non-operative, the timeout is only reached once per
185 * verb table, thus the impact on booting time is relatively small. So,
186 * use a reasonably long enough timeout to cover all possible cases.
187 */
188 stopwatch_init_msecs_expire(&sw, 1);
Patrick Rudolph9f5261e2021-02-16 09:18:07 +0100189 while (!stopwatch_expired(&sw)) {
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200190 reg32 = read32(base + HDA_ICII_REG);
191 if ((reg32 & (HDA_ICII_VALID | HDA_ICII_BUSY)) == HDA_ICII_VALID)
Andrew Wub7bb70d2013-08-12 20:07:47 +0800192 return 0;
193 udelay(1);
194 }
195
196 return -1;
197}
198
Angel Pons44c431e2021-02-08 12:37:56 +0100199static int azalia_write_verb(u8 *base, u32 verb)
200{
201 if (wait_for_ready(base) < 0)
202 return -1;
203
204 write32(base + HDA_IC_REG, verb);
205
206 return wait_for_valid(base);
207}
208
209int azalia_program_verb_table(u8 *base, const u32 *verbs, u32 verb_size)
210{
211 if (!verbs)
212 return 0;
213
214 for (u32 i = 0; i < verb_size; i++) {
215 if (azalia_write_verb(base, verbs[i]) < 0)
216 return -1;
217 }
218 return 0;
219}
220
Angel Ponsd6d71ce2021-02-08 12:47:29 +0100221__weak void mainboard_azalia_program_runtime_verbs(u8 *base, u32 viddid)
222{
223}
224
Kevin Paul Herbertbde6d302014-12-24 18:43:20 -0800225static void codec_init(struct device *dev, u8 *base, int addr)
Andrew Wub7bb70d2013-08-12 20:07:47 +0800226{
227 u32 reg32;
228 const u32 *verb;
229 u32 verb_size;
Andrew Wub7bb70d2013-08-12 20:07:47 +0800230
231 printk(BIOS_DEBUG, "azalia_audio: Initializing codec #%d\n", addr);
232
233 /* 1 */
Angel Pons554713e2020-10-24 23:23:07 +0200234 if (wait_for_ready(base) < 0) {
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200235 printk(BIOS_DEBUG, " codec not ready.\n");
Andrew Wub7bb70d2013-08-12 20:07:47 +0800236 return;
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200237 }
Andrew Wub7bb70d2013-08-12 20:07:47 +0800238
239 reg32 = (addr << 28) | 0x000f0000;
Elyes HAOUASd8c47992020-08-03 15:31:39 +0200240 write32(base + HDA_IC_REG, reg32);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800241
Angel Pons554713e2020-10-24 23:23:07 +0200242 if (wait_for_valid(base) < 0) {
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200243 printk(BIOS_DEBUG, " codec not valid.\n");
Andrew Wub7bb70d2013-08-12 20:07:47 +0800244 return;
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200245 }
Andrew Wub7bb70d2013-08-12 20:07:47 +0800246
247 /* 2 */
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200248 reg32 = read32(base + HDA_IR_REG);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800249 printk(BIOS_DEBUG, "azalia_audio: codec viddid: %08x\n", reg32);
Angel Ponsd425ddd2020-12-05 18:22:58 +0100250 verb_size = azalia_find_verb(cim_verb_data, cim_verb_data_size, reg32, &verb);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800251
252 if (!verb_size) {
253 printk(BIOS_DEBUG, "azalia_audio: No verb!\n");
254 return;
255 }
Angel Pons2e774432021-02-08 12:40:06 +0100256 printk(BIOS_DEBUG, "azalia_audio: verb_size: %u\n", verb_size);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800257
258 /* 3 */
Angel Pons44c431e2021-02-08 12:37:56 +0100259 azalia_program_verb_table(base, verb, verb_size);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800260 printk(BIOS_DEBUG, "azalia_audio: verb loaded.\n");
Angel Ponsd6d71ce2021-02-08 12:47:29 +0100261
262 mainboard_azalia_program_runtime_verbs(base, reg32);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800263}
264
Angel Pons6da78662021-03-18 15:43:42 +0100265static void codecs_init(struct device *dev, u8 *base, u16 codec_mask)
Andrew Wub7bb70d2013-08-12 20:07:47 +0800266{
267 int i;
268
Angel Pons5d31dfa2021-03-18 16:00:14 +0100269 for (i = CONFIG_AZALIA_MAX_CODECS - 1; i >= 0; i--) {
Andrew Wub7bb70d2013-08-12 20:07:47 +0800270 if (codec_mask & (1 << i))
271 codec_init(dev, base, i);
272 }
Patrick Rudolph1834fbb2021-02-16 10:03:07 +0100273
274 azalia_program_verb_table(base, pc_beep_verbs, pc_beep_verbs_size);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800275}
276
277void azalia_audio_init(struct device *dev)
278{
Kevin Paul Herbertbde6d302014-12-24 18:43:20 -0800279 u8 *base;
Andrew Wub7bb70d2013-08-12 20:07:47 +0800280 struct resource *res;
Angel Pons6da78662021-03-18 15:43:42 +0100281 u16 codec_mask;
Andrew Wub7bb70d2013-08-12 20:07:47 +0800282
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200283 res = find_resource(dev, PCI_BASE_ADDRESS_0);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800284 if (!res)
285 return;
286
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200287 // NOTE this will break as soon as the azalia_audio get's a bar above 4G.
288 // Is there anything we can do about it?
Kevin Paul Herbertbde6d302014-12-24 18:43:20 -0800289 base = res2mmio(res, 0, 0);
290 printk(BIOS_DEBUG, "azalia_audio: base = %p\n", base);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800291 codec_mask = codec_detect(base);
292
293 if (codec_mask) {
Elyes HAOUAS6ea24ff2020-08-11 09:21:24 +0200294 printk(BIOS_DEBUG, "azalia_audio: codec_mask = %02x\n", codec_mask);
Andrew Wub7bb70d2013-08-12 20:07:47 +0800295 codecs_init(dev, base, codec_mask);
296 }
297}
298
Andrew Wub7bb70d2013-08-12 20:07:47 +0800299struct device_operations default_azalia_audio_ops = {
300 .read_resources = pci_dev_read_resources,
301 .set_resources = pci_dev_set_resources,
302 .enable_resources = pci_dev_enable_resources,
303 .init = azalia_audio_init,
Angel Pons1fc0edd2020-05-31 00:03:28 +0200304 .ops_pci = &pci_dev_ops_pci,
Andrew Wub7bb70d2013-08-12 20:07:47 +0800305};