Blame - src/southbridge/amd/pi/hudson/Kconfig - coreboot

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Elyes HAOUAS	8741510	2020-05-07 11:49:08 +0200	[diff] [blame]	1	# SPDX-License-Identifier: GPL-2.0-only
Kyösti Mälkki	e8b4da2	2014-10-21 18:22:32 +0300	[diff] [blame]	2
				3	config SOUTHBRIDGE_AMD_PI_AVALON
				4	bool
Kyösti Mälkki	e8b4da2	2014-10-21 18:22:32 +0300	[diff] [blame]	5
WANG Siyuan	f2dfef0	2015-05-20 14:41:01 +0800	[diff] [blame]	6	config SOUTHBRIDGE_AMD_PI_KERN
				7	bool
WANG Siyuan	f2dfef0	2015-05-20 14:41:01 +0800	[diff] [blame]	8
Felix Held	70d1c72	2021-04-09 22:22:09 +0200	[diff] [blame]	9	if SOUTHBRIDGE_AMD_PI_AVALON \|\| SOUTHBRIDGE_AMD_PI_KERN
Kyösti Mälkki	e8b4da2	2014-10-21 18:22:32 +0300	[diff] [blame]	10
Elyes HAOUAS	00b5f53	2021-02-01 09:45:08 +0100	[diff] [blame]	11	config SOUTHBRIDGE_SPECIFIC_OPTIONS
Nico Huber	f418105	2018-10-07 13:25:59 +0200	[diff] [blame]	12	def_bool y
Kyösti Mälkki	3454367	2023-04-08 23:07:57 +0300	[diff] [blame^]	13	select ACPI_COMMON_MADT_IOAPIC
Kyösti Mälkki	69a1396	2023-04-08 14:10:48 +0300	[diff] [blame]	14	select ACPI_COMMON_MADT_LAPIC
Kyösti Mälkki	3454367	2023-04-08 23:07:57 +0300	[diff] [blame^]	15	select ACPI_CUSTOM_MADT
Nico Huber	f418105	2018-10-07 13:25:59 +0200	[diff] [blame]	16	select HAVE_USBDEBUG_OPTIONS
				17	select HAVE_CF9_RESET
				18	select HAVE_CF9_RESET_PREPARE
Michał Żygowski	f3db2ae	2019-11-24 13:26:10 +0100	[diff] [blame]	19	select SOC_AMD_COMMON
Michał Żygowski	f3db2ae	2019-11-24 13:26:10 +0100	[diff] [blame]	20	select SOC_AMD_COMMON_BLOCK_ACPIMMIO
Felix Held	3136424	2021-07-23 19:18:02 +0200	[diff] [blame]	21	select SOC_AMD_COMMON_BLOCK_ACPIMMIO_BIOSRAM
Kyösti Mälkki	b8cb142	2020-06-23 21:36:14 +0300	[diff] [blame]	22	select SOC_AMD_COMMON_BLOCK_BANKED_GPIOS
Felix Held	4b02769	2021-08-03 20:09:54 +0200	[diff] [blame]	23	select SOC_AMD_COMMON_BLOCK_BANKED_GPIOS_NON_SOC_CODEBASE
Felix Held	21cdf0d	2020-11-23 16:24:29 +0100	[diff] [blame]	24	select SOC_AMD_COMMON_BLOCK_PCI_MMCONF
Nico Huber	f418105	2018-10-07 13:25:59 +0200	[diff] [blame]	25
Kyösti Mälkki	e8b4da2	2014-10-21 18:22:32 +0300	[diff] [blame]	26	config EHCI_BAR
				27	hex
				28	default 0xfef00000
				29
				30	config HUDSON_XHCI_ENABLE
				31	bool "Enable Hudson XHCI Controller"
				32	default y
				33	help
				34	The XHCI controller must be enabled and the XHCI firmware
				35	must be added in order to have USB 3.0 support configured
				36	by coreboot. The OS will be responsible for enabling the XHCI
Jonathan Neuschäfer	45e6c82	2018-12-11 17:53:07 +0100	[diff] [blame]	37	controller if the XHCI firmware is available but the
Kyösti Mälkki	e8b4da2	2014-10-21 18:22:32 +0300	[diff] [blame]	38	XHCI controller is not enabled by coreboot.
				39
				40	config HUDSON_XHCI_FWM
				41	bool "Add xhci firmware"
				42	default y
				43	help
				44	Add Hudson 2/3/4 XHCI Firmware to support the onboard USB 3.0
				45
Mike Banon	7515cd0	2019-01-09 02:37:07 +0300	[diff] [blame]	46	config HUDSON_IMC_ENABLE
				47	bool
				48	default n
				49
Kyösti Mälkki	e8b4da2	2014-10-21 18:22:32 +0300	[diff] [blame]	50	config HUDSON_IMC_FWM
				51	bool "Add IMC firmware"
Mike Banon	7515cd0	2019-01-09 02:37:07 +0300	[diff] [blame]	52	depends on HUDSON_IMC_ENABLE
Kyösti Mälkki	e8b4da2	2014-10-21 18:22:32 +0300	[diff] [blame]	53	default y
Dave Frodin	fedd8e3	2015-01-21 07:26:26 -0700	[diff] [blame]	54	help
Kyösti Mälkki	e8b4da2	2014-10-21 18:22:32 +0300	[diff] [blame]	55	Add Hudson 2/3/4 IMC Firmware to support the onboard fan control
				56
				57	config HUDSON_GEC_FWM
				58	bool
				59	default n
Dave Frodin	fedd8e3	2015-01-21 07:26:26 -0700	[diff] [blame]	60	help
Kyösti Mälkki	e8b4da2	2014-10-21 18:22:32 +0300	[diff] [blame]	61	Add Hudson 2/3/4 GEC Firmware to support the onboard gigabit Ethernet MAC.
				62	Must be connected to a Broadcom B50610 or B50610M PHY on the motherboard.
				63
				64	config HUDSON_PSP
				65	bool
Martin Roth	c681a82	2020-11-16 17:19:17 -0700	[diff] [blame]	66	default y if CPU_AMD_PI_00730F01
Kyösti Mälkki	e8b4da2	2014-10-21 18:22:32 +0300	[diff] [blame]	67
Zheng Bao	c5e28ab	2020-10-28 11:38:09 +0800	[diff] [blame]	68	config AMDFW_CONFIG_FILE
				69	string "AMD PSP Firmware config file"
				70	default "src/southbridge/amd/pi/hudson/fw_avl.cfg" if CPU_AMD_PI_00730F01
				71
Kyösti Mälkki	e8b4da2	2014-10-21 18:22:32 +0300	[diff] [blame]	72	config HUDSON_XHCI_FWM_FILE
Dave Frodin	fedd8e3	2015-01-21 07:26:26 -0700	[diff] [blame]	73	string "XHCI firmware path and filename"
Patrick Georgi	26e24cc	2015-05-05 22:27:25 +0200	[diff] [blame]	74	default "3rdparty/blobs/southbridge/amd/avalon/xhci.bin" if SOUTHBRIDGE_AMD_PI_AVALON
WANG Siyuan	f2dfef0	2015-05-20 14:41:01 +0800	[diff] [blame]	75	default "3rdparty/blobs/southbridge/amd/kern/xhci.bin" if SOUTHBRIDGE_AMD_PI_KERN
Kyösti Mälkki	e8b4da2	2014-10-21 18:22:32 +0300	[diff] [blame]	76	depends on HUDSON_XHCI_FWM
				77
				78	config HUDSON_IMC_FWM_FILE
Dave Frodin	fedd8e3	2015-01-21 07:26:26 -0700	[diff] [blame]	79	string "IMC firmware path and filename"
Patrick Georgi	26e24cc	2015-05-05 22:27:25 +0200	[diff] [blame]	80	default "3rdparty/blobs/southbridge/amd/avalon/imc.bin" if SOUTHBRIDGE_AMD_PI_AVALON
WANG Siyuan	f2dfef0	2015-05-20 14:41:01 +0800	[diff] [blame]	81	default "3rdparty/blobs/southbridge/amd/kern/imc.bin" if SOUTHBRIDGE_AMD_PI_KERN
Kyösti Mälkki	e8b4da2	2014-10-21 18:22:32 +0300	[diff] [blame]	82	depends on HUDSON_IMC_FWM
				83
				84	config HUDSON_GEC_FWM_FILE
Dave Frodin	fedd8e3	2015-01-21 07:26:26 -0700	[diff] [blame]	85	string "GEC firmware path and filename"
Kyösti Mälkki	e8b4da2	2014-10-21 18:22:32 +0300	[diff] [blame]	86	depends on HUDSON_GEC_FWM
				87
Kyösti Mälkki	e8b4da2	2014-10-21 18:22:32 +0300	[diff] [blame]	88	config AMD_PUBKEY_FILE
Dave Frodin	fedd8e3	2015-01-21 07:26:26 -0700	[diff] [blame]	89	depends on HUDSON_PSP
				90	string "AMD public Key"
Patrick Georgi	26e24cc	2015-05-05 22:27:25 +0200	[diff] [blame]	91	default "3rdparty/blobs/southbridge/amd/avalon/PSP/AmdPubKey.bin" if CPU_AMD_PI_00730F01
Kyösti Mälkki	e8b4da2	2014-10-21 18:22:32 +0300	[diff] [blame]	92
				93	config HUDSON_SATA_MODE
Dave Frodin	fedd8e3	2015-01-21 07:26:26 -0700	[diff] [blame]	94	int "SATA Mode"
Piotr Kleinschmidt	cb03065	2019-10-08 16:16:44 +0200	[diff] [blame]	95	default 2
Dave Frodin	fedd8e3	2015-01-21 07:26:26 -0700	[diff] [blame]	96	range 0 6
Kyösti Mälkki	e8b4da2	2014-10-21 18:22:32 +0300	[diff] [blame]	97	help
				98	Select the mode in which SATA should be driven. NATIVE AHCI, or RAID.
				99	The default is NATIVE.
				100	0: NATIVE mode does not require a ROM.
				101	1: RAID mode must have the two ROM files.
				102	2: AHCI may work with or without AHCI ROM. It depends on the payload support.
				103	For example, seabios does not require the AHCI ROM.
				104	3: LEGACY IDE
				105	4: IDE to AHCI
				106	5: AHCI7804: ROM Required, and AMD driver required in the OS.
				107	6: IDE to AHCI7804: ROM Required, and AMD driver required in the OS.
				108
				109	comment "NATIVE"
				110	depends on HUDSON_SATA_MODE = 0
				111
				112	comment "RAID"
				113	depends on HUDSON_SATA_MODE = 1
				114
				115	comment "AHCI"
				116	depends on HUDSON_SATA_MODE = 2
				117
				118	comment "LEGACY IDE"
				119	depends on HUDSON_SATA_MODE = 3
				120
				121	comment "IDE to AHCI"
				122	depends on HUDSON_SATA_MODE = 4
				123
				124	comment "AHCI7804"
				125	depends on HUDSON_SATA_MODE = 5
				126
				127	comment "IDE to AHCI7804"
				128	depends on HUDSON_SATA_MODE = 6
				129
Kyösti Mälkki	e8b4da2	2014-10-21 18:22:32 +0300	[diff] [blame]	130	config HUDSON_LEGACY_FREE
				131	bool "System is legacy free"
				132	help
				133	Select y if there is no keyboard controller in the system.
				134	This sets variables in AGESA and ACPI.
				135
Marshall Dawson	c6be0d8	2017-01-07 18:17:32 -0500	[diff] [blame]	136	config AMDFW_OUTSIDE_CBFS
				137	def_bool n
				138	help
				139	The AMDFW (PSP) is typically locatable in cbfs. Select this
				140	option to manually attach the generated amdfw.rom at an
				141	offset of 0x20000 from the bottom of the coreboot ROM image.
				142
Marc Jones	3eec9dd	2017-04-09 18:00:40 -0600	[diff] [blame]	143	config SERIRQ_CONTINUOUS_MODE
				144	bool
				145	default n
				146	help
				147	Set this option to y for serial IRQ in continuous mode.
				148	Otherwise it is in quiet mode.
Marc Jones	7f2c29b	2017-04-26 21:55:03 -0600	[diff] [blame]	149
				150	config HUDSON_ACPI_IO_BASE
				151	hex
Marc Jones	7f2c29b	2017-04-26 21:55:03 -0600	[diff] [blame]	152	default 0x800
				153	help
				154	Base address for the ACPI registers.
				155	This value must match the hardcoded value of AGESA.
				156
Kyösti Mälkki	e8b4da2	2014-10-21 18:22:32 +0300	[diff] [blame]	157	endif