amd/pi/hudson: Add alternate method for including amdfw
For systems using Chrome OS, place the amdfw outside of cbfs control.
The firmware must go to a fixed position at an offset of 0x20000 into
the flash device.
Potentially improve by adding a warning or error message for the
condition when sizeof(amdfw) + sizeof(cbfs and metadata) > sizeof(flash).
Original-Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Original-Reviewed-by: Marc Jones <marcj303@gmail.com>
(cherry picked from commit 2d9d631b39d7850576438a5b0979936bd33893e1)
Change-Id: I38029bc03e5db260424cca293b1a7bceea4d0d75
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/18435
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
diff --git a/src/southbridge/amd/pi/hudson/Kconfig b/src/southbridge/amd/pi/hudson/Kconfig
index f6e3355..7b3b785 100644
--- a/src/southbridge/amd/pi/hudson/Kconfig
+++ b/src/southbridge/amd/pi/hudson/Kconfig
@@ -204,6 +204,14 @@
bit 3,2 - pin 1
bit 5,4 - pin 2
bit 7,6 - pin 3
+
+config AMDFW_OUTSIDE_CBFS
+ def_bool n
+ help
+ The AMDFW (PSP) is typically locatable in cbfs. Select this
+ option to manually attach the generated amdfw.rom at an
+ offset of 0x20000 from the bottom of the coreboot ROM image.
+
endif
config HUDSON_UART