blob: 36716fab0f68970ea1e7fc0ca4d8002275ff32f4 [file] [log] [blame]
Kyösti Mälkkie8b4da22014-10-21 18:22:32 +03001##
2## This file is part of the coreboot project.
3##
4## Copyright (C) 2010 Advanced Micro Devices, Inc.
5##
6## This program is free software; you can redistribute it and/or modify
7## it under the terms of the GNU General Public License as published by
8## the Free Software Foundation; version 2 of the License.
9##
10## This program is distributed in the hope that it will be useful,
11## but WITHOUT ANY WARRANTY; without even the implied warranty of
12## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13## GNU General Public License for more details.
14##
15## You should have received a copy of the GNU General Public License
16## along with this program; if not, write to the Free Software
Patrick Georgib890a122015-03-26 15:17:45 +010017## Foundation, Inc.
Kyösti Mälkkie8b4da22014-10-21 18:22:32 +030018##
19
Dave Frodinef9a4e62015-01-27 07:16:03 -070020config SOUTHBRIDGE_AMD_PI_BOLTON
21 bool
22 select IOAPIC
23 select HAVE_USBDEBUG_OPTIONS
24 select HAVE_HARD_RESET
25
Kyösti Mälkkie8b4da22014-10-21 18:22:32 +030026config SOUTHBRIDGE_AMD_PI_AVALON
27 bool
28 select IOAPIC
29 select HAVE_USBDEBUG_OPTIONS
30 select HAVE_HARD_RESET
31
WANG Siyuanf2dfef02015-05-20 14:41:01 +080032config SOUTHBRIDGE_AMD_PI_KERN
33 bool
34 select IOAPIC
35 select HAVE_USBDEBUG_OPTIONS
36 select HAVE_HARD_RESET
37
38if SOUTHBRIDGE_AMD_PI_AVALON || SOUTHBRIDGE_AMD_PI_BOLTON || SOUTHBRIDGE_AMD_PI_KERN
Kyösti Mälkkie8b4da22014-10-21 18:22:32 +030039
40config BOOTBLOCK_SOUTHBRIDGE_INIT
41 string
Dave Frodinbc21a412015-01-19 11:40:38 -070042 default "southbridge/amd/pi/hudson/bootblock.c"
Kyösti Mälkkie8b4da22014-10-21 18:22:32 +030043
44config SOUTHBRIDGE_AMD_HUDSON_SKIP_ISA_DMA_INIT
45 bool
46 default n
47
48config EHCI_BAR
49 hex
50 default 0xfef00000
51
52config HUDSON_XHCI_ENABLE
53 bool "Enable Hudson XHCI Controller"
54 default y
55 help
56 The XHCI controller must be enabled and the XHCI firmware
57 must be added in order to have USB 3.0 support configured
58 by coreboot. The OS will be responsible for enabling the XHCI
59 controller if the the XHCI firmware is available but the
60 XHCI controller is not enabled by coreboot.
61
62config HUDSON_XHCI_FWM
63 bool "Add xhci firmware"
64 default y
65 help
66 Add Hudson 2/3/4 XHCI Firmware to support the onboard USB 3.0
67
68config HUDSON_DISABLE_IMC
69 bool
70 default n
71
72config HUDSON_IMC_FWM
73 bool "Add IMC firmware"
74 depends on !HUDSON_DISABLE_IMC
75 default y
Dave Frodinfedd8e32015-01-21 07:26:26 -070076 help
Kyösti Mälkkie8b4da22014-10-21 18:22:32 +030077 Add Hudson 2/3/4 IMC Firmware to support the onboard fan control
78
79config HUDSON_GEC_FWM
80 bool
81 default n
Dave Frodinfedd8e32015-01-21 07:26:26 -070082 help
Kyösti Mälkkie8b4da22014-10-21 18:22:32 +030083 Add Hudson 2/3/4 GEC Firmware to support the onboard gigabit Ethernet MAC.
84 Must be connected to a Broadcom B50610 or B50610M PHY on the motherboard.
85
86config HUDSON_PSP
87 bool
WANG Siyuanf2dfef02015-05-20 14:41:01 +080088 default y if CPU_AMD_PI_00730F01 || CPU_AMD_PI_00660F01
Kyösti Mälkkie8b4da22014-10-21 18:22:32 +030089
90config HUDSON_XHCI_FWM_FILE
Dave Frodinfedd8e32015-01-21 07:26:26 -070091 string "XHCI firmware path and filename"
Patrick Georgi26e24cc2015-05-05 22:27:25 +020092 default "3rdparty/blobs/southbridge/amd/avalon/xhci.bin" if SOUTHBRIDGE_AMD_PI_AVALON
WANG Siyuanf2dfef02015-05-20 14:41:01 +080093 default "3rdparty/blobs/southbridge/amd/kern/xhci.bin" if SOUTHBRIDGE_AMD_PI_KERN
Kyösti Mälkkie8b4da22014-10-21 18:22:32 +030094 depends on HUDSON_XHCI_FWM
95
96config HUDSON_IMC_FWM_FILE
Dave Frodinfedd8e32015-01-21 07:26:26 -070097 string "IMC firmware path and filename"
Patrick Georgi26e24cc2015-05-05 22:27:25 +020098 default "3rdparty/blobs/southbridge/amd/avalon/imc.bin" if SOUTHBRIDGE_AMD_PI_AVALON
WANG Siyuanf2dfef02015-05-20 14:41:01 +080099 default "3rdparty/blobs/southbridge/amd/kern/imc.bin" if SOUTHBRIDGE_AMD_PI_KERN
Kyösti Mälkkie8b4da22014-10-21 18:22:32 +0300100 depends on HUDSON_IMC_FWM
101
102config HUDSON_GEC_FWM_FILE
Dave Frodinfedd8e32015-01-21 07:26:26 -0700103 string "GEC firmware path and filename"
Kyösti Mälkkie8b4da22014-10-21 18:22:32 +0300104 depends on HUDSON_GEC_FWM
105
106config HUDSON_FWM
107 bool
108 default y if HUDSON_XHCI_FWM || HUDSON_IMC_FWM || HUDSON_GEC_FWM || HUDSON_PSP
109 default n
110
111if HUDSON_FWM
112
113config HUDSON_FWM_POSITION
Dave Frodinfedd8e32015-01-21 07:26:26 -0700114 hex "Hudson Firmware ROM Position"
115 default 0xFFF20000 if BOARD_ROMSIZE_KB_1024
116 default 0xFFE20000 if BOARD_ROMSIZE_KB_2048
117 default 0xFFC20000 if BOARD_ROMSIZE_KB_4096
118 default 0xFF820000 if BOARD_ROMSIZE_KB_8192
119 default 0xFF020000 if BOARD_ROMSIZE_KB_16384
Kyösti Mälkkie8b4da22014-10-21 18:22:32 +0300120 help
121 Hudson requires the firmware MUST be located at
122 a specific address (ROM start address + 0x20000), otherwise
123 xhci host Controller can not find or load the xhci firmware.
124
125 The firmware start address is dependent on the ROM chip size.
126 The default offset is 0x20000 from the ROM start address, namely
127 0xFFF20000 if flash chip size is 1M
128 0xFFE20000 if flash chip size is 2M
129 0xFFC20000 if flash chip size is 4M
130 0xFF820000 if flash chip size is 8M
131 0xFF020000 if flash chip size is 16M
132endif # HUDSON_FWM
133
134config AMD_PUBKEY_FILE
Dave Frodinfedd8e32015-01-21 07:26:26 -0700135 depends on HUDSON_PSP
136 string "AMD public Key"
Patrick Georgi26e24cc2015-05-05 22:27:25 +0200137 default "3rdparty/blobs/southbridge/amd/avalon/PSP/AmdPubKey.bin" if CPU_AMD_PI_00730F01
WANG Siyuanf2dfef02015-05-20 14:41:01 +0800138 default "3rdparty/blobs/southbridge/amd/kern/PSP/AmdPubKeyCZ.bin" if CPU_AMD_PI_00660F01
Kyösti Mälkkie8b4da22014-10-21 18:22:32 +0300139
140config HUDSON_SATA_MODE
Dave Frodinfedd8e32015-01-21 07:26:26 -0700141 int "SATA Mode"
142 default 0
143 range 0 6
Kyösti Mälkkie8b4da22014-10-21 18:22:32 +0300144 help
145 Select the mode in which SATA should be driven. NATIVE AHCI, or RAID.
146 The default is NATIVE.
147 0: NATIVE mode does not require a ROM.
148 1: RAID mode must have the two ROM files.
149 2: AHCI may work with or without AHCI ROM. It depends on the payload support.
150 For example, seabios does not require the AHCI ROM.
151 3: LEGACY IDE
152 4: IDE to AHCI
153 5: AHCI7804: ROM Required, and AMD driver required in the OS.
154 6: IDE to AHCI7804: ROM Required, and AMD driver required in the OS.
155
156comment "NATIVE"
157 depends on HUDSON_SATA_MODE = 0
158
159comment "RAID"
160 depends on HUDSON_SATA_MODE = 1
161
162comment "AHCI"
163 depends on HUDSON_SATA_MODE = 2
164
165comment "LEGACY IDE"
166 depends on HUDSON_SATA_MODE = 3
167
168comment "IDE to AHCI"
169 depends on HUDSON_SATA_MODE = 4
170
171comment "AHCI7804"
172 depends on HUDSON_SATA_MODE = 5
173
174comment "IDE to AHCI7804"
175 depends on HUDSON_SATA_MODE = 6
176
177if HUDSON_SATA_MODE = 2 || HUDSON_SATA_MODE = 5
178
179config AHCI_ROM_ID
180 string "AHCI device PCI IDs"
181 default "1022,7801" if HUDSON_SATA_MODE = 2
182 default "1022,7804" if HUDSON_SATA_MODE = 5
183
184config HUDSON_AHCI_ROM
185 bool "Add a AHCI ROM"
186
187config AHCI_ROM_FILE
188 string "AHCI ROM path and filename"
189 depends on HUDSON_AHCI_ROM
Dave Frodinbc21a412015-01-19 11:40:38 -0700190 default "src/southbridge/amd/pi/hudson/ahci.bin"
Kyösti Mälkkie8b4da22014-10-21 18:22:32 +0300191
192endif
193
194if HUDSON_SATA_MODE = 1
195
196config RAID_ROM_ID
197 string "RAID device PCI IDs"
198 default "1022,7802"
Dave Frodinfedd8e32015-01-21 07:26:26 -0700199 help
200 1022,7802 for SATA NON-RAID5 module, 1022,7803 for SATA RAID5 mode
Kyösti Mälkkie8b4da22014-10-21 18:22:32 +0300201
202config RAID_ROM_FILE
203 string "RAID ROM path and filename"
Dave Frodinbc21a412015-01-19 11:40:38 -0700204 default "src/southbridge/amd/pi/hudson/raid.bin"
Kyösti Mälkkie8b4da22014-10-21 18:22:32 +0300205
206config RAID_MISC_ROM_FILE
207 string "RAID Misc ROM path and filename"
Dave Frodinbc21a412015-01-19 11:40:38 -0700208 default "src/southbridge/amd/pi/hudson/misc.bin"
Kyösti Mälkkie8b4da22014-10-21 18:22:32 +0300209
210config RAID_MISC_ROM_POSITION
211 hex "RAID Misc ROM Position"
212 default 0xFFF00000
213 help
214 The RAID ROM requires that the MISC ROM is located between the range
215 0xFFF0_0000 to 0xFFF0_FFFF. Also, it must 1K bytes aligned.
216 The CONFIG_ROM_SIZE must be larger than 0x100000.
217
218endif
219
220config HUDSON_LEGACY_FREE
221 bool "System is legacy free"
222 help
223 Select y if there is no keyboard controller in the system.
224 This sets variables in AGESA and ACPI.
225
226config AZ_PIN
227 hex
228 default 0xaa
229 help
230 bit 1,0 - pin 0
231 bit 3,2 - pin 1
232 bit 5,4 - pin 2
233 bit 7,6 - pin 3
234endif