Angel Pons | 4b42983 | 2020-04-02 23:48:50 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Damien Zammit | f7060f1 | 2015-11-14 00:59:21 +1100 | [diff] [blame] | 2 | |
Arthur Heymans | 17ad459 | 2018-08-06 15:35:28 +0200 | [diff] [blame] | 3 | #include <cbmem.h> |
Damien Zammit | f7060f1 | 2015-11-14 00:59:21 +1100 | [diff] [blame] | 4 | #include <console/console.h> |
Arthur Heymans | 95a1142 | 2021-01-18 00:41:35 +0100 | [diff] [blame] | 5 | #include <commonlib/bsd/helpers.h> |
Elyes HAOUAS | 748caed | 2019-12-19 17:02:08 +0100 | [diff] [blame] | 6 | #include <device/pci_def.h> |
Kyösti Mälkki | f1b58b7 | 2019-03-01 13:43:02 +0200 | [diff] [blame] | 7 | #include <device/pci_ops.h> |
Damien Zammit | f7060f1 | 2015-11-14 00:59:21 +1100 | [diff] [blame] | 8 | #include <stdint.h> |
| 9 | #include <device/device.h> |
Damien Zammit | f7060f1 | 2015-11-14 00:59:21 +1100 | [diff] [blame] | 10 | #include <boot/tables.h> |
Furquan Shaikh | 76cedd2 | 2020-05-02 10:24:23 -0700 | [diff] [blame] | 11 | #include <acpi/acpi.h> |
Damien Zammit | f7060f1 | 2015-11-14 00:59:21 +1100 | [diff] [blame] | 12 | #include <northbridge/intel/pineview/pineview.h> |
Kyösti Mälkki | f091f4d | 2019-08-14 03:49:21 +0300 | [diff] [blame] | 13 | #include <cpu/intel/smm_reloc.h> |
Damien Zammit | f7060f1 | 2015-11-14 00:59:21 +1100 | [diff] [blame] | 14 | |
Angel Pons | 39ff703 | 2020-03-09 21:39:44 +0100 | [diff] [blame] | 15 | /* |
| 16 | * Reserve everything between A segment and 1MB: |
Damien Zammit | f7060f1 | 2015-11-14 00:59:21 +1100 | [diff] [blame] | 17 | * |
| 18 | * 0xa0000 - 0xbffff: legacy VGA |
Damien Zammit | 51fdb92 | 2016-01-18 18:34:52 +1100 | [diff] [blame] | 19 | * 0xc0000 - 0xcffff: VGA OPROM (needed by kernel) |
| 20 | * 0xe0000 - 0xfffff: SeaBIOS, if used, otherwise DMI |
Damien Zammit | f7060f1 | 2015-11-14 00:59:21 +1100 | [diff] [blame] | 21 | */ |
Angel Pons | 6935648 | 2020-08-03 15:16:12 +0200 | [diff] [blame] | 22 | static const int legacy_hole_base_k = 0xa0000 / KiB; |
Damien Zammit | f7060f1 | 2015-11-14 00:59:21 +1100 | [diff] [blame] | 23 | |
Elyes HAOUAS | 6275360 | 2018-02-09 08:46:25 +0100 | [diff] [blame] | 24 | static void add_fixed_resources(struct device *dev, int index) |
Damien Zammit | 51fdb92 | 2016-01-18 18:34:52 +1100 | [diff] [blame] | 25 | { |
| 26 | struct resource *resource; |
| 27 | |
| 28 | resource = new_resource(dev, index++); |
| 29 | resource->base = (resource_t) 0xfed00000; |
| 30 | resource->size = (resource_t) 0x00100000; |
Angel Pons | 39ff703 | 2020-03-09 21:39:44 +0100 | [diff] [blame] | 31 | resource->flags = IORESOURCE_MEM |
| 32 | | IORESOURCE_RESERVE |
| 33 | | IORESOURCE_FIXED |
| 34 | | IORESOURCE_STORED |
| 35 | | IORESOURCE_ASSIGNED; |
Damien Zammit | 51fdb92 | 2016-01-18 18:34:52 +1100 | [diff] [blame] | 36 | |
Angel Pons | 6935648 | 2020-08-03 15:16:12 +0200 | [diff] [blame] | 37 | mmio_resource(dev, index++, legacy_hole_base_k, (0xc0000 / KiB) - legacy_hole_base_k); |
| 38 | reserved_ram_resource(dev, index++, 0xc0000 / KiB, (0x100000 - 0xc0000) / KiB); |
Damien Zammit | 51fdb92 | 2016-01-18 18:34:52 +1100 | [diff] [blame] | 39 | } |
| 40 | |
Elyes HAOUAS | 6275360 | 2018-02-09 08:46:25 +0100 | [diff] [blame] | 41 | static void mch_domain_read_resources(struct device *dev) |
Damien Zammit | f7060f1 | 2015-11-14 00:59:21 +1100 | [diff] [blame] | 42 | { |
| 43 | u64 tom, touud; |
Damien Zammit | 51fdb92 | 2016-01-18 18:34:52 +1100 | [diff] [blame] | 44 | u32 tomk, tolud, tseg_sizek; |
Arthur Heymans | 17ad459 | 2018-08-06 15:35:28 +0200 | [diff] [blame] | 45 | u32 pcie_config_base, pcie_config_size, cbmem_topk, delta_cbmem; |
Damien Zammit | 51fdb92 | 2016-01-18 18:34:52 +1100 | [diff] [blame] | 46 | u16 index; |
| 47 | const u32 top32memk = 4 * (GiB / KiB); |
| 48 | |
Kyösti Mälkki | c70eed1 | 2018-05-22 02:18:00 +0300 | [diff] [blame] | 49 | struct device *mch = pcidev_on_root(0, 0); |
Arthur Heymans | 15e1b39 | 2018-06-26 21:06:13 +0200 | [diff] [blame] | 50 | |
Damien Zammit | 51fdb92 | 2016-01-18 18:34:52 +1100 | [diff] [blame] | 51 | index = 3; |
Damien Zammit | f7060f1 | 2015-11-14 00:59:21 +1100 | [diff] [blame] | 52 | |
| 53 | pci_domain_read_resources(dev); |
| 54 | |
| 55 | /* Top of Upper Usable DRAM, including remap */ |
Arthur Heymans | 15e1b39 | 2018-06-26 21:06:13 +0200 | [diff] [blame] | 56 | touud = pci_read_config16(mch, TOUUD); |
Damien Zammit | f7060f1 | 2015-11-14 00:59:21 +1100 | [diff] [blame] | 57 | touud <<= 20; |
| 58 | |
| 59 | /* Top of Lower Usable DRAM */ |
Arthur Heymans | 15e1b39 | 2018-06-26 21:06:13 +0200 | [diff] [blame] | 60 | tolud = pci_read_config16(mch, TOLUD) & 0xfff0; |
Damien Zammit | f7060f1 | 2015-11-14 00:59:21 +1100 | [diff] [blame] | 61 | tolud <<= 16; |
| 62 | |
| 63 | /* Top of Memory - does not account for any UMA */ |
Angel Pons | 39ff703 | 2020-03-09 21:39:44 +0100 | [diff] [blame] | 64 | tom = pci_read_config16(mch, TOM) & 0x01ff; |
Damien Zammit | f7060f1 | 2015-11-14 00:59:21 +1100 | [diff] [blame] | 65 | tom <<= 27; |
| 66 | |
Angel Pons | 39ff703 | 2020-03-09 21:39:44 +0100 | [diff] [blame] | 67 | printk(BIOS_DEBUG, "TOUUD 0x%llx TOLUD 0x%08x TOM 0x%llx ", touud, tolud, tom); |
Damien Zammit | f7060f1 | 2015-11-14 00:59:21 +1100 | [diff] [blame] | 68 | |
Arthur Heymans | 95a1142 | 2021-01-18 00:41:35 +0100 | [diff] [blame] | 69 | tomk = tolud / KiB; |
Damien Zammit | f7060f1 | 2015-11-14 00:59:21 +1100 | [diff] [blame] | 70 | |
Damien Zammit | f7060f1 | 2015-11-14 00:59:21 +1100 | [diff] [blame] | 71 | /* Graphics memory */ |
Arthur Heymans | 15e1b39 | 2018-06-26 21:06:13 +0200 | [diff] [blame] | 72 | const u16 ggc = pci_read_config16(mch, GGC); |
Damien Zammit | f7060f1 | 2015-11-14 00:59:21 +1100 | [diff] [blame] | 73 | const u32 gms_sizek = decode_igd_memory_size((ggc >> 4) & 0xf); |
Arthur Heymans | 95a1142 | 2021-01-18 00:41:35 +0100 | [diff] [blame] | 74 | printk(BIOS_DEBUG, "%uM UMA", gms_sizek / KiB); |
Damien Zammit | f7060f1 | 2015-11-14 00:59:21 +1100 | [diff] [blame] | 75 | tomk -= gms_sizek; |
| 76 | |
| 77 | /* GTT Graphics Stolen Memory Size (GGMS) */ |
| 78 | const u32 gsm_sizek = decode_igd_gtt_size((ggc >> 8) & 0xf); |
Arthur Heymans | 95a1142 | 2021-01-18 00:41:35 +0100 | [diff] [blame] | 79 | printk(BIOS_DEBUG, " and %uM GTT\n", gsm_sizek / KiB); |
Damien Zammit | f7060f1 | 2015-11-14 00:59:21 +1100 | [diff] [blame] | 80 | tomk -= gsm_sizek; |
| 81 | |
Arthur Heymans | 95a1142 | 2021-01-18 00:41:35 +0100 | [diff] [blame] | 82 | const u32 tseg_basek = pci_read_config32(mch, TSEG) / KiB; |
| 83 | const u32 igd_basek = pci_read_config32(mch, GBSM) / KiB; |
| 84 | const u32 gtt_basek = pci_read_config32(mch, BGSM) / KiB; |
Damien Zammit | f7060f1 | 2015-11-14 00:59:21 +1100 | [diff] [blame] | 85 | |
Damien Zammit | 51fdb92 | 2016-01-18 18:34:52 +1100 | [diff] [blame] | 86 | /* Subtract TSEG size */ |
| 87 | tseg_sizek = gtt_basek - tseg_basek; |
| 88 | tomk -= tseg_sizek; |
Arthur Heymans | 95a1142 | 2021-01-18 00:41:35 +0100 | [diff] [blame] | 89 | printk(BIOS_DEBUG, "TSEG decoded, subtracting %dM\n", tseg_sizek / KiB); |
Arthur Heymans | 17ad459 | 2018-08-06 15:35:28 +0200 | [diff] [blame] | 90 | |
| 91 | /* cbmem_top can be shifted downwards due to alignment. |
| 92 | Mark the region between cbmem_top and tomk as unusable */ |
Arthur Heymans | 95a1142 | 2021-01-18 00:41:35 +0100 | [diff] [blame] | 93 | cbmem_topk = (uint32_t)cbmem_top() / KiB; |
Arthur Heymans | 17ad459 | 2018-08-06 15:35:28 +0200 | [diff] [blame] | 94 | delta_cbmem = tomk - cbmem_topk; |
| 95 | tomk -= delta_cbmem; |
| 96 | |
Angel Pons | 39ff703 | 2020-03-09 21:39:44 +0100 | [diff] [blame] | 97 | printk(BIOS_DEBUG, "Unused RAM between cbmem_top and TOMK: 0x%xK\n", delta_cbmem); |
Damien Zammit | f7060f1 | 2015-11-14 00:59:21 +1100 | [diff] [blame] | 98 | |
| 99 | /* Report the memory regions */ |
Arthur Heymans | 95a1142 | 2021-01-18 00:41:35 +0100 | [diff] [blame] | 100 | ram_resource(dev, index++, 0, 0xa0000 / KiB); |
Arthur Heymans | 4338ae3 | 2021-01-18 00:50:47 +0100 | [diff] [blame] | 101 | ram_resource(dev, index++, 1 * MiB / KiB, tomk - 1 * MiB / KiB); |
Arthur Heymans | ac12976 | 2020-11-03 18:33:02 +0100 | [diff] [blame] | 102 | mmio_resource(dev, index++, tseg_basek, tseg_sizek); |
| 103 | mmio_resource(dev, index++, gtt_basek, gsm_sizek); |
| 104 | mmio_resource(dev, index++, igd_basek, gms_sizek); |
Arthur Heymans | 17ad459 | 2018-08-06 15:35:28 +0200 | [diff] [blame] | 105 | reserved_ram_resource(dev, index++, cbmem_topk, delta_cbmem); |
Damien Zammit | f7060f1 | 2015-11-14 00:59:21 +1100 | [diff] [blame] | 106 | |
| 107 | /* |
Damien Zammit | 51fdb92 | 2016-01-18 18:34:52 +1100 | [diff] [blame] | 108 | * If > 4GB installed then memory from TOLUD to 4GB |
Damien Zammit | f7060f1 | 2015-11-14 00:59:21 +1100 | [diff] [blame] | 109 | * is remapped above TOM, TOUUD will account for both |
| 110 | */ |
| 111 | touud >>= 10; /* Convert to KB */ |
Damien Zammit | 51fdb92 | 2016-01-18 18:34:52 +1100 | [diff] [blame] | 112 | if (touud > top32memk) { |
| 113 | ram_resource(dev, index++, top32memk, touud - top32memk); |
Damien Zammit | f7060f1 | 2015-11-14 00:59:21 +1100 | [diff] [blame] | 114 | printk(BIOS_INFO, "Available memory above 4GB: %lluM\n", |
Arthur Heymans | 95a1142 | 2021-01-18 00:41:35 +0100 | [diff] [blame] | 115 | (touud - top32memk) / KiB); |
Damien Zammit | f7060f1 | 2015-11-14 00:59:21 +1100 | [diff] [blame] | 116 | } |
| 117 | |
Angel Pons | 653d871 | 2020-08-03 15:40:54 +0200 | [diff] [blame] | 118 | if (decode_pcie_bar(&pcie_config_base, &pcie_config_size)) { |
Angel Pons | 39ff703 | 2020-03-09 21:39:44 +0100 | [diff] [blame] | 119 | printk(BIOS_DEBUG, "Adding PCIe config bar base=0x%08x size=0x%x\n", |
| 120 | pcie_config_base, pcie_config_size); |
| 121 | |
Arthur Heymans | 95a1142 | 2021-01-18 00:41:35 +0100 | [diff] [blame] | 122 | fixed_mem_resource(dev, index++, pcie_config_base / KiB, |
| 123 | pcie_config_size / KiB, IORESOURCE_RESERVE); |
Damien Zammit | f7060f1 | 2015-11-14 00:59:21 +1100 | [diff] [blame] | 124 | } |
| 125 | |
Damien Zammit | 51fdb92 | 2016-01-18 18:34:52 +1100 | [diff] [blame] | 126 | add_fixed_resources(dev, index); |
Damien Zammit | f7060f1 | 2015-11-14 00:59:21 +1100 | [diff] [blame] | 127 | } |
| 128 | |
Arthur Heymans | de6bda6 | 2018-04-10 13:40:39 +0200 | [diff] [blame] | 129 | void northbridge_write_smram(u8 smram) |
| 130 | { |
Kyösti Mälkki | c70eed1 | 2018-05-22 02:18:00 +0300 | [diff] [blame] | 131 | struct device *dev = pcidev_on_root(0, 0); |
Arthur Heymans | de6bda6 | 2018-04-10 13:40:39 +0200 | [diff] [blame] | 132 | |
| 133 | if (dev == NULL) |
| 134 | die("could not find pci 00:00.0!\n"); |
| 135 | |
| 136 | pci_write_config8(dev, SMRAM, smram); |
| 137 | } |
| 138 | |
Elyes HAOUAS | 6275360 | 2018-02-09 08:46:25 +0100 | [diff] [blame] | 139 | static void mch_domain_set_resources(struct device *dev) |
Damien Zammit | f7060f1 | 2015-11-14 00:59:21 +1100 | [diff] [blame] | 140 | { |
Damien Zammit | 51fdb92 | 2016-01-18 18:34:52 +1100 | [diff] [blame] | 141 | struct resource *res; |
Damien Zammit | f7060f1 | 2015-11-14 00:59:21 +1100 | [diff] [blame] | 142 | |
Damien Zammit | 51fdb92 | 2016-01-18 18:34:52 +1100 | [diff] [blame] | 143 | for (res = dev->resource_list; res; res = res->next) |
| 144 | report_resource_stored(dev, res, ""); |
Damien Zammit | f7060f1 | 2015-11-14 00:59:21 +1100 | [diff] [blame] | 145 | |
| 146 | assign_resources(dev->link_list); |
| 147 | } |
| 148 | |
Elyes HAOUAS | 6275360 | 2018-02-09 08:46:25 +0100 | [diff] [blame] | 149 | static void mch_domain_init(struct device *dev) |
Damien Zammit | f7060f1 | 2015-11-14 00:59:21 +1100 | [diff] [blame] | 150 | { |
Damien Zammit | f7060f1 | 2015-11-14 00:59:21 +1100 | [diff] [blame] | 151 | /* Enable SERR */ |
Elyes HAOUAS | 5ac723e | 2020-04-29 09:09:12 +0200 | [diff] [blame] | 152 | pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_SERR); |
Damien Zammit | f7060f1 | 2015-11-14 00:59:21 +1100 | [diff] [blame] | 153 | } |
| 154 | |
Arthur Heymans | a8a9f34 | 2017-12-24 08:11:13 +0100 | [diff] [blame] | 155 | static const char *northbridge_acpi_name(const struct device *dev) |
| 156 | { |
| 157 | if (dev->path.type == DEVICE_PATH_DOMAIN) |
| 158 | return "PCI0"; |
| 159 | |
| 160 | if (dev->path.type != DEVICE_PATH_PCI || dev->bus->secondary != 0) |
| 161 | return NULL; |
| 162 | |
| 163 | switch (dev->path.pci.devfn) { |
| 164 | case PCI_DEVFN(0, 0): |
| 165 | return "MCHC"; |
| 166 | } |
| 167 | |
| 168 | return NULL; |
| 169 | } |
| 170 | |
Damien Zammit | f7060f1 | 2015-11-14 00:59:21 +1100 | [diff] [blame] | 171 | static struct device_operations pci_domain_ops = { |
Nico Huber | 68680dd | 2020-03-31 17:34:52 +0200 | [diff] [blame] | 172 | .read_resources = mch_domain_read_resources, |
| 173 | .set_resources = mch_domain_set_resources, |
| 174 | .init = mch_domain_init, |
| 175 | .scan_bus = pci_domain_scan_bus, |
| 176 | .acpi_fill_ssdt = generate_cpu_entries, |
| 177 | .acpi_name = northbridge_acpi_name, |
Damien Zammit | f7060f1 | 2015-11-14 00:59:21 +1100 | [diff] [blame] | 178 | }; |
| 179 | |
Damien Zammit | f7060f1 | 2015-11-14 00:59:21 +1100 | [diff] [blame] | 180 | static struct device_operations cpu_bus_ops = { |
Nico Huber | 2f8ba69 | 2020-04-05 14:05:24 +0200 | [diff] [blame] | 181 | .read_resources = noop_read_resources, |
| 182 | .set_resources = noop_set_resources, |
Kyösti Mälkki | b3267e0 | 2019-08-13 16:44:04 +0300 | [diff] [blame] | 183 | .init = mp_cpu_bus_init, |
Damien Zammit | f7060f1 | 2015-11-14 00:59:21 +1100 | [diff] [blame] | 184 | }; |
| 185 | |
Elyes HAOUAS | 6275360 | 2018-02-09 08:46:25 +0100 | [diff] [blame] | 186 | static void enable_dev(struct device *dev) |
Damien Zammit | f7060f1 | 2015-11-14 00:59:21 +1100 | [diff] [blame] | 187 | { |
| 188 | /* Set the operations if it is a special bus type */ |
| 189 | if (dev->path.type == DEVICE_PATH_DOMAIN) { |
| 190 | dev->ops = &pci_domain_ops; |
Damien Zammit | f7060f1 | 2015-11-14 00:59:21 +1100 | [diff] [blame] | 191 | } else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) { |
| 192 | dev->ops = &cpu_bus_ops; |
| 193 | } |
| 194 | } |
| 195 | |
Damien Zammit | f7060f1 | 2015-11-14 00:59:21 +1100 | [diff] [blame] | 196 | struct chip_operations northbridge_intel_pineview_ops = { |
| 197 | CHIP_NAME("Intel Pineview Northbridge") |
| 198 | .enable_dev = enable_dev, |
Damien Zammit | f7060f1 | 2015-11-14 00:59:21 +1100 | [diff] [blame] | 199 | }; |