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review.coreboot.org / coreboot / 698c0e0e5aa0492ce9ecedce787d452e87adc6eb / . / src / Kconfig
blob: e1789b20a20dc3e850f0a6563140d8152b59e8c9 [file] [log] [blame]
Patrick Georgi0588d192009-08-12 15:00:51 +0000[diff] [blame]1##
2## This file is part of the coreboot repair project.
3##
4## Redistribution and use in source and binary forms, with or without
5## modification, are permitted provided that the following conditions
6## are met:
7## 1. Redistributions of source code must retain the above copyright
8## notice, this list of conditions and the following disclaimer.
9## 2. Redistributions in binary form must reproduce the above copyright
10## notice, this list of conditions and the following disclaimer in the
11## documentation and/or other materials provided with the distribution.
12## 3. The name of the author may not be used to endorse or promote products
13## derived from this software without specific prior written permission.
14##
15## THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16## ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17## IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18## ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19## FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20## DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21## OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22## HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23## LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24## OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25## SUCH DAMAGE.
26##
27
28mainmenu "Coreboot Configuration"
29
30source src/mainboard/Kconfig
31source src/arch/i386/Kconfig
32source src/arch/ppc/Kconfig
33source src/devices/Kconfig
34source src/northbridge/Kconfig
35source src/southbridge/Kconfig
36source src/superio/Kconfig
37source src/cpu/Kconfig
38
39config CBFS
40 bool
41 default y
42
43config HAVE_HIGH_TABLES
44 bool
45 default y
46
47config PCI_BUS_SEGN_BITS
48 int
49 default 0
50
51config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
Uwe Hermann5ec2c2b2009-08-25 00:53:22 +0000[diff] [blame]52 hex
53 default 0
Patrick Georgi0588d192009-08-12 15:00:51 +0000[diff] [blame]54
55config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
Uwe Hermann5ec2c2b2009-08-25 00:53:22 +0000[diff] [blame]56 hex
57 default 0
Patrick Georgi0588d192009-08-12 15:00:51 +0000[diff] [blame]58
59config CPU_ADDR_BITS
60 int
61 default 36
62
63config XIP_ROM_BASE
64 hex
65 default 0xfffe0000
66
67config XIP_ROM_SIZE
68 hex
69 default 0x20000
70
71config LB_CKS_RANGE_START
72 int
73 default 49
74
75config LB_CKS_RANGE_END
76 int
77 default 125
78
79config LB_CKS_LOC
80 int
81 default 126
82
83config LOGICAL_CPUS
84 int
85 default 1
86
87config PCI_ROM_RUN
Patrick Georgi698c0e0e2009-08-25 17:38:24 +0000[diff] [blame^]88 bool
89 default n
Patrick Georgi0588d192009-08-12 15:00:51 +0000[diff] [blame]90
91config HT_CHAIN_UNITID_BASE
92 int
93 default 1
94
95config HT_CHAIN_END_UNITID_BASE
96 int
97 default 32
98
99config HEAP_SIZE
100 hex
101 default 0x2000
102
103config COREBOOT_V2
104 bool
105 default y
106
107config COREBOOT_V4
108 bool
109 default y
110
111config DEBUG
112 bool
113 default n
114
115config USE_PRINTK_IN_CAR
116 bool
117 default n
118
119config USE_OPTION_TABLE
120 bool
121 default n
122
123config MAX_CPUS
124 int
125 default 1
126
127config MMCONF_SUPPORT_DEFAULT
128 bool
129 default n
130
131config MMCONF_SUPPORT
132 bool
133 default n
134
135config LB_MEM_TOPK
136 int
137 default 2048
138
139config MULTIBOOT
140 bool
141 default n
142
143config COMPRESSED_PAYLOAD_LZMA
144 bool
145 default y
146
147config COMPRESSED_PAYLOAD_NRV2B
148 bool
149 default n
150
151source src/console/Kconfig
152
153config HAVE_ACPI_RESUME
154 bool
155 default n
156
157config ACPI_SSDTX_NUM
158 int
159 default 0
160
161config HAVE_ACPI_TABLES
162 bool
163 default n
164
165config HAVE_FALLBACK_BOOT
166 bool
167 default y
168
169config USE_FALLBACK_IMAGE
170 bool
171 default y
172
173config HAVE_HARD_RESET
174 bool
175 default n
176
177config HAVE_INIT_TIMER
178 bool
179 default n
180
181config HAVE_MAINBOARD_RESOURCES
182 bool
183 default n
184
185config HAVE_MOVNTI
186 bool
187 default y
188
189config HAVE_MP_TABLE
190 bool
191 default n
192
193config HAVE_OPTION_TABLE
194 bool
195 default y
196
197config HAVE_PIRQ_TABLE
198 bool
199 default n
200
201config PIRQ_ROUTE
202 bool
203 default n
204
205config HAVE_SMI_HANDLER
206 bool
207 default n
208
209config PCI_IO_CFG_EXT
210 bool
211 default n
212
213config IOAPIC
214 bool
215 default n
216
Uwe Hermann5ec2c2b2009-08-25 00:53:22 +0000[diff] [blame]217# TODO
218# menu "Drivers"
219#
220# endmenu
Patrick Georgi0588d192009-08-12 15:00:51 +0000[diff] [blame]221
222menu "Payload"
223
224config COMPRESSED_PAYLOAD_LZMA
225 bool "Use LZMA compression for payloads"
226 default yes
227
228choice
229 prompt "Payload type"
230 default PAYLOAD_NONE
231
232config PAYLOAD_ELF
233 bool "An ELF executable payload file"
234 help
235 Select this option if you have a payload image (an ELF file)
236 which coreboot should run as soon as the basic hardware
237 initialization is completed.
238
239 You will be able to specify the location and file name of the
240 payload image later.
241
Cristi Magherusan488c36c2009-08-17 14:46:13 +0000[diff] [blame]242config VGA_BIOS
243 bool "Add a VGA BIOS image"
244 depends on PAYLOAD_ELF
245 help
Uwe Hermann5ec2c2b2009-08-25 00:53:22 +0000[diff] [blame]246 Select this option if you have a VGA BIOS image that you would
Cristi Magherusan488c36c2009-08-17 14:46:13 +0000[diff] [blame]247 like to add to your ROM.
248
249 You will be able to specify the location and file name of the
250 image later.
251
Patrick Georgi0588d192009-08-12 15:00:51 +0000[diff] [blame]252config PAYLOAD_NONE
253 bool "No payload"
254 help
255 Select this option if you want to create an "empty" coreboot
256 ROM image for a certain mainboard, i.e. a coreboot ROM image
257 which does not yet contain a payload.
258
Uwe Hermann5ec2c2b2009-08-25 00:53:22 +0000[diff] [blame]259 For such an image to be useful, you have to use the 'cbfs' tool
Patrick Georgi0588d192009-08-12 15:00:51 +0000[diff] [blame]260 to add a payload to the ROM image later.
261
262endchoice
263
Patrick Georgi0588d192009-08-12 15:00:51 +0000[diff] [blame]264config FALLBACK_PAYLOAD_FILE
Cristi Magherusanb5034d42009-08-17 14:47:32 +0000[diff] [blame]265 string "Payload path and filename"
Patrick Georgi0588d192009-08-12 15:00:51 +0000[diff] [blame]266 depends on PAYLOAD_ELF
267 default "payload.elf"
268 help
Uwe Hermann5ec2c2b2009-08-25 00:53:22 +0000[diff] [blame]269 The path and filename of the ELF executable file to use as payload.
Patrick Georgi0588d192009-08-12 15:00:51 +0000[diff] [blame]270
Cristi Magherusan488c36c2009-08-17 14:46:13 +0000[diff] [blame]271config FALLBACK_VGA_BIOS_FILE
272 string "VGA BIOS path and filename"
273 depends on VGA_BIOS
274 default "vgabios.bin"
275 help
276 The path and filename of the file to use as VGA BIOS.
277
278config FALLBACK_VGA_BIOS_ID
279 string "VGA BIOS ID"
280 depends on VGA_BIOS
281 default "1106,3230"
282 help
283 The ID that would associate your VGA BIOS to your video card.
284
Patrick Georgi0588d192009-08-12 15:00:51 +0000[diff] [blame]285endmenu
286
287config GDB_STUB
Uwe Hermann5ec2c2b2009-08-25 00:53:22 +0000[diff] [blame]288 bool "GDB debugging support"
Patrick Georgi0588d192009-08-12 15:00:51 +0000[diff] [blame]289 default y
290 help
Uwe Hermann5ec2c2b2009-08-25 00:53:22 +0000[diff] [blame]291 If enabled, you will be able to set breakpoints for gdb debugging.
292 See src/arch/i386/lib/c_start.S for details.
Patrick Georgi0588d192009-08-12 15:00:51 +0000[diff] [blame]293