Patrick Georgi | ac95903 | 2020-05-05 22:49:26 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 2 | |
Philipp Deppenwiese | c07f8fb | 2018-02-27 19:40:52 +0100 | [diff] [blame] | 3 | #include <security/vboot/antirollback.h> |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 4 | #include <arch/symbols.h> |
Aaron Durbin | 31be2c9 | 2016-12-03 22:08:20 -0600 | [diff] [blame] | 5 | #include <assert.h> |
Joel Kitching | 9a29228 | 2020-03-06 13:44:50 +0800 | [diff] [blame] | 6 | #include <bootmode.h> |
Aaron Durbin | d04639b | 2016-07-17 23:23:59 -0500 | [diff] [blame] | 7 | #include <cbfs.h> |
Aaron Durbin | 2792868 | 2016-07-15 22:32:28 -0500 | [diff] [blame] | 8 | #include <cbmem.h> |
Patrick Rudolph | f677d17 | 2018-10-01 19:17:11 +0200 | [diff] [blame] | 9 | #include <cf9_reset.h> |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 10 | #include <console/console.h> |
Furquan Shaikh | 5aea588 | 2016-07-30 18:10:05 -0700 | [diff] [blame] | 11 | #include <elog.h> |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 12 | #include <fsp/api.h> |
| 13 | #include <fsp/util.h> |
| 14 | #include <memrange.h> |
Aaron Durbin | decd062 | 2017-12-15 12:26:40 -0700 | [diff] [blame] | 15 | #include <mrc_cache.h> |
Aaron Durbin | d04639b | 2016-07-17 23:23:59 -0500 | [diff] [blame] | 16 | #include <program_loading.h> |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 17 | #include <romstage_handoff.h> |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 18 | #include <string.h> |
Aaron Durbin | d04639b | 2016-07-17 23:23:59 -0500 | [diff] [blame] | 19 | #include <symbols.h> |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 20 | #include <timestamp.h> |
Philipp Deppenwiese | fea2429 | 2017-10-17 17:02:29 +0200 | [diff] [blame] | 21 | #include <security/vboot/vboot_common.h> |
Philipp Deppenwiese | 80961af | 2018-02-27 22:14:34 +0100 | [diff] [blame] | 22 | #include <security/tpm/tspi.h> |
Furquan Shaikh | 2db5bac | 2016-11-07 23:57:48 -0800 | [diff] [blame] | 23 | #include <vb2_api.h> |
Philipp Deppenwiese | 80961af | 2018-02-27 22:14:34 +0100 | [diff] [blame] | 24 | #include <fsp/memory_init.h> |
Elyes HAOUAS | bd1683d | 2019-05-15 21:05:37 +0200 | [diff] [blame] | 25 | #include <types.h> |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 26 | |
Kyösti Mälkki | c987150 | 2019-09-03 07:03:39 +0300 | [diff] [blame] | 27 | static uint8_t temp_ram[CONFIG_FSP_TEMP_RAM_SIZE] __aligned(sizeof(uint64_t)); |
| 28 | |
Joel Kitching | 2c8243c | 2019-03-11 17:47:24 +0800 | [diff] [blame] | 29 | /* TPM MRC hash functionality depends on vboot starting before memory init. */ |
| 30 | _Static_assert(!CONFIG(FSP2_0_USES_TPM_MRC_HASH) || |
| 31 | CONFIG(VBOOT_STARTS_IN_BOOTBLOCK), |
| 32 | "for TPM MRC hash functionality, vboot must start in bootblock"); |
| 33 | |
Aaron Durbin | f0ec824 | 2016-07-18 11:24:36 -0500 | [diff] [blame] | 34 | static void save_memory_training_data(bool s3wake, uint32_t fsp_version) |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 35 | { |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 36 | size_t mrc_data_size; |
| 37 | const void *mrc_data; |
Aaron Durbin | f0ec824 | 2016-07-18 11:24:36 -0500 | [diff] [blame] | 38 | |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 39 | if (!CONFIG(CACHE_MRC_SETTINGS) || s3wake) |
Aaron Durbin | f0ec824 | 2016-07-18 11:24:36 -0500 | [diff] [blame] | 40 | return; |
| 41 | |
| 42 | mrc_data = fsp_find_nv_storage_data(&mrc_data_size); |
| 43 | if (!mrc_data) { |
| 44 | printk(BIOS_ERR, "Couldn't find memory training data HOB.\n"); |
| 45 | return; |
| 46 | } |
| 47 | |
| 48 | /* |
| 49 | * Save MRC Data to CBMEM. By always saving the data this forces |
| 50 | * a retrain after a trip through Chrome OS recovery path. The |
| 51 | * code which saves the data to flash doesn't write if the latest |
| 52 | * training data matches this one. |
| 53 | */ |
Aaron Durbin | 31be2c9 | 2016-12-03 22:08:20 -0600 | [diff] [blame] | 54 | if (mrc_cache_stash_data(MRC_TRAINING_DATA, fsp_version, mrc_data, |
| 55 | mrc_data_size) < 0) |
| 56 | printk(BIOS_ERR, "Failed to stash MRC data\n"); |
Furquan Shaikh | 2db5bac | 2016-11-07 23:57:48 -0800 | [diff] [blame] | 57 | |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 58 | if (CONFIG(FSP2_0_USES_TPM_MRC_HASH)) |
Philipp Deppenwiese | 80961af | 2018-02-27 22:14:34 +0100 | [diff] [blame] | 59 | mrc_cache_update_hash(mrc_data, mrc_data_size); |
Aaron Durbin | f0ec824 | 2016-07-18 11:24:36 -0500 | [diff] [blame] | 60 | } |
| 61 | |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 62 | static void do_fsp_post_memory_init(bool s3wake, uint32_t fsp_version) |
Aaron Durbin | f0ec824 | 2016-07-18 11:24:36 -0500 | [diff] [blame] | 63 | { |
| 64 | struct range_entry fsp_mem; |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 65 | |
Michael Niewöhner | bc1dbb3 | 2019-10-24 22:58:25 +0200 | [diff] [blame] | 66 | fsp_find_reserved_memory(&fsp_mem); |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 67 | |
| 68 | /* initialize cbmem by adding FSP reserved memory first thing */ |
| 69 | if (!s3wake) { |
| 70 | cbmem_initialize_empty_id_size(CBMEM_ID_FSP_RESERVED_MEMORY, |
| 71 | range_entry_size(&fsp_mem)); |
| 72 | } else if (cbmem_initialize_id_size(CBMEM_ID_FSP_RESERVED_MEMORY, |
| 73 | range_entry_size(&fsp_mem))) { |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 74 | if (CONFIG(HAVE_ACPI_RESUME)) { |
Lee Leahy | b20d4ba | 2016-07-31 16:49:28 -0700 | [diff] [blame] | 75 | printk(BIOS_ERR, |
Lee Leahy | ac3b0a6 | 2016-07-27 07:40:25 -0700 | [diff] [blame] | 76 | "Failed to recover CBMEM in S3 resume.\n"); |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 77 | /* Failed S3 resume, reset to come up cleanly */ |
Patrick Rudolph | f677d17 | 2018-10-01 19:17:11 +0200 | [diff] [blame] | 78 | /* FIXME: A "system" reset is likely enough: */ |
| 79 | full_reset(); |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 80 | } |
| 81 | } |
| 82 | |
| 83 | /* make sure FSP memory is reserved in cbmem */ |
| 84 | if (range_entry_base(&fsp_mem) != |
| 85 | (uintptr_t)cbmem_find(CBMEM_ID_FSP_RESERVED_MEMORY)) |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 86 | die("Failed to accommodate FSP reserved memory request!\n"); |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 87 | |
Aaron Durbin | f0ec824 | 2016-07-18 11:24:36 -0500 | [diff] [blame] | 88 | save_memory_training_data(s3wake, fsp_version); |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 89 | |
| 90 | /* Create romstage handof information */ |
Aaron Durbin | 77e1399 | 2016-11-29 17:43:04 -0600 | [diff] [blame] | 91 | romstage_handoff_init(s3wake); |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 92 | } |
| 93 | |
Aamir Bohra | 69cd62c | 2018-01-08 11:01:34 +0530 | [diff] [blame] | 94 | static void fsp_fill_mrc_cache(FSPM_ARCH_UPD *arch_upd, uint32_t fsp_version) |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 95 | { |
Aaron Durbin | 31be2c9 | 2016-12-03 22:08:20 -0600 | [diff] [blame] | 96 | struct region_device rdev; |
| 97 | void *data; |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 98 | |
Aaron Durbin | f0ec824 | 2016-07-18 11:24:36 -0500 | [diff] [blame] | 99 | arch_upd->NvsBufferPtr = NULL; |
| 100 | |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 101 | if (!CONFIG(CACHE_MRC_SETTINGS)) |
Aaron Durbin | f0ec824 | 2016-07-18 11:24:36 -0500 | [diff] [blame] | 102 | return; |
| 103 | |
Aaron Durbin | 31be2c9 | 2016-12-03 22:08:20 -0600 | [diff] [blame] | 104 | /* |
| 105 | * In recovery mode, force retraining: |
| 106 | * 1. Recovery cache is not supported, or |
| 107 | * 2. Memory retrain switch is set. |
| 108 | */ |
| 109 | if (vboot_recovery_mode_enabled()) { |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 110 | if (!CONFIG(HAS_RECOVERY_MRC_CACHE)) |
Aaron Durbin | 31be2c9 | 2016-12-03 22:08:20 -0600 | [diff] [blame] | 111 | return; |
Joel Kitching | 9a29228 | 2020-03-06 13:44:50 +0800 | [diff] [blame] | 112 | if (get_recovery_mode_retrain_switch()) |
Aaron Durbin | 31be2c9 | 2016-12-03 22:08:20 -0600 | [diff] [blame] | 113 | return; |
| 114 | } |
Aaron Durbin | 98ea636 | 2016-07-18 11:31:53 -0500 | [diff] [blame] | 115 | |
Aaron Durbin | 31be2c9 | 2016-12-03 22:08:20 -0600 | [diff] [blame] | 116 | if (mrc_cache_get_current(MRC_TRAINING_DATA, fsp_version, &rdev) < 0) |
Aaron Durbin | f0ec824 | 2016-07-18 11:24:36 -0500 | [diff] [blame] | 117 | return; |
Aaron Durbin | f0ec824 | 2016-07-18 11:24:36 -0500 | [diff] [blame] | 118 | |
Aaron Durbin | 31be2c9 | 2016-12-03 22:08:20 -0600 | [diff] [blame] | 119 | /* Assume boot device is memory mapped. */ |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 120 | assert(CONFIG(BOOT_DEVICE_MEMORY_MAPPED)); |
Aaron Durbin | 31be2c9 | 2016-12-03 22:08:20 -0600 | [diff] [blame] | 121 | data = rdev_mmap_full(&rdev); |
| 122 | |
| 123 | if (data == NULL) |
| 124 | return; |
| 125 | |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 126 | if (CONFIG(FSP2_0_USES_TPM_MRC_HASH) && |
Philipp Deppenwiese | 80961af | 2018-02-27 22:14:34 +0100 | [diff] [blame] | 127 | !mrc_cache_verify_hash(data, region_device_sz(&rdev))) |
Furquan Shaikh | 2db5bac | 2016-11-07 23:57:48 -0800 | [diff] [blame] | 128 | return; |
| 129 | |
Aaron Durbin | f0ec824 | 2016-07-18 11:24:36 -0500 | [diff] [blame] | 130 | /* MRC cache found */ |
Aaron Durbin | 31be2c9 | 2016-12-03 22:08:20 -0600 | [diff] [blame] | 131 | arch_upd->NvsBufferPtr = data; |
Aamir Bohra | 69cd62c | 2018-01-08 11:01:34 +0530 | [diff] [blame] | 132 | |
| 133 | printk(BIOS_SPEW, "MRC cache found, size %zx\n", |
| 134 | region_device_sz(&rdev)); |
Aaron Durbin | f0ec824 | 2016-07-18 11:24:36 -0500 | [diff] [blame] | 135 | } |
| 136 | |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 137 | static enum cb_err check_region_overlap(const struct memranges *ranges, |
| 138 | const char *description, |
| 139 | uintptr_t begin, uintptr_t end) |
Aaron Durbin | f0ec824 | 2016-07-18 11:24:36 -0500 | [diff] [blame] | 140 | { |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 141 | const struct range_entry *r; |
| 142 | |
| 143 | memranges_each_entry(r, ranges) { |
| 144 | if (end <= range_entry_base(r)) |
| 145 | continue; |
| 146 | if (begin >= range_entry_end(r)) |
| 147 | continue; |
Lee Leahy | b20d4ba | 2016-07-31 16:49:28 -0700 | [diff] [blame] | 148 | printk(BIOS_CRIT, "'%s' overlaps currently running program: " |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 149 | "[%p, %p)\n", description, (void *)begin, (void *)end); |
| 150 | return CB_ERR; |
| 151 | } |
| 152 | |
| 153 | return CB_SUCCESS; |
| 154 | } |
Kyösti Mälkki | c987150 | 2019-09-03 07:03:39 +0300 | [diff] [blame] | 155 | |
Aamir Bohra | 6d569e0c | 2018-08-27 13:36:15 +0530 | [diff] [blame] | 156 | static enum cb_err setup_fsp_stack_frame(FSPM_ARCH_UPD *arch_upd, |
| 157 | const struct memranges *memmap) |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 158 | { |
| 159 | uintptr_t stack_begin; |
| 160 | uintptr_t stack_end; |
| 161 | |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 162 | /* |
Aamir Bohra | 6d569e0c | 2018-08-27 13:36:15 +0530 | [diff] [blame] | 163 | * FSPM_UPD passed here is populated with default values |
| 164 | * provided by the blob itself. We let FSPM use top of CAR |
| 165 | * region of the size it requests. |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 166 | */ |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 167 | stack_end = (uintptr_t)_car_region_end; |
| 168 | stack_begin = stack_end - arch_upd->StackSize; |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 169 | if (check_region_overlap(memmap, "FSPM stack", stack_begin, |
| 170 | stack_end) != CB_SUCCESS) |
| 171 | return CB_ERR; |
| 172 | |
| 173 | arch_upd->StackBase = (void *)stack_begin; |
Aamir Bohra | 6d569e0c | 2018-08-27 13:36:15 +0530 | [diff] [blame] | 174 | return CB_SUCCESS; |
| 175 | } |
| 176 | |
| 177 | static enum cb_err fsp_fill_common_arch_params(FSPM_ARCH_UPD *arch_upd, |
| 178 | bool s3wake, uint32_t fsp_version, |
| 179 | const struct memranges *memmap) |
| 180 | { |
Kyösti Mälkki | c987150 | 2019-09-03 07:03:39 +0300 | [diff] [blame] | 181 | /* |
| 182 | * FSP 2.1 version would use same stack as coreboot instead of |
| 183 | * setting up separate stack frame. FSP 2.1 would not relocate stack |
| 184 | * top and does not reinitialize stack pointer. The parameters passed |
| 185 | * as StackBase and StackSize are actually for temporary RAM and HOBs |
| 186 | * and are not related to FSP stack at all. |
| 187 | */ |
| 188 | if (CONFIG(FSP_USES_CB_STACK)) { |
| 189 | arch_upd->StackBase = temp_ram; |
| 190 | arch_upd->StackSize = sizeof(temp_ram); |
| 191 | } else if (setup_fsp_stack_frame(arch_upd, memmap)) { |
Aamir Bohra | 6d569e0c | 2018-08-27 13:36:15 +0530 | [diff] [blame] | 192 | return CB_ERR; |
Kyösti Mälkki | c987150 | 2019-09-03 07:03:39 +0300 | [diff] [blame] | 193 | } |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 194 | |
Aamir Bohra | 69cd62c | 2018-01-08 11:01:34 +0530 | [diff] [blame] | 195 | fsp_fill_mrc_cache(arch_upd, fsp_version); |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 196 | |
Aamir Bohra | 69cd62c | 2018-01-08 11:01:34 +0530 | [diff] [blame] | 197 | /* Configure bootmode */ |
| 198 | if (s3wake) { |
Aamir Bohra | 69cd62c | 2018-01-08 11:01:34 +0530 | [diff] [blame] | 199 | arch_upd->BootMode = FSP_BOOT_ON_S3_RESUME; |
| 200 | } else { |
| 201 | if (arch_upd->NvsBufferPtr) |
| 202 | arch_upd->BootMode = |
| 203 | FSP_BOOT_ASSUMING_NO_CONFIGURATION_CHANGES; |
| 204 | else |
| 205 | arch_upd->BootMode = FSP_BOOT_WITH_FULL_CONFIGURATION; |
| 206 | } |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 207 | |
Marshall Dawson | 22d66ef | 2019-08-30 14:52:37 -0600 | [diff] [blame] | 208 | printk(BIOS_SPEW, "bootmode is set to: %d\n", arch_upd->BootMode); |
Aamir Bohra | 276c06a | 2017-12-26 17:54:45 +0530 | [diff] [blame] | 209 | |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 210 | return CB_SUCCESS; |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 211 | } |
| 212 | |
Aaron Durbin | 6403167 | 2018-04-21 14:45:32 -0600 | [diff] [blame] | 213 | __weak |
Aaron Durbin | a3cecb2 | 2017-04-25 21:58:10 -0500 | [diff] [blame] | 214 | uint8_t fsp_memory_mainboard_version(void) |
| 215 | { |
| 216 | return 0; |
| 217 | } |
| 218 | |
Aaron Durbin | 6403167 | 2018-04-21 14:45:32 -0600 | [diff] [blame] | 219 | __weak |
Aaron Durbin | a3cecb2 | 2017-04-25 21:58:10 -0500 | [diff] [blame] | 220 | uint8_t fsp_memory_soc_version(void) |
| 221 | { |
| 222 | return 0; |
| 223 | } |
| 224 | |
| 225 | /* |
| 226 | * Allow SoC and/or mainboard to bump the revision of the FSP setting |
| 227 | * number. The FSP spec uses the low 8 bits as the build number. Take over |
| 228 | * bits 3:0 for the SoC setting and bits 7:4 for the mainboard. That way |
| 229 | * a tweak in the settings will bump the version used to track the cached |
| 230 | * setting which triggers retraining when the FSP version hasn't changed, but |
| 231 | * the SoC or mainboard settings have. |
| 232 | */ |
| 233 | static uint32_t fsp_memory_settings_version(const struct fsp_header *hdr) |
| 234 | { |
| 235 | /* Use the full FSP version by default. */ |
| 236 | uint32_t ver = hdr->fsp_revision; |
| 237 | |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 238 | if (!CONFIG(FSP_PLATFORM_MEMORY_SETTINGS_VERSIONS)) |
Aaron Durbin | a3cecb2 | 2017-04-25 21:58:10 -0500 | [diff] [blame] | 239 | return ver; |
| 240 | |
| 241 | ver &= ~0xff; |
| 242 | ver |= (0xf & fsp_memory_mainboard_version()) << 4; |
| 243 | ver |= (0xf & fsp_memory_soc_version()) << 0; |
| 244 | |
| 245 | return ver; |
| 246 | } |
| 247 | |
Aaron Durbin | ecbfa99 | 2020-05-15 17:01:58 -0600 | [diff] [blame] | 248 | struct fspm_context { |
| 249 | struct fsp_header header; |
| 250 | struct memranges memmap; |
| 251 | }; |
| 252 | |
| 253 | static void do_fsp_memory_init(const struct fspm_context *context, bool s3wake) |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 254 | { |
Brandon Breitenstein | c31ba0e | 2016-07-27 17:34:45 -0700 | [diff] [blame] | 255 | uint32_t status; |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 256 | fsp_memory_init_fn fsp_raminit; |
Brandon Breitenstein | c31ba0e | 2016-07-27 17:34:45 -0700 | [diff] [blame] | 257 | FSPM_UPD fspm_upd, *upd; |
| 258 | FSPM_ARCH_UPD *arch_upd; |
Aaron Durbin | a3cecb2 | 2017-04-25 21:58:10 -0500 | [diff] [blame] | 259 | uint32_t fsp_version; |
Aaron Durbin | ecbfa99 | 2020-05-15 17:01:58 -0600 | [diff] [blame] | 260 | const struct fsp_header *hdr = &context->header; |
| 261 | const struct memranges *memmap = &context->memmap; |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 262 | |
Furquan Shaikh | 585210a | 2018-10-16 11:54:37 -0700 | [diff] [blame] | 263 | post_code(POST_MEM_PREINIT_PREP_START); |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 264 | |
Aaron Durbin | a3cecb2 | 2017-04-25 21:58:10 -0500 | [diff] [blame] | 265 | fsp_version = fsp_memory_settings_version(hdr); |
| 266 | |
Brandon Breitenstein | c31ba0e | 2016-07-27 17:34:45 -0700 | [diff] [blame] | 267 | upd = (FSPM_UPD *)(hdr->cfg_region_offset + hdr->image_base); |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 268 | |
Lee Leahy | e686ee8 | 2017-03-10 08:45:30 -0800 | [diff] [blame] | 269 | if (upd->FspUpdHeader.Signature != FSPM_UPD_SIGNATURE) |
Keith Short | bb41aba | 2019-05-16 14:07:43 -0600 | [diff] [blame] | 270 | die_with_post_code(POST_INVALID_VENDOR_BINARY, |
| 271 | "Invalid FSPM signature!\n"); |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 272 | |
| 273 | /* Copy the default values from the UPD area */ |
| 274 | memcpy(&fspm_upd, upd, sizeof(fspm_upd)); |
| 275 | |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 276 | arch_upd = &fspm_upd.FspmArchUpd; |
| 277 | |
Aaron Durbin | 2792868 | 2016-07-15 22:32:28 -0500 | [diff] [blame] | 278 | /* Reserve enough memory under TOLUD to save CBMEM header */ |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 279 | arch_upd->BootLoaderTolumSize = cbmem_overhead_size(); |
Aaron Durbin | 2792868 | 2016-07-15 22:32:28 -0500 | [diff] [blame] | 280 | |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 281 | /* Fill common settings on behalf of chipset. */ |
Aaron Durbin | a3cecb2 | 2017-04-25 21:58:10 -0500 | [diff] [blame] | 282 | if (fsp_fill_common_arch_params(arch_upd, s3wake, fsp_version, |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 283 | memmap) != CB_SUCCESS) |
Keith Short | bb41aba | 2019-05-16 14:07:43 -0600 | [diff] [blame] | 284 | die_with_post_code(POST_INVALID_VENDOR_BINARY, |
| 285 | "FSPM_ARCH_UPD not found!\n"); |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 286 | |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 287 | /* Give SoC and mainboard a chance to update the UPD */ |
Aaron Durbin | a3cecb2 | 2017-04-25 21:58:10 -0500 | [diff] [blame] | 288 | platform_fsp_memory_init_params_cb(&fspm_upd, fsp_version); |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 289 | |
Furquan Shaikh | dbce8ba | 2020-06-05 19:17:00 -0700 | [diff] [blame^] | 290 | /* |
| 291 | * For S3 resume case, if valid mrc cache data is not found or |
| 292 | * RECOVERY_MRC_CACHE hash verification fails, the S3 data |
| 293 | * pointer would be null and S3 resume fails with fsp-m |
| 294 | * returning error. Invoking a reset here saves time. |
| 295 | */ |
| 296 | if (s3wake && !arch_upd->NvsBufferPtr) |
| 297 | /* FIXME: A "system" reset is likely enough: */ |
| 298 | full_reset(); |
| 299 | |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 300 | if (CONFIG(MMA)) |
Pratik Prajapati | ffc934d | 2016-11-18 14:36:34 -0800 | [diff] [blame] | 301 | setup_mma(&fspm_upd.FspmConfig); |
| 302 | |
Furquan Shaikh | 585210a | 2018-10-16 11:54:37 -0700 | [diff] [blame] | 303 | post_code(POST_MEM_PREINIT_PREP_END); |
| 304 | |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 305 | /* Call FspMemoryInit */ |
| 306 | fsp_raminit = (void *)(hdr->image_base + hdr->memory_init_entry_offset); |
Lee Leahy | ac3b0a6 | 2016-07-27 07:40:25 -0700 | [diff] [blame] | 307 | fsp_debug_before_memory_init(fsp_raminit, upd, &fspm_upd); |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 308 | |
Alexandru Gagniuc | c4ea8f7 | 2016-05-23 12:16:58 -0700 | [diff] [blame] | 309 | post_code(POST_FSP_MEMORY_INIT); |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 310 | timestamp_add_now(TS_FSP_MEMORY_INIT_START); |
Lee Leahy | ac3b0a6 | 2016-07-27 07:40:25 -0700 | [diff] [blame] | 311 | status = fsp_raminit(&fspm_upd, fsp_get_hob_list_ptr()); |
Subrata Banik | 0755ab9 | 2017-07-12 15:31:06 +0530 | [diff] [blame] | 312 | post_code(POST_FSP_MEMORY_EXIT); |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 313 | timestamp_add_now(TS_FSP_MEMORY_INIT_END); |
| 314 | |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 315 | /* Handle any errors returned by FspMemoryInit */ |
Aaron Durbin | f41f2aa | 2016-07-18 12:03:58 -0500 | [diff] [blame] | 316 | fsp_handle_reset(status); |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 317 | if (status != FSP_SUCCESS) { |
Lee Leahy | b20d4ba | 2016-07-31 16:49:28 -0700 | [diff] [blame] | 318 | printk(BIOS_CRIT, "FspMemoryInit returned 0x%08x\n", status); |
Keith Short | 2430263 | 2019-05-16 14:08:31 -0600 | [diff] [blame] | 319 | die_with_post_code(POST_RAM_FAILURE, |
| 320 | "FspMemoryInit returned an error!\n"); |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 321 | } |
Aaron Durbin | f41f2aa | 2016-07-18 12:03:58 -0500 | [diff] [blame] | 322 | |
Aaron Durbin | a3cecb2 | 2017-04-25 21:58:10 -0500 | [diff] [blame] | 323 | do_fsp_post_memory_init(s3wake, fsp_version); |
Matthew Garrett | 78b58a4 | 2018-07-28 16:53:16 -0700 | [diff] [blame] | 324 | |
| 325 | /* |
| 326 | * fsp_debug_after_memory_init() checks whether the end of the tolum |
| 327 | * region is the same as the top of cbmem, so must be called here |
| 328 | * after cbmem has been initialised in do_fsp_post_memory_init(). |
| 329 | */ |
| 330 | fsp_debug_after_memory_init(status); |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 331 | } |
| 332 | |
Aaron Durbin | ecbfa99 | 2020-05-15 17:01:58 -0600 | [diff] [blame] | 333 | static int fspm_get_dest(const struct fsp_load_descriptor *fspld, void **dest, |
| 334 | size_t size, const struct region_device *source) |
Aaron Durbin | d04639b | 2016-07-17 23:23:59 -0500 | [diff] [blame] | 335 | { |
Aaron Durbin | ecbfa99 | 2020-05-15 17:01:58 -0600 | [diff] [blame] | 336 | struct fspm_context *context = fspld->arg; |
| 337 | struct fsp_header *hdr = &context->header; |
| 338 | struct memranges *memmap = &context->memmap; |
Aaron Durbin | d04639b | 2016-07-17 23:23:59 -0500 | [diff] [blame] | 339 | uintptr_t fspm_begin; |
| 340 | uintptr_t fspm_end; |
| 341 | |
Aaron Durbin | ecbfa99 | 2020-05-15 17:01:58 -0600 | [diff] [blame] | 342 | if (CONFIG(FSP_M_XIP)) { |
| 343 | if (fsp_validate_component(hdr, source) != CB_SUCCESS) |
| 344 | return -1; |
Aaron Durbin | d04639b | 2016-07-17 23:23:59 -0500 | [diff] [blame] | 345 | |
Aaron Durbin | ecbfa99 | 2020-05-15 17:01:58 -0600 | [diff] [blame] | 346 | *dest = rdev_mmap_full(source); |
| 347 | if ((uintptr_t)*dest != hdr->image_base) { |
| 348 | printk(BIOS_CRIT, "FSPM XIP base does not match: %p vs %p\n", |
| 349 | (void *)(uintptr_t)hdr->image_base, *dest); |
| 350 | return -1; |
| 351 | } |
| 352 | /* Since the component is XIP it's already in the address space. |
| 353 | Thus, there's no need to rdev_munmap(). */ |
| 354 | return 0; |
Aaron Durbin | d04639b | 2016-07-17 23:23:59 -0500 | [diff] [blame] | 355 | } |
| 356 | |
Aaron Durbin | ecbfa99 | 2020-05-15 17:01:58 -0600 | [diff] [blame] | 357 | /* Non XIP FSP-M uses FSP-M address */ |
| 358 | fspm_begin = (uintptr_t)CONFIG_FSP_M_ADDR; |
| 359 | fspm_end = fspm_begin + size; |
| 360 | |
| 361 | if (check_region_overlap(memmap, "FSPM", fspm_begin, fspm_end) != CB_SUCCESS) |
| 362 | return -1; |
| 363 | |
| 364 | *dest = (void *)fspm_begin; |
| 365 | |
| 366 | return 0; |
Aaron Durbin | d04639b | 2016-07-17 23:23:59 -0500 | [diff] [blame] | 367 | } |
| 368 | |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 369 | void fsp_memory_init(bool s3wake) |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 370 | { |
Marshall Dawson | e3aa424 | 2019-10-16 21:53:21 -0600 | [diff] [blame] | 371 | struct range_entry prog_ranges[2]; |
Aaron Durbin | ecbfa99 | 2020-05-15 17:01:58 -0600 | [diff] [blame] | 372 | struct fspm_context context; |
| 373 | struct fsp_load_descriptor fspld = { |
| 374 | .fsp_prog = PROG_INIT(PROG_REFCODE, CONFIG_FSP_M_CBFS), |
| 375 | .get_destination = fspm_get_dest, |
| 376 | .arg = &context, |
| 377 | }; |
| 378 | struct fsp_header *hdr = &context.header; |
| 379 | struct memranges *memmap = &context.memmap; |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 380 | |
Kyösti Mälkki | 7f50afb | 2019-09-11 17:12:26 +0300 | [diff] [blame] | 381 | elog_boot_notify(s3wake); |
Furquan Shaikh | 5aea588 | 2016-07-30 18:10:05 -0700 | [diff] [blame] | 382 | |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 383 | /* Build up memory map of romstage address space including CAR. */ |
Aaron Durbin | ecbfa99 | 2020-05-15 17:01:58 -0600 | [diff] [blame] | 384 | memranges_init_empty(memmap, &prog_ranges[0], ARRAY_SIZE(prog_ranges)); |
Marshall Dawson | e3aa424 | 2019-10-16 21:53:21 -0600 | [diff] [blame] | 385 | if (ENV_CACHE_AS_RAM) |
Aaron Durbin | ecbfa99 | 2020-05-15 17:01:58 -0600 | [diff] [blame] | 386 | memranges_insert(memmap, (uintptr_t)_car_region_start, |
Marshall Dawson | e3aa424 | 2019-10-16 21:53:21 -0600 | [diff] [blame] | 387 | _car_unallocated_start - _car_region_start, 0); |
Aaron Durbin | ecbfa99 | 2020-05-15 17:01:58 -0600 | [diff] [blame] | 388 | memranges_insert(memmap, (uintptr_t)_program, REGION_SIZE(program), 0); |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 389 | |
Aaron Durbin | ecbfa99 | 2020-05-15 17:01:58 -0600 | [diff] [blame] | 390 | if (fsp_load_component(&fspld, hdr) != CB_SUCCESS) |
| 391 | die("FSPM not available or failed to load!\n"); |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 392 | |
Kyösti Mälkki | 216db61 | 2019-09-11 09:57:14 +0300 | [diff] [blame] | 393 | timestamp_add_now(TS_BEFORE_INITRAM); |
| 394 | |
Aaron Durbin | ecbfa99 | 2020-05-15 17:01:58 -0600 | [diff] [blame] | 395 | do_fsp_memory_init(&context, s3wake); |
Kyösti Mälkki | 0889e93 | 2019-08-18 07:40:43 +0300 | [diff] [blame] | 396 | |
| 397 | timestamp_add_now(TS_AFTER_INITRAM); |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 398 | } |