Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
Lee Leahy | 47bd2d9 | 2016-07-24 18:12:16 -0700 | [diff] [blame] | 4 | * Copyright (C) 2015-2016 Intel Corp. |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 5 | * (Written by Andrey Petrov <andrey.petrov@intel.com> for Intel Corp.) |
| 6 | * (Written by Alexandru Gagniuc <alexandrux.gagniuc@intel.com> for Intel Corp.) |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License as published by |
| 10 | * the Free Software Foundation; either version 2 of the License, or |
| 11 | * (at your option) any later version. |
| 12 | */ |
| 13 | |
Stefan Reinauer | 6a00113 | 2017-07-13 02:20:27 +0200 | [diff] [blame] | 14 | #include <compiler.h> |
Furquan Shaikh | 2db5bac | 2016-11-07 23:57:48 -0800 | [diff] [blame] | 15 | #include <antirollback.h> |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 16 | #include <arch/io.h> |
| 17 | #include <arch/cpu.h> |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 18 | #include <arch/symbols.h> |
Aaron Durbin | 31be2c9 | 2016-12-03 22:08:20 -0600 | [diff] [blame] | 19 | #include <assert.h> |
Aaron Durbin | d04639b | 2016-07-17 23:23:59 -0500 | [diff] [blame] | 20 | #include <cbfs.h> |
Aaron Durbin | 2792868 | 2016-07-15 22:32:28 -0500 | [diff] [blame] | 21 | #include <cbmem.h> |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 22 | #include <console/console.h> |
Furquan Shaikh | 5aea588 | 2016-07-30 18:10:05 -0700 | [diff] [blame] | 23 | #include <elog.h> |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 24 | #include <fsp/api.h> |
| 25 | #include <fsp/util.h> |
| 26 | #include <memrange.h> |
Aaron Durbin | d04639b | 2016-07-17 23:23:59 -0500 | [diff] [blame] | 27 | #include <program_loading.h> |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 28 | #include <reset.h> |
| 29 | #include <romstage_handoff.h> |
| 30 | #include <soc/intel/common/mrc_cache.h> |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 31 | #include <string.h> |
Aaron Durbin | d04639b | 2016-07-17 23:23:59 -0500 | [diff] [blame] | 32 | #include <symbols.h> |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 33 | #include <timestamp.h> |
Furquan Shaikh | 2db5bac | 2016-11-07 23:57:48 -0800 | [diff] [blame] | 34 | #include <tpm_lite/tlcl.h> |
Philipp Deppenwiese | fea2429 | 2017-10-17 17:02:29 +0200 | [diff] [blame^] | 35 | #include <security/vboot/vboot_common.h> |
Furquan Shaikh | 2db5bac | 2016-11-07 23:57:48 -0800 | [diff] [blame] | 36 | #include <vb2_api.h> |
| 37 | |
Furquan Shaikh | 2db5bac | 2016-11-07 23:57:48 -0800 | [diff] [blame] | 38 | static void mrc_cache_update_tpm_hash(const uint8_t *data, size_t size) |
| 39 | { |
| 40 | uint8_t data_hash[VB2_SHA256_DIGEST_SIZE]; |
| 41 | static const uint8_t dead_hash[VB2_SHA256_DIGEST_SIZE] = { |
| 42 | 0xba, 0xad, 0xda, 0x1a, /* BAADDA1A */ |
| 43 | 0xde, 0xad, 0xde, 0xad, /* DEADDEAD */ |
| 44 | 0xde, 0xad, 0xda, 0x1a, /* DEADDA1A */ |
| 45 | 0xba, 0xad, 0xba, 0xad, /* BAADBAAD */ |
| 46 | 0xba, 0xad, 0xda, 0x1a, /* BAADDA1A */ |
| 47 | 0xde, 0xad, 0xde, 0xad, /* DEADDEAD */ |
| 48 | 0xde, 0xad, 0xda, 0x1a, /* DEADDA1A */ |
| 49 | 0xba, 0xad, 0xba, 0xad, /* BAADBAAD */ |
| 50 | }; |
| 51 | const uint8_t *hash_ptr = data_hash; |
| 52 | |
| 53 | /* We do not store normal mode data hash in TPM. */ |
| 54 | if (!vboot_recovery_mode_enabled()) |
| 55 | return; |
| 56 | |
| 57 | /* Bail out early if no mrc hash space is supported in TPM. */ |
| 58 | if (!IS_ENABLED(CONFIG_FSP2_0_USES_TPM_MRC_HASH)) |
| 59 | return; |
| 60 | |
| 61 | /* Initialize TPM driver. */ |
Furquan Shaikh | 8b5d04e | 2016-11-10 09:49:05 -0800 | [diff] [blame] | 62 | if (tlcl_lib_init() != VB2_SUCCESS) { |
Furquan Shaikh | 2db5bac | 2016-11-07 23:57:48 -0800 | [diff] [blame] | 63 | printk(BIOS_ERR, "MRC: TPM driver initialization failed.\n"); |
| 64 | return; |
| 65 | } |
| 66 | |
| 67 | /* Calculate hash of data generated by MRC. */ |
| 68 | if (vb2_digest_buffer(data, size, VB2_HASH_SHA256, data_hash, |
| 69 | sizeof(data_hash))) { |
| 70 | printk(BIOS_ERR, "MRC: SHA-256 calculation failed for data. " |
| 71 | "Not updating TPM hash space.\n"); |
| 72 | /* |
| 73 | * Since data is being updated in recovery cache, the hash |
| 74 | * currently stored in TPM recovery hash space is no longer |
| 75 | * valid. If we are not able to calculate hash of the data being |
| 76 | * updated, reset all the bits in TPM recovery hash space to |
| 77 | * pre-defined hash pattern. |
| 78 | */ |
| 79 | hash_ptr = dead_hash; |
| 80 | } |
| 81 | |
| 82 | /* Write hash of data to TPM space. */ |
| 83 | if (antirollback_write_space_rec_hash(hash_ptr, VB2_SHA256_DIGEST_SIZE) |
| 84 | != TPM_SUCCESS) { |
| 85 | printk(BIOS_ERR, "MRC: Could not save hash to TPM.\n"); |
| 86 | return; |
| 87 | } |
| 88 | |
| 89 | printk(BIOS_INFO, "MRC: TPM MRC hash updated successfully.\n"); |
| 90 | } |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 91 | |
Aaron Durbin | f0ec824 | 2016-07-18 11:24:36 -0500 | [diff] [blame] | 92 | static void save_memory_training_data(bool s3wake, uint32_t fsp_version) |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 93 | { |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 94 | size_t mrc_data_size; |
| 95 | const void *mrc_data; |
Aaron Durbin | f0ec824 | 2016-07-18 11:24:36 -0500 | [diff] [blame] | 96 | |
| 97 | if (!IS_ENABLED(CONFIG_CACHE_MRC_SETTINGS) || s3wake) |
| 98 | return; |
| 99 | |
| 100 | mrc_data = fsp_find_nv_storage_data(&mrc_data_size); |
| 101 | if (!mrc_data) { |
| 102 | printk(BIOS_ERR, "Couldn't find memory training data HOB.\n"); |
| 103 | return; |
| 104 | } |
| 105 | |
| 106 | /* |
| 107 | * Save MRC Data to CBMEM. By always saving the data this forces |
| 108 | * a retrain after a trip through Chrome OS recovery path. The |
| 109 | * code which saves the data to flash doesn't write if the latest |
| 110 | * training data matches this one. |
| 111 | */ |
Aaron Durbin | 31be2c9 | 2016-12-03 22:08:20 -0600 | [diff] [blame] | 112 | if (mrc_cache_stash_data(MRC_TRAINING_DATA, fsp_version, mrc_data, |
| 113 | mrc_data_size) < 0) |
| 114 | printk(BIOS_ERR, "Failed to stash MRC data\n"); |
Furquan Shaikh | 2db5bac | 2016-11-07 23:57:48 -0800 | [diff] [blame] | 115 | |
| 116 | mrc_cache_update_tpm_hash(mrc_data, mrc_data_size); |
Aaron Durbin | f0ec824 | 2016-07-18 11:24:36 -0500 | [diff] [blame] | 117 | } |
| 118 | |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 119 | static void do_fsp_post_memory_init(bool s3wake, uint32_t fsp_version) |
Aaron Durbin | f0ec824 | 2016-07-18 11:24:36 -0500 | [diff] [blame] | 120 | { |
| 121 | struct range_entry fsp_mem; |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 122 | |
Lee Leahy | 52d0c68 | 2016-08-01 15:47:42 -0700 | [diff] [blame] | 123 | if (fsp_find_reserved_memory(&fsp_mem)) |
| 124 | die("Failed to find FSP_RESERVED_MEMORY_RESOURCE_HOB!\n"); |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 125 | |
| 126 | /* initialize cbmem by adding FSP reserved memory first thing */ |
| 127 | if (!s3wake) { |
| 128 | cbmem_initialize_empty_id_size(CBMEM_ID_FSP_RESERVED_MEMORY, |
| 129 | range_entry_size(&fsp_mem)); |
| 130 | } else if (cbmem_initialize_id_size(CBMEM_ID_FSP_RESERVED_MEMORY, |
| 131 | range_entry_size(&fsp_mem))) { |
| 132 | if (IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)) { |
Lee Leahy | b20d4ba | 2016-07-31 16:49:28 -0700 | [diff] [blame] | 133 | printk(BIOS_ERR, |
Lee Leahy | ac3b0a6 | 2016-07-27 07:40:25 -0700 | [diff] [blame] | 134 | "Failed to recover CBMEM in S3 resume.\n"); |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 135 | /* Failed S3 resume, reset to come up cleanly */ |
| 136 | hard_reset(); |
| 137 | } |
| 138 | } |
| 139 | |
| 140 | /* make sure FSP memory is reserved in cbmem */ |
| 141 | if (range_entry_base(&fsp_mem) != |
| 142 | (uintptr_t)cbmem_find(CBMEM_ID_FSP_RESERVED_MEMORY)) |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 143 | die("Failed to accommodate FSP reserved memory request!\n"); |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 144 | |
Aaron Durbin | f0ec824 | 2016-07-18 11:24:36 -0500 | [diff] [blame] | 145 | save_memory_training_data(s3wake, fsp_version); |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 146 | |
| 147 | /* Create romstage handof information */ |
Aaron Durbin | 77e1399 | 2016-11-29 17:43:04 -0600 | [diff] [blame] | 148 | romstage_handoff_init(s3wake); |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 149 | } |
| 150 | |
Furquan Shaikh | 2db5bac | 2016-11-07 23:57:48 -0800 | [diff] [blame] | 151 | static int mrc_cache_verify_tpm_hash(const uint8_t *data, size_t size) |
| 152 | { |
| 153 | uint8_t data_hash[VB2_SHA256_DIGEST_SIZE]; |
| 154 | uint8_t tpm_hash[VB2_SHA256_DIGEST_SIZE]; |
| 155 | |
| 156 | /* We do not store normal mode data hash in TPM. */ |
| 157 | if (!vboot_recovery_mode_enabled()) |
| 158 | return 1; |
| 159 | |
| 160 | if (!IS_ENABLED(CONFIG_FSP2_0_USES_TPM_MRC_HASH)) |
| 161 | return 1; |
| 162 | |
| 163 | /* Calculate hash of data read from RECOVERY_MRC_CACHE. */ |
| 164 | if (vb2_digest_buffer(data, size, VB2_HASH_SHA256, data_hash, |
| 165 | sizeof(data_hash))) { |
| 166 | printk(BIOS_ERR, "MRC: SHA-256 calculation failed for data.\n"); |
| 167 | return 0; |
| 168 | } |
| 169 | |
| 170 | /* Initialize TPM driver. */ |
Furquan Shaikh | 8b5d04e | 2016-11-10 09:49:05 -0800 | [diff] [blame] | 171 | if (tlcl_lib_init() != VB2_SUCCESS) { |
Furquan Shaikh | 2db5bac | 2016-11-07 23:57:48 -0800 | [diff] [blame] | 172 | printk(BIOS_ERR, "MRC: TPM driver initialization failed.\n"); |
| 173 | return 0; |
| 174 | } |
| 175 | |
| 176 | /* Read hash of MRC data saved in TPM. */ |
| 177 | if (antirollback_read_space_rec_hash(tpm_hash, sizeof(tpm_hash)) |
| 178 | != TPM_SUCCESS) { |
| 179 | printk(BIOS_ERR, "MRC: Could not read hash from TPM.\n"); |
| 180 | return 0; |
| 181 | } |
| 182 | |
| 183 | if (memcmp(tpm_hash, data_hash, sizeof(tpm_hash))) { |
| 184 | printk(BIOS_ERR, "MRC: Hash comparison failed.\n"); |
| 185 | return 0; |
| 186 | } |
| 187 | |
| 188 | printk(BIOS_INFO, "MRC: Hash comparison successful. " |
| 189 | "Using data from RECOVERY_MRC_CACHE\n"); |
| 190 | return 1; |
| 191 | } |
| 192 | |
Brandon Breitenstein | c31ba0e | 2016-07-27 17:34:45 -0700 | [diff] [blame] | 193 | static void fsp_fill_mrc_cache(FSPM_ARCH_UPD *arch_upd, bool s3wake, |
Aaron Durbin | f0ec824 | 2016-07-18 11:24:36 -0500 | [diff] [blame] | 194 | uint32_t fsp_version) |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 195 | { |
Aaron Durbin | 31be2c9 | 2016-12-03 22:08:20 -0600 | [diff] [blame] | 196 | struct region_device rdev; |
| 197 | void *data; |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 198 | |
Aaron Durbin | f0ec824 | 2016-07-18 11:24:36 -0500 | [diff] [blame] | 199 | arch_upd->NvsBufferPtr = NULL; |
| 200 | |
| 201 | if (!IS_ENABLED(CONFIG_CACHE_MRC_SETTINGS)) |
| 202 | return; |
| 203 | |
Aaron Durbin | 31be2c9 | 2016-12-03 22:08:20 -0600 | [diff] [blame] | 204 | /* |
| 205 | * In recovery mode, force retraining: |
| 206 | * 1. Recovery cache is not supported, or |
| 207 | * 2. Memory retrain switch is set. |
| 208 | */ |
| 209 | if (vboot_recovery_mode_enabled()) { |
| 210 | if (!IS_ENABLED(CONFIG_HAS_RECOVERY_MRC_CACHE)) |
| 211 | return; |
| 212 | if (vboot_recovery_mode_memory_retrain()) |
| 213 | return; |
| 214 | } |
Aaron Durbin | 98ea636 | 2016-07-18 11:31:53 -0500 | [diff] [blame] | 215 | |
Aaron Durbin | 31be2c9 | 2016-12-03 22:08:20 -0600 | [diff] [blame] | 216 | if (mrc_cache_get_current(MRC_TRAINING_DATA, fsp_version, &rdev) < 0) |
Aaron Durbin | f0ec824 | 2016-07-18 11:24:36 -0500 | [diff] [blame] | 217 | return; |
Aaron Durbin | f0ec824 | 2016-07-18 11:24:36 -0500 | [diff] [blame] | 218 | |
Aaron Durbin | 31be2c9 | 2016-12-03 22:08:20 -0600 | [diff] [blame] | 219 | /* Assume boot device is memory mapped. */ |
| 220 | assert(IS_ENABLED(CONFIG_BOOT_DEVICE_MEMORY_MAPPED)); |
| 221 | data = rdev_mmap_full(&rdev); |
| 222 | |
| 223 | if (data == NULL) |
| 224 | return; |
| 225 | |
| 226 | if (!mrc_cache_verify_tpm_hash(data, region_device_sz(&rdev))) |
Furquan Shaikh | 2db5bac | 2016-11-07 23:57:48 -0800 | [diff] [blame] | 227 | return; |
| 228 | |
Aaron Durbin | f0ec824 | 2016-07-18 11:24:36 -0500 | [diff] [blame] | 229 | /* MRC cache found */ |
Aaron Durbin | 31be2c9 | 2016-12-03 22:08:20 -0600 | [diff] [blame] | 230 | arch_upd->NvsBufferPtr = data; |
Aaron Durbin | f0ec824 | 2016-07-18 11:24:36 -0500 | [diff] [blame] | 231 | arch_upd->BootMode = s3wake ? |
Lee Leahy | b2b97a5 | 2017-03-10 08:40:18 -0800 | [diff] [blame] | 232 | FSP_BOOT_ON_S3_RESUME : |
Aaron Durbin | f0ec824 | 2016-07-18 11:24:36 -0500 | [diff] [blame] | 233 | FSP_BOOT_ASSUMING_NO_CONFIGURATION_CHANGES; |
Aaron Durbin | 31be2c9 | 2016-12-03 22:08:20 -0600 | [diff] [blame] | 234 | printk(BIOS_SPEW, "MRC cache found, size %zx bootmode:%d\n", |
| 235 | region_device_sz(&rdev), arch_upd->BootMode); |
Aaron Durbin | f0ec824 | 2016-07-18 11:24:36 -0500 | [diff] [blame] | 236 | } |
| 237 | |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 238 | static enum cb_err check_region_overlap(const struct memranges *ranges, |
| 239 | const char *description, |
| 240 | uintptr_t begin, uintptr_t end) |
Aaron Durbin | f0ec824 | 2016-07-18 11:24:36 -0500 | [diff] [blame] | 241 | { |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 242 | const struct range_entry *r; |
| 243 | |
| 244 | memranges_each_entry(r, ranges) { |
| 245 | if (end <= range_entry_base(r)) |
| 246 | continue; |
| 247 | if (begin >= range_entry_end(r)) |
| 248 | continue; |
Lee Leahy | b20d4ba | 2016-07-31 16:49:28 -0700 | [diff] [blame] | 249 | printk(BIOS_CRIT, "'%s' overlaps currently running program: " |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 250 | "[%p, %p)\n", description, (void *)begin, (void *)end); |
| 251 | return CB_ERR; |
| 252 | } |
| 253 | |
| 254 | return CB_SUCCESS; |
| 255 | } |
| 256 | |
Brandon Breitenstein | c31ba0e | 2016-07-27 17:34:45 -0700 | [diff] [blame] | 257 | static enum cb_err fsp_fill_common_arch_params(FSPM_ARCH_UPD *arch_upd, |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 258 | bool s3wake, uint32_t fsp_version, |
| 259 | const struct memranges *memmap) |
| 260 | { |
| 261 | uintptr_t stack_begin; |
| 262 | uintptr_t stack_end; |
| 263 | |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 264 | /* |
| 265 | * FSPM_UPD passed here is populated with default values provided by |
| 266 | * the blob itself. We let FSPM use top of CAR region of the size it |
| 267 | * requests. |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 268 | */ |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 269 | stack_end = (uintptr_t)_car_region_end; |
| 270 | stack_begin = stack_end - arch_upd->StackSize; |
| 271 | |
| 272 | if (check_region_overlap(memmap, "FSPM stack", stack_begin, |
| 273 | stack_end) != CB_SUCCESS) |
| 274 | return CB_ERR; |
| 275 | |
| 276 | arch_upd->StackBase = (void *)stack_begin; |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 277 | |
| 278 | arch_upd->BootMode = FSP_BOOT_WITH_FULL_CONFIGURATION; |
| 279 | |
Aaron Durbin | f0ec824 | 2016-07-18 11:24:36 -0500 | [diff] [blame] | 280 | fsp_fill_mrc_cache(arch_upd, s3wake, fsp_version); |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 281 | |
| 282 | return CB_SUCCESS; |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 283 | } |
| 284 | |
Stefan Reinauer | 6a00113 | 2017-07-13 02:20:27 +0200 | [diff] [blame] | 285 | __attribute__((weak)) |
Aaron Durbin | a3cecb2 | 2017-04-25 21:58:10 -0500 | [diff] [blame] | 286 | uint8_t fsp_memory_mainboard_version(void) |
| 287 | { |
| 288 | return 0; |
| 289 | } |
| 290 | |
Stefan Reinauer | 6a00113 | 2017-07-13 02:20:27 +0200 | [diff] [blame] | 291 | __attribute__((weak)) |
Aaron Durbin | a3cecb2 | 2017-04-25 21:58:10 -0500 | [diff] [blame] | 292 | uint8_t fsp_memory_soc_version(void) |
| 293 | { |
| 294 | return 0; |
| 295 | } |
| 296 | |
| 297 | /* |
| 298 | * Allow SoC and/or mainboard to bump the revision of the FSP setting |
| 299 | * number. The FSP spec uses the low 8 bits as the build number. Take over |
| 300 | * bits 3:0 for the SoC setting and bits 7:4 for the mainboard. That way |
| 301 | * a tweak in the settings will bump the version used to track the cached |
| 302 | * setting which triggers retraining when the FSP version hasn't changed, but |
| 303 | * the SoC or mainboard settings have. |
| 304 | */ |
| 305 | static uint32_t fsp_memory_settings_version(const struct fsp_header *hdr) |
| 306 | { |
| 307 | /* Use the full FSP version by default. */ |
| 308 | uint32_t ver = hdr->fsp_revision; |
| 309 | |
| 310 | if (!IS_ENABLED(CONFIG_FSP_PLATFORM_MEMORY_SETTINGS_VERSIONS)) |
| 311 | return ver; |
| 312 | |
| 313 | ver &= ~0xff; |
| 314 | ver |= (0xf & fsp_memory_mainboard_version()) << 4; |
| 315 | ver |= (0xf & fsp_memory_soc_version()) << 0; |
| 316 | |
| 317 | return ver; |
| 318 | } |
| 319 | |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 320 | static void do_fsp_memory_init(struct fsp_header *hdr, bool s3wake, |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 321 | const struct memranges *memmap) |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 322 | { |
Brandon Breitenstein | c31ba0e | 2016-07-27 17:34:45 -0700 | [diff] [blame] | 323 | uint32_t status; |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 324 | fsp_memory_init_fn fsp_raminit; |
Brandon Breitenstein | c31ba0e | 2016-07-27 17:34:45 -0700 | [diff] [blame] | 325 | FSPM_UPD fspm_upd, *upd; |
| 326 | FSPM_ARCH_UPD *arch_upd; |
Aaron Durbin | a3cecb2 | 2017-04-25 21:58:10 -0500 | [diff] [blame] | 327 | uint32_t fsp_version; |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 328 | |
| 329 | post_code(0x34); |
| 330 | |
Aaron Durbin | a3cecb2 | 2017-04-25 21:58:10 -0500 | [diff] [blame] | 331 | fsp_version = fsp_memory_settings_version(hdr); |
| 332 | |
Brandon Breitenstein | c31ba0e | 2016-07-27 17:34:45 -0700 | [diff] [blame] | 333 | upd = (FSPM_UPD *)(hdr->cfg_region_offset + hdr->image_base); |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 334 | |
Lee Leahy | e686ee8 | 2017-03-10 08:45:30 -0800 | [diff] [blame] | 335 | if (upd->FspUpdHeader.Signature != FSPM_UPD_SIGNATURE) |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 336 | die("Invalid FSPM signature!\n"); |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 337 | |
| 338 | /* Copy the default values from the UPD area */ |
| 339 | memcpy(&fspm_upd, upd, sizeof(fspm_upd)); |
| 340 | |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 341 | arch_upd = &fspm_upd.FspmArchUpd; |
| 342 | |
Aaron Durbin | 2792868 | 2016-07-15 22:32:28 -0500 | [diff] [blame] | 343 | /* Reserve enough memory under TOLUD to save CBMEM header */ |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 344 | arch_upd->BootLoaderTolumSize = cbmem_overhead_size(); |
Aaron Durbin | 2792868 | 2016-07-15 22:32:28 -0500 | [diff] [blame] | 345 | |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 346 | /* Fill common settings on behalf of chipset. */ |
Aaron Durbin | a3cecb2 | 2017-04-25 21:58:10 -0500 | [diff] [blame] | 347 | if (fsp_fill_common_arch_params(arch_upd, s3wake, fsp_version, |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 348 | memmap) != CB_SUCCESS) |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 349 | die("FSPM_ARCH_UPD not found!\n"); |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 350 | |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 351 | /* Give SoC and mainboard a chance to update the UPD */ |
Aaron Durbin | a3cecb2 | 2017-04-25 21:58:10 -0500 | [diff] [blame] | 352 | platform_fsp_memory_init_params_cb(&fspm_upd, fsp_version); |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 353 | |
Pratik Prajapati | ffc934d | 2016-11-18 14:36:34 -0800 | [diff] [blame] | 354 | if (IS_ENABLED(CONFIG_MMA)) |
| 355 | setup_mma(&fspm_upd.FspmConfig); |
| 356 | |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 357 | /* Call FspMemoryInit */ |
| 358 | fsp_raminit = (void *)(hdr->image_base + hdr->memory_init_entry_offset); |
Lee Leahy | ac3b0a6 | 2016-07-27 07:40:25 -0700 | [diff] [blame] | 359 | fsp_debug_before_memory_init(fsp_raminit, upd, &fspm_upd); |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 360 | |
Alexandru Gagniuc | c4ea8f7 | 2016-05-23 12:16:58 -0700 | [diff] [blame] | 361 | post_code(POST_FSP_MEMORY_INIT); |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 362 | timestamp_add_now(TS_FSP_MEMORY_INIT_START); |
Lee Leahy | ac3b0a6 | 2016-07-27 07:40:25 -0700 | [diff] [blame] | 363 | status = fsp_raminit(&fspm_upd, fsp_get_hob_list_ptr()); |
Subrata Banik | 0755ab9 | 2017-07-12 15:31:06 +0530 | [diff] [blame] | 364 | post_code(POST_FSP_MEMORY_EXIT); |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 365 | timestamp_add_now(TS_FSP_MEMORY_INIT_END); |
| 366 | |
Lee Leahy | ac3b0a6 | 2016-07-27 07:40:25 -0700 | [diff] [blame] | 367 | fsp_debug_after_memory_init(status); |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 368 | |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 369 | /* Handle any errors returned by FspMemoryInit */ |
Aaron Durbin | f41f2aa | 2016-07-18 12:03:58 -0500 | [diff] [blame] | 370 | fsp_handle_reset(status); |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 371 | if (status != FSP_SUCCESS) { |
Lee Leahy | b20d4ba | 2016-07-31 16:49:28 -0700 | [diff] [blame] | 372 | printk(BIOS_CRIT, "FspMemoryInit returned 0x%08x\n", status); |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 373 | die("FspMemoryInit returned an error!\n"); |
| 374 | } |
Aaron Durbin | f41f2aa | 2016-07-18 12:03:58 -0500 | [diff] [blame] | 375 | |
Aaron Durbin | a3cecb2 | 2017-04-25 21:58:10 -0500 | [diff] [blame] | 376 | do_fsp_post_memory_init(s3wake, fsp_version); |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 377 | } |
| 378 | |
Aaron Durbin | d04639b | 2016-07-17 23:23:59 -0500 | [diff] [blame] | 379 | /* Load the binary into the memory specified by the info header. */ |
| 380 | static enum cb_err load_fspm_mem(struct fsp_header *hdr, |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 381 | const struct region_device *rdev, |
| 382 | const struct memranges *memmap) |
Aaron Durbin | d04639b | 2016-07-17 23:23:59 -0500 | [diff] [blame] | 383 | { |
Aaron Durbin | d04639b | 2016-07-17 23:23:59 -0500 | [diff] [blame] | 384 | uintptr_t fspm_begin; |
| 385 | uintptr_t fspm_end; |
| 386 | |
| 387 | if (fsp_validate_component(hdr, rdev) != CB_SUCCESS) |
| 388 | return CB_ERR; |
| 389 | |
| 390 | fspm_begin = hdr->image_base; |
| 391 | fspm_end = fspm_begin + hdr->image_size; |
| 392 | |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 393 | if (check_region_overlap(memmap, "FSPM", fspm_begin, fspm_end) != |
| 394 | CB_SUCCESS) |
Aaron Durbin | d04639b | 2016-07-17 23:23:59 -0500 | [diff] [blame] | 395 | return CB_ERR; |
Aaron Durbin | d04639b | 2016-07-17 23:23:59 -0500 | [diff] [blame] | 396 | |
| 397 | /* Load binary into memory at provided address. */ |
| 398 | if (rdev_readat(rdev, (void *)fspm_begin, 0, fspm_end - fspm_begin) < 0) |
| 399 | return CB_ERR; |
| 400 | |
| 401 | return CB_SUCCESS; |
| 402 | } |
| 403 | |
| 404 | /* Handle the case when FSPM is running XIP. */ |
| 405 | static enum cb_err load_fspm_xip(struct fsp_header *hdr, |
| 406 | const struct region_device *rdev) |
| 407 | { |
| 408 | void *base; |
| 409 | |
| 410 | if (fsp_validate_component(hdr, rdev) != CB_SUCCESS) |
| 411 | return CB_ERR; |
| 412 | |
| 413 | base = rdev_mmap_full(rdev); |
| 414 | if ((uintptr_t)base != hdr->image_base) { |
Lee Leahy | b20d4ba | 2016-07-31 16:49:28 -0700 | [diff] [blame] | 415 | printk(BIOS_CRIT, "FSPM XIP base does not match: %p vs %p\n", |
Aaron Durbin | d04639b | 2016-07-17 23:23:59 -0500 | [diff] [blame] | 416 | (void *)(uintptr_t)hdr->image_base, base); |
| 417 | return CB_ERR; |
| 418 | } |
| 419 | |
| 420 | /* |
| 421 | * Since the component is XIP it's already in the address space. Thus, |
| 422 | * there's no need to rdev_munmap(). |
| 423 | */ |
| 424 | return CB_SUCCESS; |
| 425 | } |
| 426 | |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 427 | void fsp_memory_init(bool s3wake) |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 428 | { |
| 429 | struct fsp_header hdr; |
Aaron Durbin | d04639b | 2016-07-17 23:23:59 -0500 | [diff] [blame] | 430 | enum cb_err status; |
| 431 | struct cbfsf file_desc; |
| 432 | struct region_device file_data; |
| 433 | const char *name = CONFIG_FSP_M_CBFS; |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 434 | struct memranges memmap; |
| 435 | struct range_entry freeranges[2]; |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 436 | |
Furquan Shaikh | 5aea588 | 2016-07-30 18:10:05 -0700 | [diff] [blame] | 437 | if (IS_ENABLED(CONFIG_ELOG_BOOT_COUNT) && !s3wake) |
| 438 | boot_count_increment(); |
| 439 | |
Aaron Durbin | d04639b | 2016-07-17 23:23:59 -0500 | [diff] [blame] | 440 | if (cbfs_boot_locate(&file_desc, name, NULL)) { |
Lee Leahy | b20d4ba | 2016-07-31 16:49:28 -0700 | [diff] [blame] | 441 | printk(BIOS_CRIT, "Could not locate %s in CBFS\n", name); |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 442 | die("FSPM not available!\n"); |
Aaron Durbin | d04639b | 2016-07-17 23:23:59 -0500 | [diff] [blame] | 443 | } |
| 444 | |
| 445 | cbfs_file_data(&file_data, &file_desc); |
| 446 | |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 447 | /* Build up memory map of romstage address space including CAR. */ |
| 448 | memranges_init_empty(&memmap, &freeranges[0], ARRAY_SIZE(freeranges)); |
| 449 | memranges_insert(&memmap, (uintptr_t)_car_region_start, |
| 450 | _car_relocatable_data_end - _car_region_start, 0); |
| 451 | memranges_insert(&memmap, (uintptr_t)_program, _program_size, 0); |
| 452 | |
Lee Leahy | 27cd96a | 2016-07-21 11:16:39 -0700 | [diff] [blame] | 453 | if (!IS_ENABLED(CONFIG_FSP_M_XIP)) |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 454 | status = load_fspm_mem(&hdr, &file_data, &memmap); |
Aaron Durbin | d04639b | 2016-07-17 23:23:59 -0500 | [diff] [blame] | 455 | else |
| 456 | status = load_fspm_xip(&hdr, &file_data); |
| 457 | |
Lee Leahy | e686ee8 | 2017-03-10 08:45:30 -0800 | [diff] [blame] | 458 | if (status != CB_SUCCESS) |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 459 | die("Loading FSPM failed!\n"); |
Aaron Durbin | d04639b | 2016-07-17 23:23:59 -0500 | [diff] [blame] | 460 | |
| 461 | /* Signal that FSP component has been loaded. */ |
| 462 | prog_segment_loaded(hdr.image_base, hdr.image_size, SEG_FINAL); |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 463 | |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 464 | do_fsp_memory_init(&hdr, s3wake, &memmap); |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 465 | } |