Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
Lee Leahy | 47bd2d9 | 2016-07-24 18:12:16 -0700 | [diff] [blame] | 4 | * Copyright (C) 2015-2016 Intel Corp. |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 5 | * (Written by Andrey Petrov <andrey.petrov@intel.com> for Intel Corp.) |
| 6 | * (Written by Alexandru Gagniuc <alexandrux.gagniuc@intel.com> for Intel Corp.) |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License as published by |
| 10 | * the Free Software Foundation; either version 2 of the License, or |
| 11 | * (at your option) any later version. |
| 12 | */ |
| 13 | |
Stefan Reinauer | 6a00113 | 2017-07-13 02:20:27 +0200 | [diff] [blame] | 14 | #include <compiler.h> |
Philipp Deppenwiese | 64e2d19 | 2017-10-18 17:13:07 +0200 | [diff] [blame] | 15 | #include <security/tpm/antirollback.h> |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 16 | #include <arch/io.h> |
| 17 | #include <arch/cpu.h> |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 18 | #include <arch/symbols.h> |
Aaron Durbin | 31be2c9 | 2016-12-03 22:08:20 -0600 | [diff] [blame] | 19 | #include <assert.h> |
Aaron Durbin | d04639b | 2016-07-17 23:23:59 -0500 | [diff] [blame] | 20 | #include <cbfs.h> |
Aaron Durbin | 2792868 | 2016-07-15 22:32:28 -0500 | [diff] [blame] | 21 | #include <cbmem.h> |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 22 | #include <console/console.h> |
Furquan Shaikh | 5aea588 | 2016-07-30 18:10:05 -0700 | [diff] [blame] | 23 | #include <elog.h> |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 24 | #include <fsp/api.h> |
| 25 | #include <fsp/util.h> |
| 26 | #include <memrange.h> |
Aaron Durbin | decd062 | 2017-12-15 12:26:40 -0700 | [diff] [blame] | 27 | #include <mrc_cache.h> |
Aaron Durbin | d04639b | 2016-07-17 23:23:59 -0500 | [diff] [blame] | 28 | #include <program_loading.h> |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 29 | #include <reset.h> |
| 30 | #include <romstage_handoff.h> |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 31 | #include <string.h> |
Aaron Durbin | d04639b | 2016-07-17 23:23:59 -0500 | [diff] [blame] | 32 | #include <symbols.h> |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 33 | #include <timestamp.h> |
Youness Alaoui | 676887d | 2018-02-07 11:49:35 -0500 | [diff] [blame] | 34 | #include <security/tpm/tis.h> |
Philipp Deppenwiese | d88fb36 | 2017-10-18 20:26:18 +0200 | [diff] [blame] | 35 | #include <security/tpm/tss.h> |
Philipp Deppenwiese | fea2429 | 2017-10-17 17:02:29 +0200 | [diff] [blame] | 36 | #include <security/vboot/vboot_common.h> |
Furquan Shaikh | 2db5bac | 2016-11-07 23:57:48 -0800 | [diff] [blame] | 37 | #include <vb2_api.h> |
| 38 | |
Furquan Shaikh | 2db5bac | 2016-11-07 23:57:48 -0800 | [diff] [blame] | 39 | static void mrc_cache_update_tpm_hash(const uint8_t *data, size_t size) |
| 40 | { |
| 41 | uint8_t data_hash[VB2_SHA256_DIGEST_SIZE]; |
| 42 | static const uint8_t dead_hash[VB2_SHA256_DIGEST_SIZE] = { |
| 43 | 0xba, 0xad, 0xda, 0x1a, /* BAADDA1A */ |
| 44 | 0xde, 0xad, 0xde, 0xad, /* DEADDEAD */ |
| 45 | 0xde, 0xad, 0xda, 0x1a, /* DEADDA1A */ |
| 46 | 0xba, 0xad, 0xba, 0xad, /* BAADBAAD */ |
| 47 | 0xba, 0xad, 0xda, 0x1a, /* BAADDA1A */ |
| 48 | 0xde, 0xad, 0xde, 0xad, /* DEADDEAD */ |
| 49 | 0xde, 0xad, 0xda, 0x1a, /* DEADDA1A */ |
| 50 | 0xba, 0xad, 0xba, 0xad, /* BAADBAAD */ |
| 51 | }; |
| 52 | const uint8_t *hash_ptr = data_hash; |
| 53 | |
| 54 | /* We do not store normal mode data hash in TPM. */ |
| 55 | if (!vboot_recovery_mode_enabled()) |
| 56 | return; |
| 57 | |
| 58 | /* Bail out early if no mrc hash space is supported in TPM. */ |
| 59 | if (!IS_ENABLED(CONFIG_FSP2_0_USES_TPM_MRC_HASH)) |
| 60 | return; |
| 61 | |
| 62 | /* Initialize TPM driver. */ |
Furquan Shaikh | 8b5d04e | 2016-11-10 09:49:05 -0800 | [diff] [blame] | 63 | if (tlcl_lib_init() != VB2_SUCCESS) { |
Furquan Shaikh | 2db5bac | 2016-11-07 23:57:48 -0800 | [diff] [blame] | 64 | printk(BIOS_ERR, "MRC: TPM driver initialization failed.\n"); |
| 65 | return; |
| 66 | } |
| 67 | |
| 68 | /* Calculate hash of data generated by MRC. */ |
| 69 | if (vb2_digest_buffer(data, size, VB2_HASH_SHA256, data_hash, |
| 70 | sizeof(data_hash))) { |
| 71 | printk(BIOS_ERR, "MRC: SHA-256 calculation failed for data. " |
| 72 | "Not updating TPM hash space.\n"); |
| 73 | /* |
| 74 | * Since data is being updated in recovery cache, the hash |
| 75 | * currently stored in TPM recovery hash space is no longer |
| 76 | * valid. If we are not able to calculate hash of the data being |
| 77 | * updated, reset all the bits in TPM recovery hash space to |
| 78 | * pre-defined hash pattern. |
| 79 | */ |
| 80 | hash_ptr = dead_hash; |
| 81 | } |
| 82 | |
| 83 | /* Write hash of data to TPM space. */ |
| 84 | if (antirollback_write_space_rec_hash(hash_ptr, VB2_SHA256_DIGEST_SIZE) |
| 85 | != TPM_SUCCESS) { |
| 86 | printk(BIOS_ERR, "MRC: Could not save hash to TPM.\n"); |
| 87 | return; |
| 88 | } |
| 89 | |
| 90 | printk(BIOS_INFO, "MRC: TPM MRC hash updated successfully.\n"); |
| 91 | } |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 92 | |
Aaron Durbin | f0ec824 | 2016-07-18 11:24:36 -0500 | [diff] [blame] | 93 | static void save_memory_training_data(bool s3wake, uint32_t fsp_version) |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 94 | { |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 95 | size_t mrc_data_size; |
| 96 | const void *mrc_data; |
Aaron Durbin | f0ec824 | 2016-07-18 11:24:36 -0500 | [diff] [blame] | 97 | |
| 98 | if (!IS_ENABLED(CONFIG_CACHE_MRC_SETTINGS) || s3wake) |
| 99 | return; |
| 100 | |
| 101 | mrc_data = fsp_find_nv_storage_data(&mrc_data_size); |
| 102 | if (!mrc_data) { |
| 103 | printk(BIOS_ERR, "Couldn't find memory training data HOB.\n"); |
| 104 | return; |
| 105 | } |
| 106 | |
| 107 | /* |
| 108 | * Save MRC Data to CBMEM. By always saving the data this forces |
| 109 | * a retrain after a trip through Chrome OS recovery path. The |
| 110 | * code which saves the data to flash doesn't write if the latest |
| 111 | * training data matches this one. |
| 112 | */ |
Aaron Durbin | 31be2c9 | 2016-12-03 22:08:20 -0600 | [diff] [blame] | 113 | if (mrc_cache_stash_data(MRC_TRAINING_DATA, fsp_version, mrc_data, |
| 114 | mrc_data_size) < 0) |
| 115 | printk(BIOS_ERR, "Failed to stash MRC data\n"); |
Furquan Shaikh | 2db5bac | 2016-11-07 23:57:48 -0800 | [diff] [blame] | 116 | |
| 117 | mrc_cache_update_tpm_hash(mrc_data, mrc_data_size); |
Aaron Durbin | f0ec824 | 2016-07-18 11:24:36 -0500 | [diff] [blame] | 118 | } |
| 119 | |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 120 | static void do_fsp_post_memory_init(bool s3wake, uint32_t fsp_version) |
Aaron Durbin | f0ec824 | 2016-07-18 11:24:36 -0500 | [diff] [blame] | 121 | { |
| 122 | struct range_entry fsp_mem; |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 123 | |
Lee Leahy | 52d0c68 | 2016-08-01 15:47:42 -0700 | [diff] [blame] | 124 | if (fsp_find_reserved_memory(&fsp_mem)) |
| 125 | die("Failed to find FSP_RESERVED_MEMORY_RESOURCE_HOB!\n"); |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 126 | |
| 127 | /* initialize cbmem by adding FSP reserved memory first thing */ |
| 128 | if (!s3wake) { |
| 129 | cbmem_initialize_empty_id_size(CBMEM_ID_FSP_RESERVED_MEMORY, |
| 130 | range_entry_size(&fsp_mem)); |
| 131 | } else if (cbmem_initialize_id_size(CBMEM_ID_FSP_RESERVED_MEMORY, |
| 132 | range_entry_size(&fsp_mem))) { |
| 133 | if (IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)) { |
Lee Leahy | b20d4ba | 2016-07-31 16:49:28 -0700 | [diff] [blame] | 134 | printk(BIOS_ERR, |
Lee Leahy | ac3b0a6 | 2016-07-27 07:40:25 -0700 | [diff] [blame] | 135 | "Failed to recover CBMEM in S3 resume.\n"); |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 136 | /* Failed S3 resume, reset to come up cleanly */ |
| 137 | hard_reset(); |
| 138 | } |
| 139 | } |
| 140 | |
| 141 | /* make sure FSP memory is reserved in cbmem */ |
| 142 | if (range_entry_base(&fsp_mem) != |
| 143 | (uintptr_t)cbmem_find(CBMEM_ID_FSP_RESERVED_MEMORY)) |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 144 | die("Failed to accommodate FSP reserved memory request!\n"); |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 145 | |
Aaron Durbin | f0ec824 | 2016-07-18 11:24:36 -0500 | [diff] [blame] | 146 | save_memory_training_data(s3wake, fsp_version); |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 147 | |
| 148 | /* Create romstage handof information */ |
Aaron Durbin | 77e1399 | 2016-11-29 17:43:04 -0600 | [diff] [blame] | 149 | romstage_handoff_init(s3wake); |
Youness Alaoui | 676887d | 2018-02-07 11:49:35 -0500 | [diff] [blame] | 150 | |
| 151 | /* |
| 152 | * Initialize the TPM, unless the TPM was already initialized |
| 153 | * in verstage and used to verify romstage. |
| 154 | */ |
| 155 | if (IS_ENABLED(CONFIG_LPC_TPM) && |
| 156 | !IS_ENABLED(CONFIG_VBOOT_STARTS_IN_BOOTBLOCK)) |
| 157 | init_tpm(s3wake); |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 158 | } |
| 159 | |
Furquan Shaikh | 2db5bac | 2016-11-07 23:57:48 -0800 | [diff] [blame] | 160 | static int mrc_cache_verify_tpm_hash(const uint8_t *data, size_t size) |
| 161 | { |
| 162 | uint8_t data_hash[VB2_SHA256_DIGEST_SIZE]; |
| 163 | uint8_t tpm_hash[VB2_SHA256_DIGEST_SIZE]; |
| 164 | |
| 165 | /* We do not store normal mode data hash in TPM. */ |
| 166 | if (!vboot_recovery_mode_enabled()) |
| 167 | return 1; |
| 168 | |
| 169 | if (!IS_ENABLED(CONFIG_FSP2_0_USES_TPM_MRC_HASH)) |
| 170 | return 1; |
| 171 | |
| 172 | /* Calculate hash of data read from RECOVERY_MRC_CACHE. */ |
| 173 | if (vb2_digest_buffer(data, size, VB2_HASH_SHA256, data_hash, |
| 174 | sizeof(data_hash))) { |
| 175 | printk(BIOS_ERR, "MRC: SHA-256 calculation failed for data.\n"); |
| 176 | return 0; |
| 177 | } |
| 178 | |
| 179 | /* Initialize TPM driver. */ |
Furquan Shaikh | 8b5d04e | 2016-11-10 09:49:05 -0800 | [diff] [blame] | 180 | if (tlcl_lib_init() != VB2_SUCCESS) { |
Furquan Shaikh | 2db5bac | 2016-11-07 23:57:48 -0800 | [diff] [blame] | 181 | printk(BIOS_ERR, "MRC: TPM driver initialization failed.\n"); |
| 182 | return 0; |
| 183 | } |
| 184 | |
| 185 | /* Read hash of MRC data saved in TPM. */ |
| 186 | if (antirollback_read_space_rec_hash(tpm_hash, sizeof(tpm_hash)) |
| 187 | != TPM_SUCCESS) { |
| 188 | printk(BIOS_ERR, "MRC: Could not read hash from TPM.\n"); |
| 189 | return 0; |
| 190 | } |
| 191 | |
| 192 | if (memcmp(tpm_hash, data_hash, sizeof(tpm_hash))) { |
| 193 | printk(BIOS_ERR, "MRC: Hash comparison failed.\n"); |
| 194 | return 0; |
| 195 | } |
| 196 | |
| 197 | printk(BIOS_INFO, "MRC: Hash comparison successful. " |
| 198 | "Using data from RECOVERY_MRC_CACHE\n"); |
| 199 | return 1; |
| 200 | } |
| 201 | |
Aamir Bohra | 69cd62c | 2018-01-08 11:01:34 +0530 | [diff] [blame] | 202 | static void fsp_fill_mrc_cache(FSPM_ARCH_UPD *arch_upd, uint32_t fsp_version) |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 203 | { |
Aaron Durbin | 31be2c9 | 2016-12-03 22:08:20 -0600 | [diff] [blame] | 204 | struct region_device rdev; |
| 205 | void *data; |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 206 | |
Aaron Durbin | f0ec824 | 2016-07-18 11:24:36 -0500 | [diff] [blame] | 207 | arch_upd->NvsBufferPtr = NULL; |
| 208 | |
| 209 | if (!IS_ENABLED(CONFIG_CACHE_MRC_SETTINGS)) |
| 210 | return; |
| 211 | |
Aaron Durbin | 31be2c9 | 2016-12-03 22:08:20 -0600 | [diff] [blame] | 212 | /* |
| 213 | * In recovery mode, force retraining: |
| 214 | * 1. Recovery cache is not supported, or |
| 215 | * 2. Memory retrain switch is set. |
| 216 | */ |
| 217 | if (vboot_recovery_mode_enabled()) { |
| 218 | if (!IS_ENABLED(CONFIG_HAS_RECOVERY_MRC_CACHE)) |
| 219 | return; |
| 220 | if (vboot_recovery_mode_memory_retrain()) |
| 221 | return; |
| 222 | } |
Aaron Durbin | 98ea636 | 2016-07-18 11:31:53 -0500 | [diff] [blame] | 223 | |
Aaron Durbin | 31be2c9 | 2016-12-03 22:08:20 -0600 | [diff] [blame] | 224 | if (mrc_cache_get_current(MRC_TRAINING_DATA, fsp_version, &rdev) < 0) |
Aaron Durbin | f0ec824 | 2016-07-18 11:24:36 -0500 | [diff] [blame] | 225 | return; |
Aaron Durbin | f0ec824 | 2016-07-18 11:24:36 -0500 | [diff] [blame] | 226 | |
Aaron Durbin | 31be2c9 | 2016-12-03 22:08:20 -0600 | [diff] [blame] | 227 | /* Assume boot device is memory mapped. */ |
| 228 | assert(IS_ENABLED(CONFIG_BOOT_DEVICE_MEMORY_MAPPED)); |
| 229 | data = rdev_mmap_full(&rdev); |
| 230 | |
| 231 | if (data == NULL) |
| 232 | return; |
| 233 | |
| 234 | if (!mrc_cache_verify_tpm_hash(data, region_device_sz(&rdev))) |
Furquan Shaikh | 2db5bac | 2016-11-07 23:57:48 -0800 | [diff] [blame] | 235 | return; |
| 236 | |
Aaron Durbin | f0ec824 | 2016-07-18 11:24:36 -0500 | [diff] [blame] | 237 | /* MRC cache found */ |
Aaron Durbin | 31be2c9 | 2016-12-03 22:08:20 -0600 | [diff] [blame] | 238 | arch_upd->NvsBufferPtr = data; |
Aamir Bohra | 69cd62c | 2018-01-08 11:01:34 +0530 | [diff] [blame] | 239 | |
| 240 | printk(BIOS_SPEW, "MRC cache found, size %zx\n", |
| 241 | region_device_sz(&rdev)); |
Aaron Durbin | f0ec824 | 2016-07-18 11:24:36 -0500 | [diff] [blame] | 242 | } |
| 243 | |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 244 | static enum cb_err check_region_overlap(const struct memranges *ranges, |
| 245 | const char *description, |
| 246 | uintptr_t begin, uintptr_t end) |
Aaron Durbin | f0ec824 | 2016-07-18 11:24:36 -0500 | [diff] [blame] | 247 | { |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 248 | const struct range_entry *r; |
| 249 | |
| 250 | memranges_each_entry(r, ranges) { |
| 251 | if (end <= range_entry_base(r)) |
| 252 | continue; |
| 253 | if (begin >= range_entry_end(r)) |
| 254 | continue; |
Lee Leahy | b20d4ba | 2016-07-31 16:49:28 -0700 | [diff] [blame] | 255 | printk(BIOS_CRIT, "'%s' overlaps currently running program: " |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 256 | "[%p, %p)\n", description, (void *)begin, (void *)end); |
| 257 | return CB_ERR; |
| 258 | } |
| 259 | |
| 260 | return CB_SUCCESS; |
| 261 | } |
| 262 | |
Brandon Breitenstein | c31ba0e | 2016-07-27 17:34:45 -0700 | [diff] [blame] | 263 | static enum cb_err fsp_fill_common_arch_params(FSPM_ARCH_UPD *arch_upd, |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 264 | bool s3wake, uint32_t fsp_version, |
| 265 | const struct memranges *memmap) |
| 266 | { |
| 267 | uintptr_t stack_begin; |
| 268 | uintptr_t stack_end; |
| 269 | |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 270 | /* |
| 271 | * FSPM_UPD passed here is populated with default values provided by |
| 272 | * the blob itself. We let FSPM use top of CAR region of the size it |
| 273 | * requests. |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 274 | */ |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 275 | stack_end = (uintptr_t)_car_region_end; |
| 276 | stack_begin = stack_end - arch_upd->StackSize; |
| 277 | |
| 278 | if (check_region_overlap(memmap, "FSPM stack", stack_begin, |
| 279 | stack_end) != CB_SUCCESS) |
| 280 | return CB_ERR; |
| 281 | |
| 282 | arch_upd->StackBase = (void *)stack_begin; |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 283 | |
Aamir Bohra | 69cd62c | 2018-01-08 11:01:34 +0530 | [diff] [blame] | 284 | fsp_fill_mrc_cache(arch_upd, fsp_version); |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 285 | |
Aamir Bohra | 69cd62c | 2018-01-08 11:01:34 +0530 | [diff] [blame] | 286 | /* Configure bootmode */ |
| 287 | if (s3wake) { |
| 288 | /* |
| 289 | * For S3 resume case, if valid mrc cache data is not found or |
| 290 | * RECOVERY_MRC_CACHE hash verification fails, the S3 data |
| 291 | * pointer would be null and S3 resume fails with fsp-m |
| 292 | * returning error. Invoking a reset here saves time. |
| 293 | */ |
| 294 | if (!arch_upd->NvsBufferPtr) |
| 295 | hard_reset(); |
| 296 | arch_upd->BootMode = FSP_BOOT_ON_S3_RESUME; |
| 297 | } else { |
| 298 | if (arch_upd->NvsBufferPtr) |
| 299 | arch_upd->BootMode = |
| 300 | FSP_BOOT_ASSUMING_NO_CONFIGURATION_CHANGES; |
| 301 | else |
| 302 | arch_upd->BootMode = FSP_BOOT_WITH_FULL_CONFIGURATION; |
| 303 | } |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 304 | |
Aamir Bohra | 69cd62c | 2018-01-08 11:01:34 +0530 | [diff] [blame] | 305 | printk(BIOS_SPEW, "bootmode is set to :%d\n", arch_upd->BootMode); |
Aamir Bohra | 276c06a | 2017-12-26 17:54:45 +0530 | [diff] [blame] | 306 | |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 307 | return CB_SUCCESS; |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 308 | } |
| 309 | |
Aaron Durbin | 6403167 | 2018-04-21 14:45:32 -0600 | [diff] [blame^] | 310 | __weak |
Aaron Durbin | a3cecb2 | 2017-04-25 21:58:10 -0500 | [diff] [blame] | 311 | uint8_t fsp_memory_mainboard_version(void) |
| 312 | { |
| 313 | return 0; |
| 314 | } |
| 315 | |
Aaron Durbin | 6403167 | 2018-04-21 14:45:32 -0600 | [diff] [blame^] | 316 | __weak |
Aaron Durbin | a3cecb2 | 2017-04-25 21:58:10 -0500 | [diff] [blame] | 317 | uint8_t fsp_memory_soc_version(void) |
| 318 | { |
| 319 | return 0; |
| 320 | } |
| 321 | |
| 322 | /* |
| 323 | * Allow SoC and/or mainboard to bump the revision of the FSP setting |
| 324 | * number. The FSP spec uses the low 8 bits as the build number. Take over |
| 325 | * bits 3:0 for the SoC setting and bits 7:4 for the mainboard. That way |
| 326 | * a tweak in the settings will bump the version used to track the cached |
| 327 | * setting which triggers retraining when the FSP version hasn't changed, but |
| 328 | * the SoC or mainboard settings have. |
| 329 | */ |
| 330 | static uint32_t fsp_memory_settings_version(const struct fsp_header *hdr) |
| 331 | { |
| 332 | /* Use the full FSP version by default. */ |
| 333 | uint32_t ver = hdr->fsp_revision; |
| 334 | |
| 335 | if (!IS_ENABLED(CONFIG_FSP_PLATFORM_MEMORY_SETTINGS_VERSIONS)) |
| 336 | return ver; |
| 337 | |
| 338 | ver &= ~0xff; |
| 339 | ver |= (0xf & fsp_memory_mainboard_version()) << 4; |
| 340 | ver |= (0xf & fsp_memory_soc_version()) << 0; |
| 341 | |
| 342 | return ver; |
| 343 | } |
| 344 | |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 345 | static void do_fsp_memory_init(struct fsp_header *hdr, bool s3wake, |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 346 | const struct memranges *memmap) |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 347 | { |
Brandon Breitenstein | c31ba0e | 2016-07-27 17:34:45 -0700 | [diff] [blame] | 348 | uint32_t status; |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 349 | fsp_memory_init_fn fsp_raminit; |
Brandon Breitenstein | c31ba0e | 2016-07-27 17:34:45 -0700 | [diff] [blame] | 350 | FSPM_UPD fspm_upd, *upd; |
| 351 | FSPM_ARCH_UPD *arch_upd; |
Aaron Durbin | a3cecb2 | 2017-04-25 21:58:10 -0500 | [diff] [blame] | 352 | uint32_t fsp_version; |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 353 | |
| 354 | post_code(0x34); |
| 355 | |
Aaron Durbin | a3cecb2 | 2017-04-25 21:58:10 -0500 | [diff] [blame] | 356 | fsp_version = fsp_memory_settings_version(hdr); |
| 357 | |
Brandon Breitenstein | c31ba0e | 2016-07-27 17:34:45 -0700 | [diff] [blame] | 358 | upd = (FSPM_UPD *)(hdr->cfg_region_offset + hdr->image_base); |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 359 | |
Lee Leahy | e686ee8 | 2017-03-10 08:45:30 -0800 | [diff] [blame] | 360 | if (upd->FspUpdHeader.Signature != FSPM_UPD_SIGNATURE) |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 361 | die("Invalid FSPM signature!\n"); |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 362 | |
| 363 | /* Copy the default values from the UPD area */ |
| 364 | memcpy(&fspm_upd, upd, sizeof(fspm_upd)); |
| 365 | |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 366 | arch_upd = &fspm_upd.FspmArchUpd; |
| 367 | |
Aaron Durbin | 2792868 | 2016-07-15 22:32:28 -0500 | [diff] [blame] | 368 | /* Reserve enough memory under TOLUD to save CBMEM header */ |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 369 | arch_upd->BootLoaderTolumSize = cbmem_overhead_size(); |
Aaron Durbin | 2792868 | 2016-07-15 22:32:28 -0500 | [diff] [blame] | 370 | |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 371 | /* Fill common settings on behalf of chipset. */ |
Aaron Durbin | a3cecb2 | 2017-04-25 21:58:10 -0500 | [diff] [blame] | 372 | if (fsp_fill_common_arch_params(arch_upd, s3wake, fsp_version, |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 373 | memmap) != CB_SUCCESS) |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 374 | die("FSPM_ARCH_UPD not found!\n"); |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 375 | |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 376 | /* Give SoC and mainboard a chance to update the UPD */ |
Aaron Durbin | a3cecb2 | 2017-04-25 21:58:10 -0500 | [diff] [blame] | 377 | platform_fsp_memory_init_params_cb(&fspm_upd, fsp_version); |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 378 | |
Pratik Prajapati | ffc934d | 2016-11-18 14:36:34 -0800 | [diff] [blame] | 379 | if (IS_ENABLED(CONFIG_MMA)) |
| 380 | setup_mma(&fspm_upd.FspmConfig); |
| 381 | |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 382 | /* Call FspMemoryInit */ |
| 383 | fsp_raminit = (void *)(hdr->image_base + hdr->memory_init_entry_offset); |
Lee Leahy | ac3b0a6 | 2016-07-27 07:40:25 -0700 | [diff] [blame] | 384 | fsp_debug_before_memory_init(fsp_raminit, upd, &fspm_upd); |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 385 | |
Alexandru Gagniuc | c4ea8f7 | 2016-05-23 12:16:58 -0700 | [diff] [blame] | 386 | post_code(POST_FSP_MEMORY_INIT); |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 387 | timestamp_add_now(TS_FSP_MEMORY_INIT_START); |
Lee Leahy | ac3b0a6 | 2016-07-27 07:40:25 -0700 | [diff] [blame] | 388 | status = fsp_raminit(&fspm_upd, fsp_get_hob_list_ptr()); |
Subrata Banik | 0755ab9 | 2017-07-12 15:31:06 +0530 | [diff] [blame] | 389 | post_code(POST_FSP_MEMORY_EXIT); |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 390 | timestamp_add_now(TS_FSP_MEMORY_INIT_END); |
| 391 | |
Lee Leahy | ac3b0a6 | 2016-07-27 07:40:25 -0700 | [diff] [blame] | 392 | fsp_debug_after_memory_init(status); |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 393 | |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 394 | /* Handle any errors returned by FspMemoryInit */ |
Aaron Durbin | f41f2aa | 2016-07-18 12:03:58 -0500 | [diff] [blame] | 395 | fsp_handle_reset(status); |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 396 | if (status != FSP_SUCCESS) { |
Lee Leahy | b20d4ba | 2016-07-31 16:49:28 -0700 | [diff] [blame] | 397 | printk(BIOS_CRIT, "FspMemoryInit returned 0x%08x\n", status); |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 398 | die("FspMemoryInit returned an error!\n"); |
| 399 | } |
Aaron Durbin | f41f2aa | 2016-07-18 12:03:58 -0500 | [diff] [blame] | 400 | |
Aaron Durbin | a3cecb2 | 2017-04-25 21:58:10 -0500 | [diff] [blame] | 401 | do_fsp_post_memory_init(s3wake, fsp_version); |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 402 | } |
| 403 | |
Aaron Durbin | d04639b | 2016-07-17 23:23:59 -0500 | [diff] [blame] | 404 | /* Load the binary into the memory specified by the info header. */ |
| 405 | static enum cb_err load_fspm_mem(struct fsp_header *hdr, |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 406 | const struct region_device *rdev, |
| 407 | const struct memranges *memmap) |
Aaron Durbin | d04639b | 2016-07-17 23:23:59 -0500 | [diff] [blame] | 408 | { |
Aaron Durbin | d04639b | 2016-07-17 23:23:59 -0500 | [diff] [blame] | 409 | uintptr_t fspm_begin; |
| 410 | uintptr_t fspm_end; |
| 411 | |
| 412 | if (fsp_validate_component(hdr, rdev) != CB_SUCCESS) |
| 413 | return CB_ERR; |
| 414 | |
| 415 | fspm_begin = hdr->image_base; |
| 416 | fspm_end = fspm_begin + hdr->image_size; |
| 417 | |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 418 | if (check_region_overlap(memmap, "FSPM", fspm_begin, fspm_end) != |
| 419 | CB_SUCCESS) |
Aaron Durbin | d04639b | 2016-07-17 23:23:59 -0500 | [diff] [blame] | 420 | return CB_ERR; |
Aaron Durbin | d04639b | 2016-07-17 23:23:59 -0500 | [diff] [blame] | 421 | |
| 422 | /* Load binary into memory at provided address. */ |
| 423 | if (rdev_readat(rdev, (void *)fspm_begin, 0, fspm_end - fspm_begin) < 0) |
| 424 | return CB_ERR; |
| 425 | |
| 426 | return CB_SUCCESS; |
| 427 | } |
| 428 | |
| 429 | /* Handle the case when FSPM is running XIP. */ |
| 430 | static enum cb_err load_fspm_xip(struct fsp_header *hdr, |
| 431 | const struct region_device *rdev) |
| 432 | { |
| 433 | void *base; |
| 434 | |
| 435 | if (fsp_validate_component(hdr, rdev) != CB_SUCCESS) |
| 436 | return CB_ERR; |
| 437 | |
| 438 | base = rdev_mmap_full(rdev); |
| 439 | if ((uintptr_t)base != hdr->image_base) { |
Lee Leahy | b20d4ba | 2016-07-31 16:49:28 -0700 | [diff] [blame] | 440 | printk(BIOS_CRIT, "FSPM XIP base does not match: %p vs %p\n", |
Aaron Durbin | d04639b | 2016-07-17 23:23:59 -0500 | [diff] [blame] | 441 | (void *)(uintptr_t)hdr->image_base, base); |
| 442 | return CB_ERR; |
| 443 | } |
| 444 | |
| 445 | /* |
| 446 | * Since the component is XIP it's already in the address space. Thus, |
| 447 | * there's no need to rdev_munmap(). |
| 448 | */ |
| 449 | return CB_SUCCESS; |
| 450 | } |
| 451 | |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 452 | void fsp_memory_init(bool s3wake) |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 453 | { |
| 454 | struct fsp_header hdr; |
Aaron Durbin | d04639b | 2016-07-17 23:23:59 -0500 | [diff] [blame] | 455 | enum cb_err status; |
| 456 | struct cbfsf file_desc; |
| 457 | struct region_device file_data; |
| 458 | const char *name = CONFIG_FSP_M_CBFS; |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 459 | struct memranges memmap; |
| 460 | struct range_entry freeranges[2]; |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 461 | |
Furquan Shaikh | 5aea588 | 2016-07-30 18:10:05 -0700 | [diff] [blame] | 462 | if (IS_ENABLED(CONFIG_ELOG_BOOT_COUNT) && !s3wake) |
| 463 | boot_count_increment(); |
| 464 | |
Aaron Durbin | d04639b | 2016-07-17 23:23:59 -0500 | [diff] [blame] | 465 | if (cbfs_boot_locate(&file_desc, name, NULL)) { |
Lee Leahy | b20d4ba | 2016-07-31 16:49:28 -0700 | [diff] [blame] | 466 | printk(BIOS_CRIT, "Could not locate %s in CBFS\n", name); |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 467 | die("FSPM not available!\n"); |
Aaron Durbin | d04639b | 2016-07-17 23:23:59 -0500 | [diff] [blame] | 468 | } |
| 469 | |
| 470 | cbfs_file_data(&file_data, &file_desc); |
| 471 | |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 472 | /* Build up memory map of romstage address space including CAR. */ |
| 473 | memranges_init_empty(&memmap, &freeranges[0], ARRAY_SIZE(freeranges)); |
| 474 | memranges_insert(&memmap, (uintptr_t)_car_region_start, |
| 475 | _car_relocatable_data_end - _car_region_start, 0); |
| 476 | memranges_insert(&memmap, (uintptr_t)_program, _program_size, 0); |
| 477 | |
Lee Leahy | 27cd96a | 2016-07-21 11:16:39 -0700 | [diff] [blame] | 478 | if (!IS_ENABLED(CONFIG_FSP_M_XIP)) |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 479 | status = load_fspm_mem(&hdr, &file_data, &memmap); |
Aaron Durbin | d04639b | 2016-07-17 23:23:59 -0500 | [diff] [blame] | 480 | else |
| 481 | status = load_fspm_xip(&hdr, &file_data); |
| 482 | |
Lee Leahy | e686ee8 | 2017-03-10 08:45:30 -0800 | [diff] [blame] | 483 | if (status != CB_SUCCESS) |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 484 | die("Loading FSPM failed!\n"); |
Aaron Durbin | d04639b | 2016-07-17 23:23:59 -0500 | [diff] [blame] | 485 | |
| 486 | /* Signal that FSP component has been loaded. */ |
| 487 | prog_segment_loaded(hdr.image_base, hdr.image_size, SEG_FINAL); |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 488 | |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 489 | do_fsp_memory_init(&hdr, s3wake, &memmap); |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 490 | } |