Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
Lee Leahy | 47bd2d9 | 2016-07-24 18:12:16 -0700 | [diff] [blame] | 4 | * Copyright (C) 2015-2016 Intel Corp. |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 5 | * (Written by Andrey Petrov <andrey.petrov@intel.com> for Intel Corp.) |
| 6 | * (Written by Alexandru Gagniuc <alexandrux.gagniuc@intel.com> for Intel Corp.) |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License as published by |
| 10 | * the Free Software Foundation; either version 2 of the License, or |
| 11 | * (at your option) any later version. |
| 12 | */ |
| 13 | |
Furquan Shaikh | 2db5bac | 2016-11-07 23:57:48 -0800 | [diff] [blame^] | 14 | #include <antirollback.h> |
| 15 | #include <arch/early_variables.h> |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 16 | #include <arch/io.h> |
| 17 | #include <arch/cpu.h> |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 18 | #include <arch/symbols.h> |
Aaron Durbin | d04639b | 2016-07-17 23:23:59 -0500 | [diff] [blame] | 19 | #include <cbfs.h> |
Aaron Durbin | 2792868 | 2016-07-15 22:32:28 -0500 | [diff] [blame] | 20 | #include <cbmem.h> |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 21 | #include <console/console.h> |
Furquan Shaikh | 5aea588 | 2016-07-30 18:10:05 -0700 | [diff] [blame] | 22 | #include <elog.h> |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 23 | #include <fsp/api.h> |
| 24 | #include <fsp/util.h> |
| 25 | #include <memrange.h> |
Aaron Durbin | d04639b | 2016-07-17 23:23:59 -0500 | [diff] [blame] | 26 | #include <program_loading.h> |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 27 | #include <reset.h> |
| 28 | #include <romstage_handoff.h> |
| 29 | #include <soc/intel/common/mrc_cache.h> |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 30 | #include <string.h> |
Aaron Durbin | d04639b | 2016-07-17 23:23:59 -0500 | [diff] [blame] | 31 | #include <symbols.h> |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 32 | #include <timestamp.h> |
Furquan Shaikh | 2db5bac | 2016-11-07 23:57:48 -0800 | [diff] [blame^] | 33 | #include <tpm_lite/tlcl.h> |
Furquan Shaikh | 0325dc6 | 2016-07-25 13:02:36 -0700 | [diff] [blame] | 34 | #include <vboot/vboot_common.h> |
Furquan Shaikh | 2db5bac | 2016-11-07 23:57:48 -0800 | [diff] [blame^] | 35 | #include <vb2_api.h> |
| 36 | |
| 37 | static uint8_t tpm_init_done CAR_GLOBAL; |
| 38 | |
| 39 | static int mrc_cache_tpm_init(void) |
| 40 | { |
| 41 | uint8_t done = car_get_var(tpm_init_done); |
| 42 | |
| 43 | if (done) |
| 44 | return 0; |
| 45 | |
| 46 | if (tlcl_lib_init() != VB2_SUCCESS) |
| 47 | return -1; |
| 48 | |
| 49 | car_set_var(tpm_init_done, 1); |
| 50 | return 0; |
| 51 | } |
| 52 | |
| 53 | static void mrc_cache_update_tpm_hash(const uint8_t *data, size_t size) |
| 54 | { |
| 55 | uint8_t data_hash[VB2_SHA256_DIGEST_SIZE]; |
| 56 | static const uint8_t dead_hash[VB2_SHA256_DIGEST_SIZE] = { |
| 57 | 0xba, 0xad, 0xda, 0x1a, /* BAADDA1A */ |
| 58 | 0xde, 0xad, 0xde, 0xad, /* DEADDEAD */ |
| 59 | 0xde, 0xad, 0xda, 0x1a, /* DEADDA1A */ |
| 60 | 0xba, 0xad, 0xba, 0xad, /* BAADBAAD */ |
| 61 | 0xba, 0xad, 0xda, 0x1a, /* BAADDA1A */ |
| 62 | 0xde, 0xad, 0xde, 0xad, /* DEADDEAD */ |
| 63 | 0xde, 0xad, 0xda, 0x1a, /* DEADDA1A */ |
| 64 | 0xba, 0xad, 0xba, 0xad, /* BAADBAAD */ |
| 65 | }; |
| 66 | const uint8_t *hash_ptr = data_hash; |
| 67 | |
| 68 | /* We do not store normal mode data hash in TPM. */ |
| 69 | if (!vboot_recovery_mode_enabled()) |
| 70 | return; |
| 71 | |
| 72 | /* Bail out early if no mrc hash space is supported in TPM. */ |
| 73 | if (!IS_ENABLED(CONFIG_FSP2_0_USES_TPM_MRC_HASH)) |
| 74 | return; |
| 75 | |
| 76 | /* Initialize TPM driver. */ |
| 77 | if (mrc_cache_tpm_init()) { |
| 78 | printk(BIOS_ERR, "MRC: TPM driver initialization failed.\n"); |
| 79 | return; |
| 80 | } |
| 81 | |
| 82 | /* Calculate hash of data generated by MRC. */ |
| 83 | if (vb2_digest_buffer(data, size, VB2_HASH_SHA256, data_hash, |
| 84 | sizeof(data_hash))) { |
| 85 | printk(BIOS_ERR, "MRC: SHA-256 calculation failed for data. " |
| 86 | "Not updating TPM hash space.\n"); |
| 87 | /* |
| 88 | * Since data is being updated in recovery cache, the hash |
| 89 | * currently stored in TPM recovery hash space is no longer |
| 90 | * valid. If we are not able to calculate hash of the data being |
| 91 | * updated, reset all the bits in TPM recovery hash space to |
| 92 | * pre-defined hash pattern. |
| 93 | */ |
| 94 | hash_ptr = dead_hash; |
| 95 | } |
| 96 | |
| 97 | /* Write hash of data to TPM space. */ |
| 98 | if (antirollback_write_space_rec_hash(hash_ptr, VB2_SHA256_DIGEST_SIZE) |
| 99 | != TPM_SUCCESS) { |
| 100 | printk(BIOS_ERR, "MRC: Could not save hash to TPM.\n"); |
| 101 | return; |
| 102 | } |
| 103 | |
| 104 | printk(BIOS_INFO, "MRC: TPM MRC hash updated successfully.\n"); |
| 105 | } |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 106 | |
Aaron Durbin | f0ec824 | 2016-07-18 11:24:36 -0500 | [diff] [blame] | 107 | static void save_memory_training_data(bool s3wake, uint32_t fsp_version) |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 108 | { |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 109 | size_t mrc_data_size; |
| 110 | const void *mrc_data; |
Aaron Durbin | f0ec824 | 2016-07-18 11:24:36 -0500 | [diff] [blame] | 111 | |
| 112 | if (!IS_ENABLED(CONFIG_CACHE_MRC_SETTINGS) || s3wake) |
| 113 | return; |
| 114 | |
| 115 | mrc_data = fsp_find_nv_storage_data(&mrc_data_size); |
| 116 | if (!mrc_data) { |
| 117 | printk(BIOS_ERR, "Couldn't find memory training data HOB.\n"); |
| 118 | return; |
| 119 | } |
| 120 | |
| 121 | /* |
| 122 | * Save MRC Data to CBMEM. By always saving the data this forces |
| 123 | * a retrain after a trip through Chrome OS recovery path. The |
| 124 | * code which saves the data to flash doesn't write if the latest |
| 125 | * training data matches this one. |
| 126 | */ |
| 127 | if (mrc_cache_stash_data_with_version(mrc_data, mrc_data_size, |
| 128 | fsp_version) < 0) |
| 129 | printk(BIOS_ERR, "Failed to stash MRC data\n"); |
Furquan Shaikh | 2db5bac | 2016-11-07 23:57:48 -0800 | [diff] [blame^] | 130 | |
| 131 | mrc_cache_update_tpm_hash(mrc_data, mrc_data_size); |
Aaron Durbin | f0ec824 | 2016-07-18 11:24:36 -0500 | [diff] [blame] | 132 | } |
| 133 | |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 134 | static void do_fsp_post_memory_init(bool s3wake, uint32_t fsp_version) |
Aaron Durbin | f0ec824 | 2016-07-18 11:24:36 -0500 | [diff] [blame] | 135 | { |
| 136 | struct range_entry fsp_mem; |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 137 | struct romstage_handoff *handoff; |
| 138 | |
Lee Leahy | 52d0c68 | 2016-08-01 15:47:42 -0700 | [diff] [blame] | 139 | if (fsp_find_reserved_memory(&fsp_mem)) |
| 140 | die("Failed to find FSP_RESERVED_MEMORY_RESOURCE_HOB!\n"); |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 141 | |
| 142 | /* initialize cbmem by adding FSP reserved memory first thing */ |
| 143 | if (!s3wake) { |
| 144 | cbmem_initialize_empty_id_size(CBMEM_ID_FSP_RESERVED_MEMORY, |
| 145 | range_entry_size(&fsp_mem)); |
| 146 | } else if (cbmem_initialize_id_size(CBMEM_ID_FSP_RESERVED_MEMORY, |
| 147 | range_entry_size(&fsp_mem))) { |
| 148 | if (IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)) { |
Lee Leahy | b20d4ba | 2016-07-31 16:49:28 -0700 | [diff] [blame] | 149 | printk(BIOS_ERR, |
Lee Leahy | ac3b0a6 | 2016-07-27 07:40:25 -0700 | [diff] [blame] | 150 | "Failed to recover CBMEM in S3 resume.\n"); |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 151 | /* Failed S3 resume, reset to come up cleanly */ |
| 152 | hard_reset(); |
| 153 | } |
| 154 | } |
| 155 | |
| 156 | /* make sure FSP memory is reserved in cbmem */ |
| 157 | if (range_entry_base(&fsp_mem) != |
| 158 | (uintptr_t)cbmem_find(CBMEM_ID_FSP_RESERVED_MEMORY)) |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 159 | die("Failed to accommodate FSP reserved memory request!\n"); |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 160 | |
Aaron Durbin | f0ec824 | 2016-07-18 11:24:36 -0500 | [diff] [blame] | 161 | save_memory_training_data(s3wake, fsp_version); |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 162 | |
| 163 | /* Create romstage handof information */ |
| 164 | handoff = romstage_handoff_find_or_add(); |
| 165 | if (handoff != NULL) |
| 166 | handoff->s3_resume = s3wake; |
| 167 | else |
Lee Leahy | b20d4ba | 2016-07-31 16:49:28 -0700 | [diff] [blame] | 168 | printk(BIOS_SPEW, "Romstage handoff structure not added!\n"); |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 169 | } |
| 170 | |
Furquan Shaikh | cab1c01 | 2016-11-05 23:57:02 -0700 | [diff] [blame] | 171 | static const char *mrc_cache_get_region_name(void) |
| 172 | { |
| 173 | /* In normal mode, always use DEFAULT_MRC_CACHE */ |
| 174 | if (!vboot_recovery_mode_enabled()) |
| 175 | return DEFAULT_MRC_CACHE; |
| 176 | |
| 177 | /* |
| 178 | * In recovery mode, force retraining by returning NULL if: |
| 179 | * 1. Recovery cache is not supported, or |
| 180 | * 2. Memory retrain switch is set. |
| 181 | */ |
| 182 | if (!IS_ENABLED(CONFIG_HAS_RECOVERY_MRC_CACHE) || |
| 183 | vboot_recovery_mode_memory_retrain()) |
| 184 | return NULL; |
| 185 | |
| 186 | return RECOVERY_MRC_CACHE; |
| 187 | } |
| 188 | |
Furquan Shaikh | 2db5bac | 2016-11-07 23:57:48 -0800 | [diff] [blame^] | 189 | static int mrc_cache_verify_tpm_hash(const uint8_t *data, size_t size) |
| 190 | { |
| 191 | uint8_t data_hash[VB2_SHA256_DIGEST_SIZE]; |
| 192 | uint8_t tpm_hash[VB2_SHA256_DIGEST_SIZE]; |
| 193 | |
| 194 | /* We do not store normal mode data hash in TPM. */ |
| 195 | if (!vboot_recovery_mode_enabled()) |
| 196 | return 1; |
| 197 | |
| 198 | if (!IS_ENABLED(CONFIG_FSP2_0_USES_TPM_MRC_HASH)) |
| 199 | return 1; |
| 200 | |
| 201 | /* Calculate hash of data read from RECOVERY_MRC_CACHE. */ |
| 202 | if (vb2_digest_buffer(data, size, VB2_HASH_SHA256, data_hash, |
| 203 | sizeof(data_hash))) { |
| 204 | printk(BIOS_ERR, "MRC: SHA-256 calculation failed for data.\n"); |
| 205 | return 0; |
| 206 | } |
| 207 | |
| 208 | /* Initialize TPM driver. */ |
| 209 | if (mrc_cache_tpm_init()) { |
| 210 | printk(BIOS_ERR, "MRC: TPM driver initialization failed.\n"); |
| 211 | return 0; |
| 212 | } |
| 213 | |
| 214 | /* Read hash of MRC data saved in TPM. */ |
| 215 | if (antirollback_read_space_rec_hash(tpm_hash, sizeof(tpm_hash)) |
| 216 | != TPM_SUCCESS) { |
| 217 | printk(BIOS_ERR, "MRC: Could not read hash from TPM.\n"); |
| 218 | return 0; |
| 219 | } |
| 220 | |
| 221 | if (memcmp(tpm_hash, data_hash, sizeof(tpm_hash))) { |
| 222 | printk(BIOS_ERR, "MRC: Hash comparison failed.\n"); |
| 223 | return 0; |
| 224 | } |
| 225 | |
| 226 | printk(BIOS_INFO, "MRC: Hash comparison successful. " |
| 227 | "Using data from RECOVERY_MRC_CACHE\n"); |
| 228 | return 1; |
| 229 | } |
| 230 | |
Brandon Breitenstein | c31ba0e | 2016-07-27 17:34:45 -0700 | [diff] [blame] | 231 | static void fsp_fill_mrc_cache(FSPM_ARCH_UPD *arch_upd, bool s3wake, |
Aaron Durbin | f0ec824 | 2016-07-18 11:24:36 -0500 | [diff] [blame] | 232 | uint32_t fsp_version) |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 233 | { |
| 234 | const struct mrc_saved_data *mrc_cache; |
Furquan Shaikh | cab1c01 | 2016-11-05 23:57:02 -0700 | [diff] [blame] | 235 | const char *name; |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 236 | |
Aaron Durbin | f0ec824 | 2016-07-18 11:24:36 -0500 | [diff] [blame] | 237 | arch_upd->NvsBufferPtr = NULL; |
| 238 | |
| 239 | if (!IS_ENABLED(CONFIG_CACHE_MRC_SETTINGS)) |
| 240 | return; |
| 241 | |
Furquan Shaikh | cab1c01 | 2016-11-05 23:57:02 -0700 | [diff] [blame] | 242 | name = mrc_cache_get_region_name(); |
Aaron Durbin | 98ea636 | 2016-07-18 11:31:53 -0500 | [diff] [blame] | 243 | |
Furquan Shaikh | cab1c01 | 2016-11-05 23:57:02 -0700 | [diff] [blame] | 244 | if (mrc_cache_get_current_from_region(&mrc_cache, fsp_version, name)) |
Aaron Durbin | f0ec824 | 2016-07-18 11:24:36 -0500 | [diff] [blame] | 245 | return; |
Aaron Durbin | f0ec824 | 2016-07-18 11:24:36 -0500 | [diff] [blame] | 246 | |
Furquan Shaikh | 2db5bac | 2016-11-07 23:57:48 -0800 | [diff] [blame^] | 247 | if (!mrc_cache_verify_tpm_hash(mrc_cache->data, mrc_cache->size)) |
| 248 | return; |
| 249 | |
Aaron Durbin | f0ec824 | 2016-07-18 11:24:36 -0500 | [diff] [blame] | 250 | /* MRC cache found */ |
| 251 | arch_upd->NvsBufferPtr = (void *)mrc_cache->data; |
| 252 | arch_upd->BootMode = s3wake ? |
| 253 | FSP_BOOT_ON_S3_RESUME: |
| 254 | FSP_BOOT_ASSUMING_NO_CONFIGURATION_CHANGES; |
Lee Leahy | b20d4ba | 2016-07-31 16:49:28 -0700 | [diff] [blame] | 255 | printk(BIOS_SPEW, "MRC cache found, size %x bootmode:%d\n", |
Aaron Durbin | f0ec824 | 2016-07-18 11:24:36 -0500 | [diff] [blame] | 256 | mrc_cache->size, arch_upd->BootMode); |
| 257 | } |
| 258 | |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 259 | static enum cb_err check_region_overlap(const struct memranges *ranges, |
| 260 | const char *description, |
| 261 | uintptr_t begin, uintptr_t end) |
Aaron Durbin | f0ec824 | 2016-07-18 11:24:36 -0500 | [diff] [blame] | 262 | { |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 263 | const struct range_entry *r; |
| 264 | |
| 265 | memranges_each_entry(r, ranges) { |
| 266 | if (end <= range_entry_base(r)) |
| 267 | continue; |
| 268 | if (begin >= range_entry_end(r)) |
| 269 | continue; |
Lee Leahy | b20d4ba | 2016-07-31 16:49:28 -0700 | [diff] [blame] | 270 | printk(BIOS_CRIT, "'%s' overlaps currently running program: " |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 271 | "[%p, %p)\n", description, (void *)begin, (void *)end); |
| 272 | return CB_ERR; |
| 273 | } |
| 274 | |
| 275 | return CB_SUCCESS; |
| 276 | } |
| 277 | |
Brandon Breitenstein | c31ba0e | 2016-07-27 17:34:45 -0700 | [diff] [blame] | 278 | static enum cb_err fsp_fill_common_arch_params(FSPM_ARCH_UPD *arch_upd, |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 279 | bool s3wake, uint32_t fsp_version, |
| 280 | const struct memranges *memmap) |
| 281 | { |
| 282 | uintptr_t stack_begin; |
| 283 | uintptr_t stack_end; |
| 284 | |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 285 | /* |
| 286 | * FSPM_UPD passed here is populated with default values provided by |
| 287 | * the blob itself. We let FSPM use top of CAR region of the size it |
| 288 | * requests. |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 289 | */ |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 290 | stack_end = (uintptr_t)_car_region_end; |
| 291 | stack_begin = stack_end - arch_upd->StackSize; |
| 292 | |
| 293 | if (check_region_overlap(memmap, "FSPM stack", stack_begin, |
| 294 | stack_end) != CB_SUCCESS) |
| 295 | return CB_ERR; |
| 296 | |
| 297 | arch_upd->StackBase = (void *)stack_begin; |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 298 | |
| 299 | arch_upd->BootMode = FSP_BOOT_WITH_FULL_CONFIGURATION; |
| 300 | |
Aaron Durbin | f0ec824 | 2016-07-18 11:24:36 -0500 | [diff] [blame] | 301 | fsp_fill_mrc_cache(arch_upd, s3wake, fsp_version); |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 302 | |
| 303 | return CB_SUCCESS; |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 304 | } |
| 305 | |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 306 | static void do_fsp_memory_init(struct fsp_header *hdr, bool s3wake, |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 307 | const struct memranges *memmap) |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 308 | { |
Brandon Breitenstein | c31ba0e | 2016-07-27 17:34:45 -0700 | [diff] [blame] | 309 | uint32_t status; |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 310 | fsp_memory_init_fn fsp_raminit; |
Brandon Breitenstein | c31ba0e | 2016-07-27 17:34:45 -0700 | [diff] [blame] | 311 | FSPM_UPD fspm_upd, *upd; |
| 312 | FSPM_ARCH_UPD *arch_upd; |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 313 | |
| 314 | post_code(0x34); |
| 315 | |
Brandon Breitenstein | c31ba0e | 2016-07-27 17:34:45 -0700 | [diff] [blame] | 316 | upd = (FSPM_UPD *)(hdr->cfg_region_offset + hdr->image_base); |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 317 | |
| 318 | if (upd->FspUpdHeader.Signature != FSPM_UPD_SIGNATURE) { |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 319 | die("Invalid FSPM signature!\n"); |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 320 | } |
| 321 | |
| 322 | /* Copy the default values from the UPD area */ |
| 323 | memcpy(&fspm_upd, upd, sizeof(fspm_upd)); |
| 324 | |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 325 | arch_upd = &fspm_upd.FspmArchUpd; |
| 326 | |
Aaron Durbin | 2792868 | 2016-07-15 22:32:28 -0500 | [diff] [blame] | 327 | /* Reserve enough memory under TOLUD to save CBMEM header */ |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 328 | arch_upd->BootLoaderTolumSize = cbmem_overhead_size(); |
Aaron Durbin | 2792868 | 2016-07-15 22:32:28 -0500 | [diff] [blame] | 329 | |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 330 | /* Fill common settings on behalf of chipset. */ |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 331 | if (fsp_fill_common_arch_params(arch_upd, s3wake, hdr->fsp_revision, |
| 332 | memmap) != CB_SUCCESS) |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 333 | die("FSPM_ARCH_UPD not found!\n"); |
Aaron Durbin | b430250 | 2016-07-17 17:04:37 -0500 | [diff] [blame] | 334 | |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 335 | /* Give SoC and mainboard a chance to update the UPD */ |
| 336 | platform_fsp_memory_init_params_cb(&fspm_upd); |
| 337 | |
| 338 | /* Call FspMemoryInit */ |
| 339 | fsp_raminit = (void *)(hdr->image_base + hdr->memory_init_entry_offset); |
Lee Leahy | ac3b0a6 | 2016-07-27 07:40:25 -0700 | [diff] [blame] | 340 | fsp_debug_before_memory_init(fsp_raminit, upd, &fspm_upd); |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 341 | |
Alexandru Gagniuc | c4ea8f7 | 2016-05-23 12:16:58 -0700 | [diff] [blame] | 342 | post_code(POST_FSP_MEMORY_INIT); |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 343 | timestamp_add_now(TS_FSP_MEMORY_INIT_START); |
Lee Leahy | ac3b0a6 | 2016-07-27 07:40:25 -0700 | [diff] [blame] | 344 | status = fsp_raminit(&fspm_upd, fsp_get_hob_list_ptr()); |
Alexandru Gagniuc | c4ea8f7 | 2016-05-23 12:16:58 -0700 | [diff] [blame] | 345 | post_code(POST_FSP_MEMORY_INIT); |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 346 | timestamp_add_now(TS_FSP_MEMORY_INIT_END); |
| 347 | |
Lee Leahy | ac3b0a6 | 2016-07-27 07:40:25 -0700 | [diff] [blame] | 348 | fsp_debug_after_memory_init(status); |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 349 | |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 350 | /* Handle any errors returned by FspMemoryInit */ |
Aaron Durbin | f41f2aa | 2016-07-18 12:03:58 -0500 | [diff] [blame] | 351 | fsp_handle_reset(status); |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 352 | if (status != FSP_SUCCESS) { |
Lee Leahy | b20d4ba | 2016-07-31 16:49:28 -0700 | [diff] [blame] | 353 | printk(BIOS_CRIT, "FspMemoryInit returned 0x%08x\n", status); |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 354 | die("FspMemoryInit returned an error!\n"); |
| 355 | } |
Aaron Durbin | f41f2aa | 2016-07-18 12:03:58 -0500 | [diff] [blame] | 356 | |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 357 | do_fsp_post_memory_init(s3wake, hdr->fsp_revision); |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 358 | } |
| 359 | |
Aaron Durbin | d04639b | 2016-07-17 23:23:59 -0500 | [diff] [blame] | 360 | /* Load the binary into the memory specified by the info header. */ |
| 361 | static enum cb_err load_fspm_mem(struct fsp_header *hdr, |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 362 | const struct region_device *rdev, |
| 363 | const struct memranges *memmap) |
Aaron Durbin | d04639b | 2016-07-17 23:23:59 -0500 | [diff] [blame] | 364 | { |
Aaron Durbin | d04639b | 2016-07-17 23:23:59 -0500 | [diff] [blame] | 365 | uintptr_t fspm_begin; |
| 366 | uintptr_t fspm_end; |
| 367 | |
| 368 | if (fsp_validate_component(hdr, rdev) != CB_SUCCESS) |
| 369 | return CB_ERR; |
| 370 | |
| 371 | fspm_begin = hdr->image_base; |
| 372 | fspm_end = fspm_begin + hdr->image_size; |
| 373 | |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 374 | if (check_region_overlap(memmap, "FSPM", fspm_begin, fspm_end) != |
| 375 | CB_SUCCESS) |
Aaron Durbin | d04639b | 2016-07-17 23:23:59 -0500 | [diff] [blame] | 376 | return CB_ERR; |
Aaron Durbin | d04639b | 2016-07-17 23:23:59 -0500 | [diff] [blame] | 377 | |
| 378 | /* Load binary into memory at provided address. */ |
| 379 | if (rdev_readat(rdev, (void *)fspm_begin, 0, fspm_end - fspm_begin) < 0) |
| 380 | return CB_ERR; |
| 381 | |
| 382 | return CB_SUCCESS; |
| 383 | } |
| 384 | |
| 385 | /* Handle the case when FSPM is running XIP. */ |
| 386 | static enum cb_err load_fspm_xip(struct fsp_header *hdr, |
| 387 | const struct region_device *rdev) |
| 388 | { |
| 389 | void *base; |
| 390 | |
| 391 | if (fsp_validate_component(hdr, rdev) != CB_SUCCESS) |
| 392 | return CB_ERR; |
| 393 | |
| 394 | base = rdev_mmap_full(rdev); |
| 395 | if ((uintptr_t)base != hdr->image_base) { |
Lee Leahy | b20d4ba | 2016-07-31 16:49:28 -0700 | [diff] [blame] | 396 | printk(BIOS_CRIT, "FSPM XIP base does not match: %p vs %p\n", |
Aaron Durbin | d04639b | 2016-07-17 23:23:59 -0500 | [diff] [blame] | 397 | (void *)(uintptr_t)hdr->image_base, base); |
| 398 | return CB_ERR; |
| 399 | } |
| 400 | |
| 401 | /* |
| 402 | * Since the component is XIP it's already in the address space. Thus, |
| 403 | * there's no need to rdev_munmap(). |
| 404 | */ |
| 405 | return CB_SUCCESS; |
| 406 | } |
| 407 | |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 408 | void fsp_memory_init(bool s3wake) |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 409 | { |
| 410 | struct fsp_header hdr; |
Aaron Durbin | d04639b | 2016-07-17 23:23:59 -0500 | [diff] [blame] | 411 | enum cb_err status; |
| 412 | struct cbfsf file_desc; |
| 413 | struct region_device file_data; |
| 414 | const char *name = CONFIG_FSP_M_CBFS; |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 415 | struct memranges memmap; |
| 416 | struct range_entry freeranges[2]; |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 417 | |
Furquan Shaikh | 5aea588 | 2016-07-30 18:10:05 -0700 | [diff] [blame] | 418 | if (IS_ENABLED(CONFIG_ELOG_BOOT_COUNT) && !s3wake) |
| 419 | boot_count_increment(); |
| 420 | |
Aaron Durbin | d04639b | 2016-07-17 23:23:59 -0500 | [diff] [blame] | 421 | if (cbfs_boot_locate(&file_desc, name, NULL)) { |
Lee Leahy | b20d4ba | 2016-07-31 16:49:28 -0700 | [diff] [blame] | 422 | printk(BIOS_CRIT, "Could not locate %s in CBFS\n", name); |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 423 | die("FSPM not available!\n"); |
Aaron Durbin | d04639b | 2016-07-17 23:23:59 -0500 | [diff] [blame] | 424 | } |
| 425 | |
| 426 | cbfs_file_data(&file_data, &file_desc); |
| 427 | |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 428 | /* Build up memory map of romstage address space including CAR. */ |
| 429 | memranges_init_empty(&memmap, &freeranges[0], ARRAY_SIZE(freeranges)); |
| 430 | memranges_insert(&memmap, (uintptr_t)_car_region_start, |
| 431 | _car_relocatable_data_end - _car_region_start, 0); |
| 432 | memranges_insert(&memmap, (uintptr_t)_program, _program_size, 0); |
| 433 | |
Lee Leahy | 27cd96a | 2016-07-21 11:16:39 -0700 | [diff] [blame] | 434 | if (!IS_ENABLED(CONFIG_FSP_M_XIP)) |
Aaron Durbin | 02e504c | 2016-07-18 11:53:10 -0500 | [diff] [blame] | 435 | status = load_fspm_mem(&hdr, &file_data, &memmap); |
Aaron Durbin | d04639b | 2016-07-17 23:23:59 -0500 | [diff] [blame] | 436 | else |
| 437 | status = load_fspm_xip(&hdr, &file_data); |
| 438 | |
| 439 | if (status != CB_SUCCESS) { |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 440 | die("Loading FSPM failed!\n"); |
Aaron Durbin | d04639b | 2016-07-17 23:23:59 -0500 | [diff] [blame] | 441 | } |
| 442 | |
| 443 | /* Signal that FSP component has been loaded. */ |
| 444 | prog_segment_loaded(hdr.image_base, hdr.image_size, SEG_FINAL); |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 445 | |
Lee Leahy | 9671faa | 2016-07-24 18:18:52 -0700 | [diff] [blame] | 446 | do_fsp_memory_init(&hdr, s3wake, &memmap); |
Andrey Petrov | 465fc13 | 2016-02-25 14:16:33 -0800 | [diff] [blame] | 447 | } |