huang lin | a6dbfb5 | 2016-03-02 18:38:40 +0800 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright 2016 Rockchip Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | */ |
| 16 | |
Vadim Bendebury | 8e8a00c | 2016-04-22 12:25:07 -0700 | [diff] [blame] | 17 | #include <boardid.h> |
Lin Huang | b497b48 | 2016-03-31 18:44:13 +0800 | [diff] [blame] | 18 | #include <delay.h> |
huang lin | a6dbfb5 | 2016-03-02 18:38:40 +0800 | [diff] [blame] | 19 | #include <device/device.h> |
Lin Huang | b497b48 | 2016-03-31 18:44:13 +0800 | [diff] [blame] | 20 | #include <device/i2c.h> |
Vadim Bendebury | 1e80ab3 | 2016-03-28 00:44:54 -0700 | [diff] [blame] | 21 | #include <gpio.h> |
Lin Huang | 5a4be8a | 2016-05-17 15:45:53 +0800 | [diff] [blame] | 22 | #include <soc/bl31_plat_params.h> |
Vadim Bendebury | 1e80ab3 | 2016-03-28 00:44:54 -0700 | [diff] [blame] | 23 | #include <soc/clock.h> |
Lin Huang | b497b48 | 2016-03-31 18:44:13 +0800 | [diff] [blame] | 24 | #include <soc/display.h> |
Vadim Bendebury | 1e80ab3 | 2016-03-28 00:44:54 -0700 | [diff] [blame] | 25 | #include <soc/grf.h> |
Lin Huang | b497b48 | 2016-03-31 18:44:13 +0800 | [diff] [blame] | 26 | #include <soc/i2c.h> |
Liangfeng Wu | 76655cb | 2016-05-26 16:06:58 +0800 | [diff] [blame] | 27 | #include <soc/usb.h> |
Simon Glass | bc679bc | 2016-06-19 16:09:21 -0600 | [diff] [blame] | 28 | #include <vendorcode/google/chromeos/chromeos.h> |
Vadim Bendebury | 1e80ab3 | 2016-03-28 00:44:54 -0700 | [diff] [blame] | 29 | |
Vadim Bendebury | 993dbe1 | 2016-05-22 15:53:37 -0700 | [diff] [blame] | 30 | #include "board.h" |
| 31 | |
Brian Norris | e06a1b8 | 2016-09-21 18:16:54 -0700 | [diff] [blame] | 32 | /* |
| 33 | * Wifi's PDN/RST line is pulled down by its (unpowered) voltage rails, but |
| 34 | * this reset pin is pulled up by default. Let's drive it low as early as we |
| 35 | * can. |
| 36 | */ |
| 37 | static void deassert_wifi_power(void) |
| 38 | { |
| 39 | gpio_output(GPIO(1, B, 3), 0); /* Assert WLAN_MODULE_RST# */ |
| 40 | } |
| 41 | |
Lin Huang | 2f7ed8d | 2016-04-08 18:56:20 +0800 | [diff] [blame] | 42 | static void configure_emmc(void) |
| 43 | { |
| 44 | /* Host controller does not support programmable clock generator. |
| 45 | * If we don't do this setting, when we use phy to control the |
| 46 | * emmc clock(when clock exceed 50MHz), it will get wrong clock. |
| 47 | * |
| 48 | * Refer to TRM V0.3 Part 1 Chapter 15 PAGE 782 for this register. |
| 49 | * Please search "_CON11[7:0]" to locate register description. |
| 50 | */ |
| 51 | write32(&rk3399_grf->emmccore_con[11], RK_CLRSETBITS(0xff, 0)); |
| 52 | |
| 53 | rkclk_configure_emmc(); |
| 54 | } |
| 55 | |
Lin Huang | c9fea5c | 2016-08-30 15:34:42 -0700 | [diff] [blame] | 56 | static void register_apio_suspend(void) |
| 57 | { |
| 58 | static struct bl31_apio_param param_apio = { |
| 59 | .h = { |
| 60 | .type = PARAM_SUSPEND_APIO, |
| 61 | }, |
| 62 | .apio = { |
| 63 | .apio1 = 1, |
| 64 | .apio2 = 1, |
| 65 | .apio3 = 1, |
| 66 | .apio4 = 1, |
| 67 | .apio5 = 1, |
| 68 | }, |
| 69 | }; |
| 70 | register_bl31_param(¶m_apio.h); |
| 71 | } |
| 72 | |
Lin Huang | 7d8ccfb | 2016-08-22 17:35:40 -0700 | [diff] [blame] | 73 | static void register_gpio_suspend(void) |
| 74 | { |
| 75 | /* |
| 76 | * These three GPIO params are used to shut down the 1.5V, 1.8V and |
| 77 | * 3.3V power rails, which need to be shut down ordered by voltage, |
| 78 | * with highest voltage first. |
| 79 | * Since register_bl31() appends to the front of the list, we need to |
| 80 | * register them backwards, with 1.5V coming first. |
| 81 | */ |
| 82 | static struct bl31_gpio_param param_p15_en = { |
| 83 | .h = { |
| 84 | .type = PARAM_SUSPEND_GPIO, |
| 85 | }, |
| 86 | .gpio = { |
| 87 | .polarity = BL31_GPIO_LEVEL_LOW, |
| 88 | }, |
| 89 | }; |
| 90 | param_p15_en.gpio.index = GET_GPIO_NUM(GPIO_P15V_EN); |
| 91 | register_bl31_param(¶m_p15_en.h); |
| 92 | |
| 93 | static struct bl31_gpio_param param_p18_audio_en = { |
| 94 | .h = { |
| 95 | .type = PARAM_SUSPEND_GPIO, |
| 96 | }, |
| 97 | .gpio = { |
| 98 | .polarity = BL31_GPIO_LEVEL_LOW, |
| 99 | }, |
| 100 | }; |
| 101 | param_p18_audio_en.gpio.index = GET_GPIO_NUM(GPIO_P18V_AUDIO_PWREN); |
| 102 | register_bl31_param(¶m_p18_audio_en.h); |
| 103 | |
| 104 | static struct bl31_gpio_param param_p30_en = { |
| 105 | .h = { |
| 106 | .type = PARAM_SUSPEND_GPIO, |
| 107 | }, |
| 108 | .gpio = { |
| 109 | .polarity = BL31_GPIO_LEVEL_LOW, |
| 110 | }, |
| 111 | }; |
| 112 | param_p30_en.gpio.index = GET_GPIO_NUM(GPIO_P30V_EN); |
| 113 | register_bl31_param(¶m_p30_en.h); |
| 114 | } |
| 115 | |
Lin Huang | 5a4be8a | 2016-05-17 15:45:53 +0800 | [diff] [blame] | 116 | static void register_reset_to_bl31(void) |
| 117 | { |
| 118 | static struct bl31_gpio_param param_reset = { |
| 119 | .h = { |
| 120 | .type = PARAM_RESET, |
| 121 | }, |
| 122 | .gpio = { |
| 123 | .polarity = 1, |
| 124 | }, |
| 125 | }; |
| 126 | |
| 127 | /* gru/kevin reset pin: gpio0b3 */ |
| 128 | param_reset.gpio.index = GET_GPIO_NUM(GPIO_RESET), |
| 129 | |
| 130 | register_bl31_param(¶m_reset.h); |
| 131 | } |
| 132 | |
Lin Huang | 9a5c4fe | 2016-05-19 11:11:23 +0800 | [diff] [blame] | 133 | static void register_poweroff_to_bl31(void) |
| 134 | { |
| 135 | static struct bl31_gpio_param param_poweroff = { |
| 136 | .h = { |
| 137 | .type = PARAM_POWEROFF, |
| 138 | }, |
| 139 | .gpio = { |
| 140 | .polarity = 1, |
| 141 | }, |
| 142 | }; |
| 143 | |
| 144 | /* |
| 145 | * gru/kevin power off pin: gpio1a6, |
| 146 | * reuse with tsadc int pin, so iomux need set back to |
| 147 | * gpio in BL31 and depthcharge before you setting this gpio |
| 148 | */ |
| 149 | param_poweroff.gpio.index = GET_GPIO_NUM(GPIO_POWEROFF), |
| 150 | |
| 151 | register_bl31_param(¶m_poweroff.h); |
| 152 | } |
| 153 | |
Vadim Bendebury | 1e80ab3 | 2016-03-28 00:44:54 -0700 | [diff] [blame] | 154 | static void configure_sdmmc(void) |
| 155 | { |
| 156 | gpio_output(GPIO(4, D, 5), 1); /* SDMMC_PWR_EN */ |
| 157 | gpio_output(GPIO(2, A, 2), 1); /* SDMMC_SDIO_PWR_EN */ |
Vadim Bendebury | 2832c41 | 2016-05-11 15:03:44 +0800 | [diff] [blame] | 158 | |
| 159 | /* SDMMC_DET_L is different on Kevin board revision 0. */ |
| 160 | if (IS_ENABLED(CONFIG_BOARD_GOOGLE_KEVIN) && (board_id() == 0)) |
Vadim Bendebury | 8e8a00c | 2016-04-22 12:25:07 -0700 | [diff] [blame] | 161 | gpio_input(GPIO(4, D, 2)); |
Vadim Bendebury | 2832c41 | 2016-05-11 15:03:44 +0800 | [diff] [blame] | 162 | else |
Vadim Bendebury | 8e8a00c | 2016-04-22 12:25:07 -0700 | [diff] [blame] | 163 | gpio_input(GPIO(4, D, 0)); |
Vadim Bendebury | 2832c41 | 2016-05-11 15:03:44 +0800 | [diff] [blame] | 164 | |
Vadim Bendebury | 1e80ab3 | 2016-03-28 00:44:54 -0700 | [diff] [blame] | 165 | gpio_output(GPIO(2, D, 4), 0); /* Keep the max voltage */ |
Vadim Bendebury | 8e8a00c | 2016-04-22 12:25:07 -0700 | [diff] [blame] | 166 | |
Julius Werner | 7feb86b | 2016-09-02 11:25:56 -0700 | [diff] [blame] | 167 | gpio_input(GPIO(4, B, 0)); /* SDMMC0_D0 remove pull-up */ |
| 168 | gpio_input(GPIO(4, B, 1)); /* SDMMC0_D1 remove pull-up */ |
| 169 | gpio_input(GPIO(4, B, 2)); /* SDMMC0_D2 remove pull-up */ |
| 170 | gpio_input(GPIO(4, B, 3)); /* SDMMC0_D3 remove pull-up */ |
| 171 | gpio_input(GPIO(4, B, 4)); /* SDMMC0_CLK remove pull-down */ |
| 172 | gpio_input(GPIO(4, B, 5)); /* SDMMC0_CMD remove pull-up */ |
| 173 | |
Vadim Bendebury | ad6ee02 | 2016-05-12 16:54:00 +0800 | [diff] [blame] | 174 | write32(&rk3399_grf->gpio2_p[2][1], RK_CLRSETBITS(0xfff, 0)); |
| 175 | |
| 176 | /* |
| 177 | * Set all outputs' drive strength to 8 mA. Group 4 bank B driver |
| 178 | * strength requires three bits per pin. Value of 2 written in that |
| 179 | * three bit field means '8 mA', as deduced from the kernel code. |
| 180 | * |
| 181 | * Thus the six pins involved in SDMMC interface require 18 bits to |
| 182 | * configure drive strength, but each 32 bit register provides only 16 |
| 183 | * bits for this setting, this covers 5 pins fully and one bit from |
| 184 | * the 6th pin. Two more bits spill over to the next register. This is |
| 185 | * described on page 378 of rk3399 TRM Version 0.3 Part 1. |
| 186 | */ |
| 187 | write32(&rk3399_grf->gpio4b_e01, |
| 188 | RK_CLRSETBITS(0xffff, |
| 189 | (2 << 0) | (2 << 3) | |
| 190 | (2 << 6) | (2 << 9) | (2 << 12))); |
| 191 | write32(&rk3399_grf->gpio4b_e2, RK_CLRSETBITS(3, 1)); |
| 192 | |
| 193 | /* And now set the multiplexor to enable SDMMC0. */ |
Vadim Bendebury | 1e80ab3 | 2016-03-28 00:44:54 -0700 | [diff] [blame] | 194 | write32(&rk3399_grf->iomux_sdmmc, IOMUX_SDMMC); |
| 195 | } |
huang lin | a6dbfb5 | 2016-03-02 18:38:40 +0800 | [diff] [blame] | 196 | |
Xing Zheng | 96fbc31 | 2016-05-19 11:39:20 +0800 | [diff] [blame] | 197 | static void configure_codec(void) |
| 198 | { |
Julius Werner | 7feb86b | 2016-09-02 11:25:56 -0700 | [diff] [blame] | 199 | gpio_input(GPIO(3, D, 0)); /* I2S0_SCLK remove pull-up */ |
| 200 | gpio_input(GPIO(3, D, 1)); /* I2S0_RX remove pull-up */ |
| 201 | gpio_input(GPIO(3, D, 2)); /* I2S0_TX remove pull-up */ |
| 202 | gpio_input(GPIO(3, D, 3)); /* I2S0_SDI0 remove pull-up */ |
| 203 | gpio_input(GPIO(3, D, 4)); /* I2S0_SDI1 remove pull-up */ |
| 204 | /* GPIO3_D5 (I2S0_SDI2SDO2) not connected */ |
| 205 | gpio_input(GPIO(3, D, 6)); /* I2S0_SDO1 remove pull-up */ |
| 206 | gpio_input(GPIO(3, D, 7)); /* I2S0_SDO0 remove pull-up */ |
| 207 | gpio_input(GPIO(4, A, 0)); /* I2S0_MCLK remove pull-up */ |
| 208 | |
Xing Zheng | 96fbc31 | 2016-05-19 11:39:20 +0800 | [diff] [blame] | 209 | write32(&rk3399_grf->iomux_i2s0, IOMUX_I2S0); |
| 210 | write32(&rk3399_grf->iomux_i2sclk, IOMUX_I2SCLK); |
| 211 | |
| 212 | /* AUDIO IO domain 1.8V voltage selection */ |
| 213 | write32(&rk3399_grf->io_vsel, RK_SETBITS(1 << 1)); |
| 214 | |
| 215 | /* CPU1_P1.8V_AUDIO_PWREN for P1.8_AUDIO */ |
| 216 | gpio_output(GPIO(0, A, 2), 1); |
| 217 | |
| 218 | /* set CPU1_SPK_PA_EN output */ |
| 219 | gpio_output(GPIO(1, A, 2), 0); |
| 220 | |
| 221 | rkclk_configure_i2s(12288000); |
| 222 | } |
| 223 | |
Lin Huang | b497b48 | 2016-03-31 18:44:13 +0800 | [diff] [blame] | 224 | static void configure_display(void) |
| 225 | { |
| 226 | /* set pinmux for edp HPD*/ |
| 227 | gpio_input_pulldown(GPIO(4, C, 7)); |
| 228 | write32(&rk3399_grf->iomux_edp_hotplug, IOMUX_EDP_HOTPLUG); |
| 229 | |
| 230 | gpio_output(GPIO(4, D, 3), 1); /* CPU3_EDP_VDDEN for P3.3V_DISP */ |
| 231 | } |
| 232 | |
Liangfeng Wu | 76655cb | 2016-05-26 16:06:58 +0800 | [diff] [blame] | 233 | static void setup_usb(void) |
| 234 | { |
Julius Werner | 1c8491c | 2016-08-15 17:58:05 -0700 | [diff] [blame] | 235 | /* A few magic PHY tuning values that improve eye diagram amplitude |
| 236 | * and make it extra sure we get reliable communication in firmware. */ |
| 237 | /* Set max ODT compensation voltage and current tuning reference. */ |
William wu | 9f470b1 | 2016-11-10 19:34:45 +0800 | [diff] [blame^] | 238 | write32(&rk3399_grf->usbphy0_ctrl[3], RK_CLRSETBITS(0xfff, 0x2e3)); |
| 239 | write32(&rk3399_grf->usbphy1_ctrl[3], RK_CLRSETBITS(0xfff, 0x2e3)); |
| 240 | |
William wu | 5b1bb3d | 2016-09-29 15:18:41 +0800 | [diff] [blame] | 241 | if (IS_ENABLED(CONFIG_BOARD_GOOGLE_KEVIN)) { |
William wu | 9f470b1 | 2016-11-10 19:34:45 +0800 | [diff] [blame^] | 242 | /* Set max pre-emphasis level, only on Kevin PHY0 and PHY1 */ |
| 243 | write32(&rk3399_grf->usbphy0_ctrl[12], |
| 244 | RK_CLRSETBITS(0xffff, 0xa7)); |
| 245 | write32(&rk3399_grf->usbphy1_ctrl[12], |
| 246 | RK_CLRSETBITS(0xffff, 0xa7)); |
| 247 | |
| 248 | /* Disable the pre-emphasize in eop state and chirp |
| 249 | * state to avoid mis-trigger the disconnect detection |
| 250 | * and also avoid high-speed handshake fail */ |
| 251 | write32(&rk3399_grf->usbphy0_ctrl[0], RK_CLRBITS(0x3)); |
| 252 | write32(&rk3399_grf->usbphy1_ctrl[0], RK_CLRBITS(0x3)); |
| 253 | write32(&rk3399_grf->usbphy0_ctrl[13], RK_CLRBITS(0x3)); |
| 254 | write32(&rk3399_grf->usbphy1_ctrl[13], RK_CLRBITS(0x3)); |
| 255 | |
| 256 | /* ODT auto compensation bypass, set max driver strength */ |
| 257 | write32(&rk3399_grf->usbphy0_ctrl[2], |
| 258 | RK_CLRSETBITS(0x7e << 4, 0x60 << 4)); |
| 259 | write32(&rk3399_grf->usbphy1_ctrl[2], |
| 260 | RK_CLRSETBITS(0x7e << 4, 0x60 << 4)); |
| 261 | |
| 262 | /* ODT auto refresh bypass, and set the max |
| 263 | * bias current tuning reference */ |
| 264 | write32(&rk3399_grf->usbphy0_ctrl[3], |
| 265 | RK_CLRSETBITS(0x21c, 1 << 4)); |
| 266 | write32(&rk3399_grf->usbphy1_ctrl[3], |
| 267 | RK_CLRSETBITS(0x21c, 1 << 4)); |
William wu | 5b1bb3d | 2016-09-29 15:18:41 +0800 | [diff] [blame] | 268 | } |
Julius Werner | 1c8491c | 2016-08-15 17:58:05 -0700 | [diff] [blame] | 269 | |
Julius Werner | 785ff1b | 2016-08-03 19:18:39 -0700 | [diff] [blame] | 270 | setup_usb_otg0(); |
| 271 | setup_usb_otg1(); |
Liangfeng Wu | 76655cb | 2016-05-26 16:06:58 +0800 | [diff] [blame] | 272 | } |
| 273 | |
huang lin | a6dbfb5 | 2016-03-02 18:38:40 +0800 | [diff] [blame] | 274 | static void mainboard_init(device_t dev) |
| 275 | { |
Brian Norris | e06a1b8 | 2016-09-21 18:16:54 -0700 | [diff] [blame] | 276 | deassert_wifi_power(); |
Vadim Bendebury | 1e80ab3 | 2016-03-28 00:44:54 -0700 | [diff] [blame] | 277 | configure_sdmmc(); |
Lin Huang | 2f7ed8d | 2016-04-08 18:56:20 +0800 | [diff] [blame] | 278 | configure_emmc(); |
Xing Zheng | 96fbc31 | 2016-05-19 11:39:20 +0800 | [diff] [blame] | 279 | configure_codec(); |
Lin Huang | b497b48 | 2016-03-31 18:44:13 +0800 | [diff] [blame] | 280 | configure_display(); |
Liangfeng Wu | 76655cb | 2016-05-26 16:06:58 +0800 | [diff] [blame] | 281 | setup_usb(); |
Lin Huang | 5a4be8a | 2016-05-17 15:45:53 +0800 | [diff] [blame] | 282 | register_reset_to_bl31(); |
Lin Huang | 9a5c4fe | 2016-05-19 11:11:23 +0800 | [diff] [blame] | 283 | register_poweroff_to_bl31(); |
Lin Huang | 7d8ccfb | 2016-08-22 17:35:40 -0700 | [diff] [blame] | 284 | register_gpio_suspend(); |
Lin Huang | c9fea5c | 2016-08-30 15:34:42 -0700 | [diff] [blame] | 285 | register_apio_suspend(); |
Lin Huang | b497b48 | 2016-03-31 18:44:13 +0800 | [diff] [blame] | 286 | } |
| 287 | |
| 288 | static void enable_backlight_booster(void) |
| 289 | { |
| 290 | const struct { |
| 291 | uint8_t reg; |
| 292 | uint8_t value; |
| 293 | } i2c_writes[] = { |
| 294 | {1, 0x84}, |
| 295 | {1, 0x85}, |
| 296 | {0, 0x26} |
| 297 | }; |
| 298 | int i; |
| 299 | const int booster_i2c_port = 0; |
| 300 | uint8_t i2c_buf[2]; |
| 301 | struct i2c_seg i2c_command = { .read = 0, .chip = 0x2c, |
| 302 | .buf = i2c_buf, .len = sizeof(i2c_buf) |
| 303 | }; |
| 304 | |
| 305 | /* |
| 306 | * This function is called on Gru right after BL_EN is asserted. It |
| 307 | * takes time for the switcher chip to come online, let's wait a bit |
| 308 | * to let the voltage settle, so that the chip can be accessed. |
| 309 | */ |
| 310 | udelay(1000); |
| 311 | |
Julius Werner | 7feb86b | 2016-09-02 11:25:56 -0700 | [diff] [blame] | 312 | gpio_input(GPIO(1, B, 7)); /* I2C0_SDA remove pull_up */ |
| 313 | gpio_input(GPIO(1, C, 0)); /* I2C0_SCL remove pull_up */ |
| 314 | |
| 315 | i2c_init(0, 100*KHz); |
| 316 | |
Lin Huang | b497b48 | 2016-03-31 18:44:13 +0800 | [diff] [blame] | 317 | write32(&rk3399_pmugrf->iomux_i2c0_sda, IOMUX_I2C0_SDA); |
| 318 | write32(&rk3399_pmugrf->iomux_i2c0_scl, IOMUX_I2C0_SCL); |
Lin Huang | b497b48 | 2016-03-31 18:44:13 +0800 | [diff] [blame] | 319 | |
| 320 | for (i = 0; i < ARRAY_SIZE(i2c_writes); i++) { |
| 321 | i2c_buf[0] = i2c_writes[i].reg; |
| 322 | i2c_buf[1] = i2c_writes[i].value; |
| 323 | i2c_transfer(booster_i2c_port, &i2c_command, 1); |
| 324 | } |
| 325 | } |
| 326 | |
| 327 | void mainboard_power_on_backlight(void) |
| 328 | { |
| 329 | gpio_output(GPIO(1, C, 1), 1); /* BL_EN */ |
| 330 | |
Julius Werner | 5e6771b | 2016-07-29 16:15:04 -0700 | [diff] [blame] | 331 | if (IS_ENABLED(CONFIG_BOARD_GOOGLE_GRU) && board_id() == 0) |
Lin Huang | b497b48 | 2016-03-31 18:44:13 +0800 | [diff] [blame] | 332 | enable_backlight_booster(); |
huang lin | a6dbfb5 | 2016-03-02 18:38:40 +0800 | [diff] [blame] | 333 | } |
| 334 | |
| 335 | static void mainboard_enable(device_t dev) |
| 336 | { |
| 337 | dev->ops->init = &mainboard_init; |
| 338 | } |
| 339 | |
| 340 | struct chip_operations mainboard_ops = { |
| 341 | .name = CONFIG_MAINBOARD_PART_NUMBER, |
| 342 | .enable_dev = mainboard_enable, |
| 343 | }; |