huang lin | a6dbfb5 | 2016-03-02 18:38:40 +0800 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright 2016 Rockchip Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | */ |
| 16 | |
Vadim Bendebury | 8e8a00c | 2016-04-22 12:25:07 -0700 | [diff] [blame] | 17 | #include <boardid.h> |
Lin Huang | b497b48 | 2016-03-31 18:44:13 +0800 | [diff] [blame] | 18 | #include <delay.h> |
huang lin | a6dbfb5 | 2016-03-02 18:38:40 +0800 | [diff] [blame] | 19 | #include <device/device.h> |
Lin Huang | b497b48 | 2016-03-31 18:44:13 +0800 | [diff] [blame] | 20 | #include <device/i2c.h> |
Vadim Bendebury | 1e80ab3 | 2016-03-28 00:44:54 -0700 | [diff] [blame] | 21 | #include <gpio.h> |
Lin Huang | 5a4be8a | 2016-05-17 15:45:53 +0800 | [diff] [blame] | 22 | #include <soc/bl31_plat_params.h> |
Vadim Bendebury | 1e80ab3 | 2016-03-28 00:44:54 -0700 | [diff] [blame] | 23 | #include <soc/clock.h> |
Lin Huang | b497b48 | 2016-03-31 18:44:13 +0800 | [diff] [blame] | 24 | #include <soc/display.h> |
Vadim Bendebury | 1e80ab3 | 2016-03-28 00:44:54 -0700 | [diff] [blame] | 25 | #include <soc/grf.h> |
Lin Huang | b497b48 | 2016-03-31 18:44:13 +0800 | [diff] [blame] | 26 | #include <soc/i2c.h> |
Liangfeng Wu | 76655cb | 2016-05-26 16:06:58 +0800 | [diff] [blame] | 27 | #include <soc/usb.h> |
Simon Glass | bc679bc | 2016-06-19 16:09:21 -0600 | [diff] [blame] | 28 | #include <vendorcode/google/chromeos/chromeos.h> |
Vadim Bendebury | 1e80ab3 | 2016-03-28 00:44:54 -0700 | [diff] [blame] | 29 | |
Vadim Bendebury | 993dbe1 | 2016-05-22 15:53:37 -0700 | [diff] [blame] | 30 | #include "board.h" |
| 31 | |
Lin Huang | 2f7ed8d | 2016-04-08 18:56:20 +0800 | [diff] [blame] | 32 | static void configure_emmc(void) |
| 33 | { |
| 34 | /* Host controller does not support programmable clock generator. |
| 35 | * If we don't do this setting, when we use phy to control the |
| 36 | * emmc clock(when clock exceed 50MHz), it will get wrong clock. |
| 37 | * |
| 38 | * Refer to TRM V0.3 Part 1 Chapter 15 PAGE 782 for this register. |
| 39 | * Please search "_CON11[7:0]" to locate register description. |
| 40 | */ |
| 41 | write32(&rk3399_grf->emmccore_con[11], RK_CLRSETBITS(0xff, 0)); |
| 42 | |
| 43 | rkclk_configure_emmc(); |
| 44 | } |
| 45 | |
Lin Huang | 5a4be8a | 2016-05-17 15:45:53 +0800 | [diff] [blame] | 46 | static void register_reset_to_bl31(void) |
| 47 | { |
| 48 | static struct bl31_gpio_param param_reset = { |
| 49 | .h = { |
| 50 | .type = PARAM_RESET, |
| 51 | }, |
| 52 | .gpio = { |
| 53 | .polarity = 1, |
| 54 | }, |
| 55 | }; |
| 56 | |
| 57 | /* gru/kevin reset pin: gpio0b3 */ |
| 58 | param_reset.gpio.index = GET_GPIO_NUM(GPIO_RESET), |
| 59 | |
| 60 | register_bl31_param(¶m_reset.h); |
| 61 | } |
| 62 | |
Lin Huang | 9a5c4fe | 2016-05-19 11:11:23 +0800 | [diff] [blame] | 63 | static void register_poweroff_to_bl31(void) |
| 64 | { |
| 65 | static struct bl31_gpio_param param_poweroff = { |
| 66 | .h = { |
| 67 | .type = PARAM_POWEROFF, |
| 68 | }, |
| 69 | .gpio = { |
| 70 | .polarity = 1, |
| 71 | }, |
| 72 | }; |
| 73 | |
| 74 | /* |
| 75 | * gru/kevin power off pin: gpio1a6, |
| 76 | * reuse with tsadc int pin, so iomux need set back to |
| 77 | * gpio in BL31 and depthcharge before you setting this gpio |
| 78 | */ |
| 79 | param_poweroff.gpio.index = GET_GPIO_NUM(GPIO_POWEROFF), |
| 80 | |
| 81 | register_bl31_param(¶m_poweroff.h); |
| 82 | } |
| 83 | |
Vadim Bendebury | 1e80ab3 | 2016-03-28 00:44:54 -0700 | [diff] [blame] | 84 | static void configure_sdmmc(void) |
| 85 | { |
| 86 | gpio_output(GPIO(4, D, 5), 1); /* SDMMC_PWR_EN */ |
| 87 | gpio_output(GPIO(2, A, 2), 1); /* SDMMC_SDIO_PWR_EN */ |
Vadim Bendebury | 2832c41 | 2016-05-11 15:03:44 +0800 | [diff] [blame] | 88 | |
| 89 | /* SDMMC_DET_L is different on Kevin board revision 0. */ |
| 90 | if (IS_ENABLED(CONFIG_BOARD_GOOGLE_KEVIN) && (board_id() == 0)) |
Vadim Bendebury | 8e8a00c | 2016-04-22 12:25:07 -0700 | [diff] [blame] | 91 | gpio_input(GPIO(4, D, 2)); |
Vadim Bendebury | 2832c41 | 2016-05-11 15:03:44 +0800 | [diff] [blame] | 92 | else |
Vadim Bendebury | 8e8a00c | 2016-04-22 12:25:07 -0700 | [diff] [blame] | 93 | gpio_input(GPIO(4, D, 0)); |
Vadim Bendebury | 2832c41 | 2016-05-11 15:03:44 +0800 | [diff] [blame] | 94 | |
Vadim Bendebury | 1e80ab3 | 2016-03-28 00:44:54 -0700 | [diff] [blame] | 95 | gpio_output(GPIO(2, D, 4), 0); /* Keep the max voltage */ |
Vadim Bendebury | 8e8a00c | 2016-04-22 12:25:07 -0700 | [diff] [blame] | 96 | |
Julius Werner | 7feb86b | 2016-09-02 11:25:56 -0700 | [diff] [blame^] | 97 | gpio_input(GPIO(4, B, 0)); /* SDMMC0_D0 remove pull-up */ |
| 98 | gpio_input(GPIO(4, B, 1)); /* SDMMC0_D1 remove pull-up */ |
| 99 | gpio_input(GPIO(4, B, 2)); /* SDMMC0_D2 remove pull-up */ |
| 100 | gpio_input(GPIO(4, B, 3)); /* SDMMC0_D3 remove pull-up */ |
| 101 | gpio_input(GPIO(4, B, 4)); /* SDMMC0_CLK remove pull-down */ |
| 102 | gpio_input(GPIO(4, B, 5)); /* SDMMC0_CMD remove pull-up */ |
| 103 | |
Vadim Bendebury | ad6ee02 | 2016-05-12 16:54:00 +0800 | [diff] [blame] | 104 | write32(&rk3399_grf->gpio2_p[2][1], RK_CLRSETBITS(0xfff, 0)); |
| 105 | |
| 106 | /* |
| 107 | * Set all outputs' drive strength to 8 mA. Group 4 bank B driver |
| 108 | * strength requires three bits per pin. Value of 2 written in that |
| 109 | * three bit field means '8 mA', as deduced from the kernel code. |
| 110 | * |
| 111 | * Thus the six pins involved in SDMMC interface require 18 bits to |
| 112 | * configure drive strength, but each 32 bit register provides only 16 |
| 113 | * bits for this setting, this covers 5 pins fully and one bit from |
| 114 | * the 6th pin. Two more bits spill over to the next register. This is |
| 115 | * described on page 378 of rk3399 TRM Version 0.3 Part 1. |
| 116 | */ |
| 117 | write32(&rk3399_grf->gpio4b_e01, |
| 118 | RK_CLRSETBITS(0xffff, |
| 119 | (2 << 0) | (2 << 3) | |
| 120 | (2 << 6) | (2 << 9) | (2 << 12))); |
| 121 | write32(&rk3399_grf->gpio4b_e2, RK_CLRSETBITS(3, 1)); |
| 122 | |
| 123 | /* And now set the multiplexor to enable SDMMC0. */ |
Vadim Bendebury | 1e80ab3 | 2016-03-28 00:44:54 -0700 | [diff] [blame] | 124 | write32(&rk3399_grf->iomux_sdmmc, IOMUX_SDMMC); |
| 125 | } |
huang lin | a6dbfb5 | 2016-03-02 18:38:40 +0800 | [diff] [blame] | 126 | |
Xing Zheng | 96fbc31 | 2016-05-19 11:39:20 +0800 | [diff] [blame] | 127 | static void configure_codec(void) |
| 128 | { |
Julius Werner | 7feb86b | 2016-09-02 11:25:56 -0700 | [diff] [blame^] | 129 | gpio_input(GPIO(3, D, 0)); /* I2S0_SCLK remove pull-up */ |
| 130 | gpio_input(GPIO(3, D, 1)); /* I2S0_RX remove pull-up */ |
| 131 | gpio_input(GPIO(3, D, 2)); /* I2S0_TX remove pull-up */ |
| 132 | gpio_input(GPIO(3, D, 3)); /* I2S0_SDI0 remove pull-up */ |
| 133 | gpio_input(GPIO(3, D, 4)); /* I2S0_SDI1 remove pull-up */ |
| 134 | /* GPIO3_D5 (I2S0_SDI2SDO2) not connected */ |
| 135 | gpio_input(GPIO(3, D, 6)); /* I2S0_SDO1 remove pull-up */ |
| 136 | gpio_input(GPIO(3, D, 7)); /* I2S0_SDO0 remove pull-up */ |
| 137 | gpio_input(GPIO(4, A, 0)); /* I2S0_MCLK remove pull-up */ |
| 138 | |
Xing Zheng | 96fbc31 | 2016-05-19 11:39:20 +0800 | [diff] [blame] | 139 | write32(&rk3399_grf->iomux_i2s0, IOMUX_I2S0); |
| 140 | write32(&rk3399_grf->iomux_i2sclk, IOMUX_I2SCLK); |
| 141 | |
| 142 | /* AUDIO IO domain 1.8V voltage selection */ |
| 143 | write32(&rk3399_grf->io_vsel, RK_SETBITS(1 << 1)); |
| 144 | |
| 145 | /* CPU1_P1.8V_AUDIO_PWREN for P1.8_AUDIO */ |
| 146 | gpio_output(GPIO(0, A, 2), 1); |
| 147 | |
| 148 | /* set CPU1_SPK_PA_EN output */ |
| 149 | gpio_output(GPIO(1, A, 2), 0); |
| 150 | |
| 151 | rkclk_configure_i2s(12288000); |
| 152 | } |
| 153 | |
Lin Huang | b497b48 | 2016-03-31 18:44:13 +0800 | [diff] [blame] | 154 | static void configure_display(void) |
| 155 | { |
| 156 | /* set pinmux for edp HPD*/ |
| 157 | gpio_input_pulldown(GPIO(4, C, 7)); |
| 158 | write32(&rk3399_grf->iomux_edp_hotplug, IOMUX_EDP_HOTPLUG); |
| 159 | |
| 160 | gpio_output(GPIO(4, D, 3), 1); /* CPU3_EDP_VDDEN for P3.3V_DISP */ |
| 161 | } |
| 162 | |
Liangfeng Wu | 76655cb | 2016-05-26 16:06:58 +0800 | [diff] [blame] | 163 | static void setup_usb(void) |
| 164 | { |
Julius Werner | 1c8491c | 2016-08-15 17:58:05 -0700 | [diff] [blame] | 165 | /* A few magic PHY tuning values that improve eye diagram amplitude |
| 166 | * and make it extra sure we get reliable communication in firmware. */ |
| 167 | /* Set max ODT compensation voltage and current tuning reference. */ |
| 168 | write32(&rk3399_grf->usbphy0_ctrl[3], 0x0fff02e3); |
| 169 | write32(&rk3399_grf->usbphy1_ctrl[3], 0x0fff02e3); |
| 170 | /* Set max pre-emphasis level, only on Kevin PHY0. */ |
| 171 | if (IS_ENABLED(CONFIG_BOARD_GOOGLE_KEVIN)) |
| 172 | write32(&rk3399_grf->usbphy0_ctrl[12], 0xffff00a7); |
| 173 | |
Julius Werner | 785ff1b | 2016-08-03 19:18:39 -0700 | [diff] [blame] | 174 | setup_usb_otg0(); |
| 175 | setup_usb_otg1(); |
Liangfeng Wu | 76655cb | 2016-05-26 16:06:58 +0800 | [diff] [blame] | 176 | } |
| 177 | |
huang lin | a6dbfb5 | 2016-03-02 18:38:40 +0800 | [diff] [blame] | 178 | static void mainboard_init(device_t dev) |
| 179 | { |
Vadim Bendebury | 1e80ab3 | 2016-03-28 00:44:54 -0700 | [diff] [blame] | 180 | configure_sdmmc(); |
Lin Huang | 2f7ed8d | 2016-04-08 18:56:20 +0800 | [diff] [blame] | 181 | configure_emmc(); |
Xing Zheng | 96fbc31 | 2016-05-19 11:39:20 +0800 | [diff] [blame] | 182 | configure_codec(); |
Lin Huang | b497b48 | 2016-03-31 18:44:13 +0800 | [diff] [blame] | 183 | configure_display(); |
Liangfeng Wu | 76655cb | 2016-05-26 16:06:58 +0800 | [diff] [blame] | 184 | setup_usb(); |
Lin Huang | 5a4be8a | 2016-05-17 15:45:53 +0800 | [diff] [blame] | 185 | register_reset_to_bl31(); |
Lin Huang | 9a5c4fe | 2016-05-19 11:11:23 +0800 | [diff] [blame] | 186 | register_poweroff_to_bl31(); |
Lin Huang | b497b48 | 2016-03-31 18:44:13 +0800 | [diff] [blame] | 187 | } |
| 188 | |
| 189 | static void enable_backlight_booster(void) |
| 190 | { |
| 191 | const struct { |
| 192 | uint8_t reg; |
| 193 | uint8_t value; |
| 194 | } i2c_writes[] = { |
| 195 | {1, 0x84}, |
| 196 | {1, 0x85}, |
| 197 | {0, 0x26} |
| 198 | }; |
| 199 | int i; |
| 200 | const int booster_i2c_port = 0; |
| 201 | uint8_t i2c_buf[2]; |
| 202 | struct i2c_seg i2c_command = { .read = 0, .chip = 0x2c, |
| 203 | .buf = i2c_buf, .len = sizeof(i2c_buf) |
| 204 | }; |
| 205 | |
| 206 | /* |
| 207 | * This function is called on Gru right after BL_EN is asserted. It |
| 208 | * takes time for the switcher chip to come online, let's wait a bit |
| 209 | * to let the voltage settle, so that the chip can be accessed. |
| 210 | */ |
| 211 | udelay(1000); |
| 212 | |
Julius Werner | 7feb86b | 2016-09-02 11:25:56 -0700 | [diff] [blame^] | 213 | gpio_input(GPIO(1, B, 7)); /* I2C0_SDA remove pull_up */ |
| 214 | gpio_input(GPIO(1, C, 0)); /* I2C0_SCL remove pull_up */ |
| 215 | |
| 216 | i2c_init(0, 100*KHz); |
| 217 | |
Lin Huang | b497b48 | 2016-03-31 18:44:13 +0800 | [diff] [blame] | 218 | write32(&rk3399_pmugrf->iomux_i2c0_sda, IOMUX_I2C0_SDA); |
| 219 | write32(&rk3399_pmugrf->iomux_i2c0_scl, IOMUX_I2C0_SCL); |
Lin Huang | b497b48 | 2016-03-31 18:44:13 +0800 | [diff] [blame] | 220 | |
| 221 | for (i = 0; i < ARRAY_SIZE(i2c_writes); i++) { |
| 222 | i2c_buf[0] = i2c_writes[i].reg; |
| 223 | i2c_buf[1] = i2c_writes[i].value; |
| 224 | i2c_transfer(booster_i2c_port, &i2c_command, 1); |
| 225 | } |
| 226 | } |
| 227 | |
| 228 | void mainboard_power_on_backlight(void) |
| 229 | { |
| 230 | gpio_output(GPIO(1, C, 1), 1); /* BL_EN */ |
| 231 | |
Julius Werner | 5e6771b | 2016-07-29 16:15:04 -0700 | [diff] [blame] | 232 | if (IS_ENABLED(CONFIG_BOARD_GOOGLE_GRU) && board_id() == 0) |
Lin Huang | b497b48 | 2016-03-31 18:44:13 +0800 | [diff] [blame] | 233 | enable_backlight_booster(); |
huang lin | a6dbfb5 | 2016-03-02 18:38:40 +0800 | [diff] [blame] | 234 | } |
| 235 | |
| 236 | static void mainboard_enable(device_t dev) |
| 237 | { |
| 238 | dev->ops->init = &mainboard_init; |
| 239 | } |
| 240 | |
| 241 | struct chip_operations mainboard_ops = { |
| 242 | .name = CONFIG_MAINBOARD_PART_NUMBER, |
| 243 | .enable_dev = mainboard_enable, |
| 244 | }; |