Elyes HAOUAS | f7b2fe6 | 2020-05-07 12:38:15 +0200 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0-or-later |
Jonathan Zhang | 8f89549 | 2020-01-16 11:16:45 -0800 | [diff] [blame] | 2 | |
Andrey Petrov | 662da6c | 2020-03-16 22:46:57 -0700 | [diff] [blame] | 3 | source "src/soc/intel/xeon_sp/skx/Kconfig" |
Andrey Petrov | 2e41075 | 2020-03-20 12:08:32 -0700 | [diff] [blame] | 4 | source "src/soc/intel/xeon_sp/cpx/Kconfig" |
Rocky Phagura | d4db36e | 2021-04-03 08:49:32 -0700 | [diff] [blame] | 5 | source "src/soc/intel/xeon_sp/ras/Kconfig" |
Andrey Petrov | 662da6c | 2020-03-16 22:46:57 -0700 | [diff] [blame] | 6 | |
| 7 | config XEON_SP_COMMON_BASE |
Jonathan Zhang | 8f89549 | 2020-01-16 11:16:45 -0800 | [diff] [blame] | 8 | bool |
Andrey Petrov | 662da6c | 2020-03-16 22:46:57 -0700 | [diff] [blame] | 9 | |
| 10 | config SOC_INTEL_SKYLAKE_SP |
| 11 | bool |
| 12 | select XEON_SP_COMMON_BASE |
Jonathan Zhang | d4efb33 | 2020-07-22 12:39:40 -0700 | [diff] [blame] | 13 | select PLATFORM_USES_FSP2_0 |
Jonathan Zhang | 8f89549 | 2020-01-16 11:16:45 -0800 | [diff] [blame] | 14 | help |
Andrey Petrov | 662da6c | 2020-03-16 22:46:57 -0700 | [diff] [blame] | 15 | Intel Skylake-SP support |
Jonathan Zhang | 8f89549 | 2020-01-16 11:16:45 -0800 | [diff] [blame] | 16 | |
Andrey Petrov | 2e41075 | 2020-03-20 12:08:32 -0700 | [diff] [blame] | 17 | config SOC_INTEL_COOPERLAKE_SP |
| 18 | bool |
| 19 | select XEON_SP_COMMON_BASE |
Jonathan Zhang | d4efb33 | 2020-07-22 12:39:40 -0700 | [diff] [blame] | 20 | select PLATFORM_USES_FSP2_2 |
Elyes HAOUAS | 86ea251 | 2020-08-18 21:12:37 +0200 | [diff] [blame] | 21 | select CACHE_MRC_SETTINGS |
Andrey Petrov | 2e41075 | 2020-03-20 12:08:32 -0700 | [diff] [blame] | 22 | help |
Paul Menzel | 5554226 | 2021-11-09 08:09:40 +0100 | [diff] [blame] | 23 | Intel Cooper Lake-SP support |
Andrey Petrov | 2e41075 | 2020-03-20 12:08:32 -0700 | [diff] [blame] | 24 | |
Andrey Petrov | 662da6c | 2020-03-16 22:46:57 -0700 | [diff] [blame] | 25 | if XEON_SP_COMMON_BASE |
Jonathan Zhang | 8f89549 | 2020-01-16 11:16:45 -0800 | [diff] [blame] | 26 | |
Andrey Petrov | 662da6c | 2020-03-16 22:46:57 -0700 | [diff] [blame] | 27 | config CPU_SPECIFIC_OPTIONS |
Jonathan Zhang | 8f89549 | 2020-01-16 11:16:45 -0800 | [diff] [blame] | 28 | def_bool y |
Angel Pons | 8e035e3 | 2021-06-22 12:58:20 +0200 | [diff] [blame] | 29 | select ARCH_X86 |
Jonathan Zhang | 8f89549 | 2020-01-16 11:16:45 -0800 | [diff] [blame] | 30 | select BOOT_DEVICE_SUPPORTS_WRITES |
Angel Pons | eeb4705 | 2020-09-02 15:29:49 +0200 | [diff] [blame] | 31 | select CPU_INTEL_COMMON |
Jonathan Zhang | 8f89549 | 2020-01-16 11:16:45 -0800 | [diff] [blame] | 32 | select SOC_INTEL_COMMON |
| 33 | select SOC_INTEL_COMMON_RESET |
Jonathan Zhang | 8f89549 | 2020-01-16 11:16:45 -0800 | [diff] [blame] | 34 | select FSP_PLATFORM_MEMORY_SETTINGS_VERSIONS |
| 35 | select FSP_T_XIP |
| 36 | select FSP_M_XIP |
Jonathan Zhang | 8f89549 | 2020-01-16 11:16:45 -0800 | [diff] [blame] | 37 | select POSTCAR_STAGE |
Marc Jones | 64c6223 | 2021-04-06 14:09:30 -0600 | [diff] [blame] | 38 | select PARALLEL_MP_AP_WORK |
Marc Jones | 81ef9c2 | 2021-01-21 10:53:47 -0700 | [diff] [blame] | 39 | select PMC_GLOBAL_RESET_ENABLE_LOCK |
Jonathan Zhang | 8f89549 | 2020-01-16 11:16:45 -0800 | [diff] [blame] | 40 | select INTEL_DESCRIPTOR_MODE_CAPABLE |
Jonathan Zhang | 8f89549 | 2020-01-16 11:16:45 -0800 | [diff] [blame] | 41 | select SOC_INTEL_COMMON_BLOCK |
| 42 | select SOC_INTEL_COMMON_BLOCK_CPU |
Maxim Polyakov | 5b06ffe | 2020-03-22 14:57:36 +0300 | [diff] [blame] | 43 | select SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT |
Maxim Polyakov | 5b06ffe | 2020-03-22 14:57:36 +0300 | [diff] [blame] | 44 | select SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL |
Arthur Heymans | f4f332d | 2020-11-19 14:23:46 +0100 | [diff] [blame] | 45 | select SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE |
Rocky Phagura | 17a798b | 2020-10-08 13:32:41 -0700 | [diff] [blame] | 46 | select SOC_INTEL_COMMON_BLOCK_SMM |
Marc Jones | 63e2a84 | 2020-12-02 11:33:02 -0700 | [diff] [blame] | 47 | select SOC_INTEL_COMMON_BLOCK_ACPI |
Marc Jones | 81ef9c2 | 2021-01-21 10:53:47 -0700 | [diff] [blame] | 48 | select SOC_INTEL_COMMON_PCH_BASE |
| 49 | select SOC_INTEL_COMMON_PCH_SERVER |
Jonathan Zhang | 8f89549 | 2020-01-16 11:16:45 -0800 | [diff] [blame] | 50 | select TSC_MONOTONIC_TIMER |
Johnny Lin | a70ebdf | 2021-01-29 13:20:14 +0800 | [diff] [blame] | 51 | select TPM_STARTUP_IGNORE_POSTINIT if INTEL_TXT |
Jonathan Zhang | 8f89549 | 2020-01-16 11:16:45 -0800 | [diff] [blame] | 52 | select UDELAY_TSC |
| 53 | select SUPPORT_CPU_UCODE_IN_CBFS |
| 54 | select CPU_INTEL_FIRMWARE_INTERFACE_TABLE |
Andrey Petrov | 662da6c | 2020-03-16 22:46:57 -0700 | [diff] [blame] | 55 | select FSP_CAR |
Arthur Heymans | f4f332d | 2020-11-19 14:23:46 +0100 | [diff] [blame] | 56 | select ACPI_INTEL_HARDWARE_SLEEP_VALUES |
Rocky Phagura | 17a798b | 2020-10-08 13:32:41 -0700 | [diff] [blame] | 57 | select SMM_TSEG |
| 58 | select HAVE_SMI_HANDLER |
Arthur Heymans | f4f332d | 2020-11-19 14:23:46 +0100 | [diff] [blame] | 59 | select REG_SCRIPT |
Arthur Heymans | 129ed0a | 2020-12-08 13:21:49 +0100 | [diff] [blame] | 60 | select NO_FSP_TEMP_RAM_EXIT |
| 61 | select INTEL_CAR_NEM # For postcar only now |
Jonathan Zhang | 8f89549 | 2020-01-16 11:16:45 -0800 | [diff] [blame] | 62 | |
| 63 | config MAINBOARD_USES_FSP2_0 |
| 64 | bool |
| 65 | default y |
| 66 | |
| 67 | config USE_FSP2_0_DRIVER |
| 68 | def_bool y |
| 69 | depends on MAINBOARD_USES_FSP2_0 |
| 70 | select PLATFORM_USES_FSP2_0 |
Jonathan Zhang | 951a409 | 2020-06-09 18:01:32 -0700 | [diff] [blame] | 71 | select UDK_202005_BINDING |
Jonathan Zhang | 8f89549 | 2020-01-16 11:16:45 -0800 | [diff] [blame] | 72 | select POSTCAR_STAGE |
| 73 | |
Jonathan Zhang | 8f89549 | 2020-01-16 11:16:45 -0800 | [diff] [blame] | 74 | config MAX_SOCKET |
| 75 | int |
| 76 | default 2 |
| 77 | |
| 78 | # For 2S config, the number of cpus could be as high as |
| 79 | # 2 threads * 20 cores * 2 sockets |
| 80 | config MAX_CPUS |
| 81 | int |
| 82 | default 80 |
| 83 | |
Arthur Heymans | 83a5593 | 2021-03-25 15:59:49 +0100 | [diff] [blame] | 84 | config INTEL_ACPI_BASE_ADDRESS |
| 85 | hex |
| 86 | default 0x500 |
| 87 | help |
| 88 | IO Address of ACPI. |
| 89 | |
| 90 | config INTEL_PCH_PWRM_BASE_ADDRESS |
| 91 | hex |
| 92 | default 0xfe000000 |
| 93 | help |
| 94 | PCH PWRM Base address. |
| 95 | |
Jonathan Zhang | 8f89549 | 2020-01-16 11:16:45 -0800 | [diff] [blame] | 96 | config PCR_BASE_ADDRESS |
| 97 | hex |
| 98 | default 0xfd000000 |
| 99 | help |
| 100 | This option allows you to select MMIO Base Address of sideband bus. |
| 101 | |
Jonathan Zhang | 8f89549 | 2020-01-16 11:16:45 -0800 | [diff] [blame] | 102 | config DCACHE_BSP_STACK_SIZE |
| 103 | hex |
| 104 | default 0x10000 |
| 105 | |
Shelley Chen | 4e9bb33 | 2021-10-20 15:43:45 -0700 | [diff] [blame] | 106 | config ECAM_MMCONF_BASE_ADDRESS |
Jonathan Zhang | 8f89549 | 2020-01-16 11:16:45 -0800 | [diff] [blame] | 107 | default 0x80000000 |
| 108 | |
Shelley Chen | 4e9bb33 | 2021-10-20 15:43:45 -0700 | [diff] [blame] | 109 | config ECAM_MMCONF_BUS_NUMBER |
Kyösti Mälkki | 06c761c | 2021-02-14 14:06:38 +0200 | [diff] [blame] | 110 | default 256 |
| 111 | |
Jonathan Zhang | 8f89549 | 2020-01-16 11:16:45 -0800 | [diff] [blame] | 112 | config HEAP_SIZE |
| 113 | hex |
| 114 | default 0x80000 |
| 115 | |
Rocky Phagura | d4db36e | 2021-04-03 08:49:32 -0700 | [diff] [blame] | 116 | config SOC_INTEL_XEON_RAS |
| 117 | bool |
| 118 | select SOC_ACPI_HEST |
| 119 | select SOC_RAS_ELOG |
| 120 | |
Jonathan Zhang | 8f89549 | 2020-01-16 11:16:45 -0800 | [diff] [blame] | 121 | endif ## SOC_INTEL_XEON_SP |