Marc Jones | 2448484 | 2017-05-04 21:17:45 -0600 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2017 Advanced Micro Devices, Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | */ |
Marc Jones | 1587dc8 | 2017-05-15 18:55:11 -0600 | [diff] [blame] | 15 | |
Marc Jones | 2448484 | 2017-05-04 21:17:45 -0600 | [diff] [blame] | 16 | #include <chip.h> |
Marshall Dawson | 9db8a44 | 2017-09-20 10:24:28 -0600 | [diff] [blame] | 17 | #include <bootstate.h> |
| 18 | #include <console/console.h> |
Marc Jones | 1587dc8 | 2017-05-15 18:55:11 -0600 | [diff] [blame] | 19 | #include <cpu/amd/mtrr.h> |
| 20 | #include <cpu/cpu.h> |
Marc Jones | 2448484 | 2017-05-04 21:17:45 -0600 | [diff] [blame] | 21 | #include <device/device.h> |
| 22 | #include <device/pci.h> |
Justin TerAvest | 13101a7 | 2018-01-24 14:23:12 -0700 | [diff] [blame^] | 23 | #include <drivers/i2c/designware/dw_i2c.h> |
Marshall Dawson | a7bfbbe | 2017-09-13 17:24:53 -0600 | [diff] [blame] | 24 | #include <soc/cpu.h> |
Marc Jones | 1587dc8 | 2017-05-15 18:55:11 -0600 | [diff] [blame] | 25 | #include <soc/northbridge.h> |
Justin TerAvest | 949d666 | 2018-01-24 14:20:03 -0700 | [diff] [blame] | 26 | #include <soc/pci_devs.h> |
Marshall Dawson | a7bfbbe | 2017-09-13 17:24:53 -0600 | [diff] [blame] | 27 | #include <soc/southbridge.h> |
Marshall Dawson | f5e057c | 2017-10-12 16:10:14 -0600 | [diff] [blame] | 28 | #include <amdblocks/psp.h> |
Richard Spiegel | 0ad74ac | 2017-12-08 16:53:29 -0700 | [diff] [blame] | 29 | #include <amdblocks/agesawrapper.h> |
| 30 | #include <amdblocks/agesawrapper_call.h> |
Marc Jones | 2448484 | 2017-05-04 21:17:45 -0600 | [diff] [blame] | 31 | |
Justin TerAvest | 13101a7 | 2018-01-24 14:23:12 -0700 | [diff] [blame^] | 32 | /* Supplied by i2c.c */ |
| 33 | extern struct device_operations stoneyridge_i2c_mmio_ops; |
| 34 | extern const char *i2c_acpi_name(const struct device *dev); |
| 35 | |
Marc Jones | 1587dc8 | 2017-05-15 18:55:11 -0600 | [diff] [blame] | 36 | struct device_operations cpu_bus_ops = { |
| 37 | .read_resources = DEVICE_NOOP, |
| 38 | .set_resources = DEVICE_NOOP, |
| 39 | .enable_resources = DEVICE_NOOP, |
Marshall Dawson | a7bfbbe | 2017-09-13 17:24:53 -0600 | [diff] [blame] | 40 | .init = stoney_init_cpus, |
Marc Jones | 6bfcf66 | 2017-08-06 17:42:35 -0600 | [diff] [blame] | 41 | .acpi_fill_ssdt_generator = generate_cpu_entries, |
Marc Jones | 2448484 | 2017-05-04 21:17:45 -0600 | [diff] [blame] | 42 | }; |
| 43 | |
Justin TerAvest | 949d666 | 2018-01-24 14:20:03 -0700 | [diff] [blame] | 44 | static const char *soc_acpi_name(const struct device *dev) |
| 45 | { |
| 46 | if (dev->path.type == DEVICE_PATH_DOMAIN) |
| 47 | return "PCI0"; |
| 48 | if (dev->path.type != DEVICE_PATH_PCI) |
| 49 | return NULL; |
| 50 | |
| 51 | switch (dev->path.pci.devfn) { |
| 52 | case EHCI1_DEVFN: |
| 53 | return "EHC0"; |
| 54 | case LPC_DEVFN: |
| 55 | return "LPCB"; |
| 56 | case SATA_DEVFN: |
| 57 | return "STCR"; |
| 58 | case SD_DEVFN: |
| 59 | return "SDCN"; |
| 60 | case SMBUS_DEVFN: |
| 61 | return "SBUS"; |
| 62 | case XHCI_DEVFN: |
| 63 | return "XHC0"; |
| 64 | default: |
| 65 | return NULL; |
| 66 | } |
| 67 | }; |
| 68 | |
Marc Jones | 1587dc8 | 2017-05-15 18:55:11 -0600 | [diff] [blame] | 69 | struct device_operations pci_domain_ops = { |
| 70 | .read_resources = domain_read_resources, |
| 71 | .set_resources = domain_set_resources, |
| 72 | .enable_resources = domain_enable_resources, |
Marc Jones | 1587dc8 | 2017-05-15 18:55:11 -0600 | [diff] [blame] | 73 | .scan_bus = pci_domain_scan_bus, |
| 74 | .ops_pci_bus = pci_bus_default_ops, |
Justin TerAvest | 949d666 | 2018-01-24 14:20:03 -0700 | [diff] [blame] | 75 | .acpi_name = soc_acpi_name, |
Marc Jones | 2448484 | 2017-05-04 21:17:45 -0600 | [diff] [blame] | 76 | }; |
| 77 | |
| 78 | static void enable_dev(device_t dev) |
| 79 | { |
| 80 | /* Set the operations if it is a special bus type */ |
Marshall Dawson | 4e101ad | 2017-06-15 12:17:38 -0600 | [diff] [blame] | 81 | if (dev->path.type == DEVICE_PATH_DOMAIN) |
Marc Jones | 2448484 | 2017-05-04 21:17:45 -0600 | [diff] [blame] | 82 | dev->ops = &pci_domain_ops; |
Marshall Dawson | 4e101ad | 2017-06-15 12:17:38 -0600 | [diff] [blame] | 83 | else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) |
Marc Jones | 2448484 | 2017-05-04 21:17:45 -0600 | [diff] [blame] | 84 | dev->ops = &cpu_bus_ops; |
Marshall Dawson | 4e101ad | 2017-06-15 12:17:38 -0600 | [diff] [blame] | 85 | else if (dev->path.type == DEVICE_PATH_PCI) |
Marc Jones | dfeb1c4 | 2017-08-07 19:08:24 -0600 | [diff] [blame] | 86 | sb_enable(dev); |
Justin TerAvest | 13101a7 | 2018-01-24 14:23:12 -0700 | [diff] [blame^] | 87 | else if (dev->path.type == DEVICE_PATH_MMIO) |
| 88 | if (i2c_acpi_name(dev) != NULL) |
| 89 | dev->ops = &stoneyridge_i2c_mmio_ops; |
Marc Jones | 2448484 | 2017-05-04 21:17:45 -0600 | [diff] [blame] | 90 | } |
| 91 | |
| 92 | static void soc_init(void *chip_info) |
| 93 | { |
Marc Jones | dfeb1c4 | 2017-08-07 19:08:24 -0600 | [diff] [blame] | 94 | southbridge_init(chip_info); |
Richard Spiegel | 9d0921b | 2017-12-19 10:24:50 -0700 | [diff] [blame] | 95 | setup_bsp_ramtop(); |
Marc Jones | 2448484 | 2017-05-04 21:17:45 -0600 | [diff] [blame] | 96 | } |
| 97 | |
| 98 | static void soc_final(void *chip_info) |
| 99 | { |
Marc Jones | dfeb1c4 | 2017-08-07 19:08:24 -0600 | [diff] [blame] | 100 | southbridge_final(chip_info); |
Marc Jones | 1587dc8 | 2017-05-15 18:55:11 -0600 | [diff] [blame] | 101 | fam15_finalize(chip_info); |
Marc Jones | 2448484 | 2017-05-04 21:17:45 -0600 | [diff] [blame] | 102 | } |
| 103 | |
| 104 | struct chip_operations soc_amd_stoneyridge_ops = { |
| 105 | CHIP_NAME("AMD StoneyRidge SOC") |
| 106 | .enable_dev = &enable_dev, |
| 107 | .init = &soc_init, |
| 108 | .final = &soc_final |
| 109 | }; |
Marshall Dawson | 9db8a44 | 2017-09-20 10:24:28 -0600 | [diff] [blame] | 110 | |
Marshall Dawson | f5e057c | 2017-10-12 16:10:14 -0600 | [diff] [blame] | 111 | static void earliest_ramstage(void *unused) |
Marshall Dawson | 9db8a44 | 2017-09-20 10:24:28 -0600 | [diff] [blame] | 112 | { |
| 113 | post_code(0x46); |
Marshall Dawson | f5e057c | 2017-10-12 16:10:14 -0600 | [diff] [blame] | 114 | if (IS_ENABLED(CONFIG_SOC_AMD_PSP_SELECTABLE_SMU_FW)) |
| 115 | psp_load_named_blob(MBOX_BIOS_CMD_SMU_FW2, "smu_fw2"); |
| 116 | |
| 117 | post_code(0x47); |
Richard Spiegel | 138a1d2 | 2017-12-13 13:26:21 -0700 | [diff] [blame] | 118 | do_agesawrapper(agesawrapper_amdinitenv, "amdinitenv"); |
Marshall Dawson | 9db8a44 | 2017-09-20 10:24:28 -0600 | [diff] [blame] | 119 | } |
| 120 | |
Marshall Dawson | f5e057c | 2017-10-12 16:10:14 -0600 | [diff] [blame] | 121 | BOOT_STATE_INIT_ENTRY(BS_PRE_DEVICE, BS_ON_ENTRY, earliest_ramstage, NULL); |