blob: 3faf536ef940601116d9f7d32746db77407f5801 [file] [log] [blame]
Marc Jones24484842017-05-04 21:17:45 -06001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2017 Advanced Micro Devices, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15#include <chip.h>
16#include <device/device.h>
17#include <device/pci.h>
18#include <soc/hudson.h>
19
20static void pci_domain_set_resources(device_t dev)
21{
22 assign_resources(dev->link_list);
23}
24
25static struct device_operations pci_domain_ops = {
26 .set_resources = &pci_domain_set_resources,
27};
28
29static struct device_operations cpu_bus_ops = {
30};
31
32static void enable_dev(device_t dev)
33{
34 /* Set the operations if it is a special bus type */
35 if (dev->path.type == DEVICE_PATH_DOMAIN) {
36 dev->ops = &pci_domain_ops;
37 } else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) {
38 dev->ops = &cpu_bus_ops;
39 } else if (dev->path.type == DEVICE_PATH_PCI) {
40 hudson_enable(dev);
41 }
42}
43
44static void soc_init(void *chip_info)
45{
46 hudson_init(chip_info);
47}
48
49static void soc_final(void *chip_info)
50{
51 hudson_final(chip_info);
52}
53
54struct chip_operations soc_amd_stoneyridge_ops = {
55 CHIP_NAME("AMD StoneyRidge SOC")
56 .enable_dev = &enable_dev,
57 .init = &soc_init,
58 .final = &soc_final
59};
60