Gitiles
Code Review Sign In
review.coreboot.org / coreboot / 13101a7be09d9db8a8e3a784a262a6d122ff3503 / src / soc / amd / stoneyridge / chip.c
  1. 13101a7 soc/amd/stoneyridge: Add I2C devicetree support. by Justin TerAvest · 7 years ago
  2. 949d666 src/amd/stoneyridge: Add devicetree ACPI names by Justin TerAvest · 7 years ago
  3. 9d0921b soc/amd/stoneyridge/chip.c: Move setup_bsp_ramtop to soc_init() by Richard Spiegel · 7 years ago
  4. 138a1d2 soc/amd/common: Update agesawrapper_call.h by Richard Spiegel · 7 years ago
  5. 0ad74ac soc/amd/common: Move Agesa related headers by Richard Spiegel · 7 years ago
  6. f5e057c soc/amd/stoneyridge: Load SMU fimware using PSP by Marshall Dawson · 7 years ago
  7. 426dc8e soc/amd/stoneyridge: remove superfluous NULL field initialization by Aaron Durbin · 7 years ago
  8. 9db8a44 amd/stoneyridge: Move AmdInitEnv to ramstage by Marshall Dawson · 7 years ago
  9. a7bfbbe amd/stoneyridge: Convert MP init to mp_init_with_smm by Marshall Dawson · 7 years ago
  10. 6bfcf66 stoneyridge: Fix CPU ASL \_PR table by Marc Jones · 7 years ago
  11. dfeb1c4 stoneyridge: Rename hudson to southbridge by Marc Jones · 7 years ago
  12. 4e101ad soc/amd/stoneyridge: Fix most checkpatch errors by Marshall Dawson · 7 years ago
  13. 1587dc8 soc/amd/stoneyridge: Add northbridge support by Marc Jones · 7 years ago
  14. 2448484 soc: Add AMD Stoney Ridge southbridge code by Marc Jones · 7 years ago