Angel Pons | ae59387 | 2020-04-04 18:50:57 +0200 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | /* This file is part of the coreboot project. */ |
Marc Jones | 1587dc8 | 2017-05-15 18:55:11 -0600 | [diff] [blame] | 3 | |
Marshall Dawson | 9db8a44 | 2017-09-20 10:24:28 -0600 | [diff] [blame] | 4 | #include <bootstate.h> |
| 5 | #include <console/console.h> |
Marc Jones | 1587dc8 | 2017-05-15 18:55:11 -0600 | [diff] [blame] | 6 | #include <cpu/amd/mtrr.h> |
Marc Jones | 2448484 | 2017-05-04 21:17:45 -0600 | [diff] [blame] | 7 | #include <device/device.h> |
| 8 | #include <device/pci.h> |
Justin TerAvest | 13101a7 | 2018-01-24 14:23:12 -0700 | [diff] [blame] | 9 | #include <drivers/i2c/designware/dw_i2c.h> |
Marshall Dawson | 8f2a7e0 | 2017-11-01 11:44:48 -0600 | [diff] [blame] | 10 | #include <romstage_handoff.h> |
Duncan Laurie | 32bdffa | 2018-05-07 15:37:28 -0700 | [diff] [blame] | 11 | #include <soc/acpi.h> |
Marshall Dawson | a7bfbbe | 2017-09-13 17:24:53 -0600 | [diff] [blame] | 12 | #include <soc/cpu.h> |
Marc Jones | 1587dc8 | 2017-05-15 18:55:11 -0600 | [diff] [blame] | 13 | #include <soc/northbridge.h> |
Justin TerAvest | 949d666 | 2018-01-24 14:20:03 -0700 | [diff] [blame] | 14 | #include <soc/pci_devs.h> |
Marshall Dawson | a7bfbbe | 2017-09-13 17:24:53 -0600 | [diff] [blame] | 15 | #include <soc/southbridge.h> |
Marshall Dawson | f5e057c | 2017-10-12 16:10:14 -0600 | [diff] [blame] | 16 | #include <amdblocks/psp.h> |
Richard Spiegel | 0ad74ac | 2017-12-08 16:53:29 -0700 | [diff] [blame] | 17 | #include <amdblocks/agesawrapper.h> |
| 18 | #include <amdblocks/agesawrapper_call.h> |
Marc Jones | 2448484 | 2017-05-04 21:17:45 -0600 | [diff] [blame] | 19 | |
Elyes HAOUAS | c338507 | 2019-03-21 15:38:06 +0100 | [diff] [blame] | 20 | #include "chip.h" |
| 21 | |
Justin TerAvest | 13101a7 | 2018-01-24 14:23:12 -0700 | [diff] [blame] | 22 | /* Supplied by i2c.c */ |
| 23 | extern struct device_operations stoneyridge_i2c_mmio_ops; |
| 24 | extern const char *i2c_acpi_name(const struct device *dev); |
| 25 | |
Marc Jones | 1587dc8 | 2017-05-15 18:55:11 -0600 | [diff] [blame] | 26 | struct device_operations cpu_bus_ops = { |
| 27 | .read_resources = DEVICE_NOOP, |
| 28 | .set_resources = DEVICE_NOOP, |
| 29 | .enable_resources = DEVICE_NOOP, |
Marshall Dawson | a7bfbbe | 2017-09-13 17:24:53 -0600 | [diff] [blame] | 30 | .init = stoney_init_cpus, |
Nico Huber | 68680dd | 2020-03-31 17:34:52 +0200 | [diff] [blame] | 31 | .acpi_fill_ssdt = generate_cpu_entries, |
Marc Jones | 2448484 | 2017-05-04 21:17:45 -0600 | [diff] [blame] | 32 | }; |
| 33 | |
Duncan Laurie | 32bdffa | 2018-05-07 15:37:28 -0700 | [diff] [blame] | 34 | const char *soc_acpi_name(const struct device *dev) |
Justin TerAvest | 949d666 | 2018-01-24 14:20:03 -0700 | [diff] [blame] | 35 | { |
| 36 | if (dev->path.type == DEVICE_PATH_DOMAIN) |
| 37 | return "PCI0"; |
Duncan Laurie | 32bdffa | 2018-05-07 15:37:28 -0700 | [diff] [blame] | 38 | |
| 39 | if (dev->path.type == DEVICE_PATH_USB) { |
| 40 | switch (dev->path.usb.port_type) { |
| 41 | case 0: |
| 42 | /* Root Hub */ |
| 43 | return "RHUB"; |
| 44 | case 2: |
| 45 | /* USB2 ports */ |
| 46 | switch (dev->path.usb.port_id) { |
| 47 | case 0: return "HS01"; |
| 48 | case 1: return "HS02"; |
| 49 | case 2: return "HS03"; |
| 50 | case 3: return "HS04"; |
| 51 | case 4: return "HS05"; |
| 52 | case 5: return "HS06"; |
| 53 | case 6: return "HS07"; |
| 54 | case 7: return "HS08"; |
| 55 | } |
| 56 | break; |
| 57 | case 3: |
| 58 | /* USB3 ports */ |
| 59 | switch (dev->path.usb.port_id) { |
| 60 | case 0: return "SS01"; |
| 61 | case 1: return "SS02"; |
| 62 | case 2: return "SS03"; |
| 63 | } |
| 64 | break; |
| 65 | } |
| 66 | return NULL; |
| 67 | } |
| 68 | |
Justin TerAvest | 949d666 | 2018-01-24 14:20:03 -0700 | [diff] [blame] | 69 | if (dev->path.type != DEVICE_PATH_PCI) |
| 70 | return NULL; |
| 71 | |
| 72 | switch (dev->path.pci.devfn) { |
Marc Jones | 6dcb6c2 | 2018-07-26 17:07:13 -0600 | [diff] [blame] | 73 | case GFX_DEVFN: |
| 74 | return "IGFX"; |
Marc Jones | 9022b9d | 2018-05-25 20:53:44 -0600 | [diff] [blame] | 75 | case PCIE0_DEVFN: |
| 76 | return "PBR4"; |
| 77 | case PCIE1_DEVFN: |
| 78 | return "PBR5"; |
| 79 | case PCIE2_DEVFN: |
| 80 | return "PBR6"; |
| 81 | case PCIE3_DEVFN: |
| 82 | return "PBR7"; |
| 83 | case PCIE4_DEVFN: |
| 84 | return "PBR8"; |
| 85 | case HDA1_DEVFN: |
| 86 | return "AZHD"; |
Justin TerAvest | 949d666 | 2018-01-24 14:20:03 -0700 | [diff] [blame] | 87 | case EHCI1_DEVFN: |
| 88 | return "EHC0"; |
| 89 | case LPC_DEVFN: |
| 90 | return "LPCB"; |
| 91 | case SATA_DEVFN: |
| 92 | return "STCR"; |
| 93 | case SD_DEVFN: |
| 94 | return "SDCN"; |
| 95 | case SMBUS_DEVFN: |
| 96 | return "SBUS"; |
| 97 | case XHCI_DEVFN: |
| 98 | return "XHC0"; |
| 99 | default: |
| 100 | return NULL; |
| 101 | } |
| 102 | }; |
| 103 | |
Marc Jones | 1587dc8 | 2017-05-15 18:55:11 -0600 | [diff] [blame] | 104 | struct device_operations pci_domain_ops = { |
Martin Roth | 3424f38 | 2018-10-29 16:19:46 -0600 | [diff] [blame] | 105 | .read_resources = pci_domain_read_resources, |
Marc Jones | 1587dc8 | 2017-05-15 18:55:11 -0600 | [diff] [blame] | 106 | .set_resources = domain_set_resources, |
| 107 | .enable_resources = domain_enable_resources, |
Marc Jones | 1587dc8 | 2017-05-15 18:55:11 -0600 | [diff] [blame] | 108 | .scan_bus = pci_domain_scan_bus, |
Justin TerAvest | 949d666 | 2018-01-24 14:20:03 -0700 | [diff] [blame] | 109 | .acpi_name = soc_acpi_name, |
Marc Jones | 2448484 | 2017-05-04 21:17:45 -0600 | [diff] [blame] | 110 | }; |
| 111 | |
Elyes HAOUAS | 777ccd4 | 2018-05-22 10:52:05 +0200 | [diff] [blame] | 112 | static void enable_dev(struct device *dev) |
Marc Jones | 2448484 | 2017-05-04 21:17:45 -0600 | [diff] [blame] | 113 | { |
| 114 | /* Set the operations if it is a special bus type */ |
Marshall Dawson | 4e101ad | 2017-06-15 12:17:38 -0600 | [diff] [blame] | 115 | if (dev->path.type == DEVICE_PATH_DOMAIN) |
Marc Jones | 2448484 | 2017-05-04 21:17:45 -0600 | [diff] [blame] | 116 | dev->ops = &pci_domain_ops; |
Marshall Dawson | 4e101ad | 2017-06-15 12:17:38 -0600 | [diff] [blame] | 117 | else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) |
Marc Jones | 2448484 | 2017-05-04 21:17:45 -0600 | [diff] [blame] | 118 | dev->ops = &cpu_bus_ops; |
Marshall Dawson | 4e101ad | 2017-06-15 12:17:38 -0600 | [diff] [blame] | 119 | else if (dev->path.type == DEVICE_PATH_PCI) |
Marc Jones | dfeb1c4 | 2017-08-07 19:08:24 -0600 | [diff] [blame] | 120 | sb_enable(dev); |
Justin TerAvest | 13101a7 | 2018-01-24 14:23:12 -0700 | [diff] [blame] | 121 | else if (dev->path.type == DEVICE_PATH_MMIO) |
| 122 | if (i2c_acpi_name(dev) != NULL) |
| 123 | dev->ops = &stoneyridge_i2c_mmio_ops; |
Marc Jones | 2448484 | 2017-05-04 21:17:45 -0600 | [diff] [blame] | 124 | } |
| 125 | |
| 126 | static void soc_init(void *chip_info) |
| 127 | { |
Marc Jones | dfeb1c4 | 2017-08-07 19:08:24 -0600 | [diff] [blame] | 128 | southbridge_init(chip_info); |
Richard Spiegel | 9d0921b | 2017-12-19 10:24:50 -0700 | [diff] [blame] | 129 | setup_bsp_ramtop(); |
Marc Jones | 2448484 | 2017-05-04 21:17:45 -0600 | [diff] [blame] | 130 | } |
| 131 | |
| 132 | static void soc_final(void *chip_info) |
| 133 | { |
Marc Jones | dfeb1c4 | 2017-08-07 19:08:24 -0600 | [diff] [blame] | 134 | southbridge_final(chip_info); |
Marc Jones | 1587dc8 | 2017-05-15 18:55:11 -0600 | [diff] [blame] | 135 | fam15_finalize(chip_info); |
Marc Jones | 2448484 | 2017-05-04 21:17:45 -0600 | [diff] [blame] | 136 | } |
| 137 | |
| 138 | struct chip_operations soc_amd_stoneyridge_ops = { |
| 139 | CHIP_NAME("AMD StoneyRidge SOC") |
Elyes HAOUAS | 1d19127 | 2018-11-27 12:23:48 +0100 | [diff] [blame] | 140 | .enable_dev = enable_dev, |
| 141 | .init = soc_init, |
| 142 | .final = soc_final |
Marc Jones | 2448484 | 2017-05-04 21:17:45 -0600 | [diff] [blame] | 143 | }; |
Marshall Dawson | 9db8a44 | 2017-09-20 10:24:28 -0600 | [diff] [blame] | 144 | |
Marshall Dawson | f5e057c | 2017-10-12 16:10:14 -0600 | [diff] [blame] | 145 | static void earliest_ramstage(void *unused) |
Marshall Dawson | 9db8a44 | 2017-09-20 10:24:28 -0600 | [diff] [blame] | 146 | { |
Kyösti Mälkki | a8eb477 | 2018-06-28 17:23:27 +0300 | [diff] [blame] | 147 | int s3_resume = acpi_s3_resume_allowed() && |
| 148 | romstage_handoff_is_resume(); |
| 149 | if (!s3_resume) { |
Marshall Dawson | 8f2a7e0 | 2017-11-01 11:44:48 -0600 | [diff] [blame] | 150 | post_code(0x46); |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 151 | if (CONFIG(SOC_AMD_PSP_SELECTABLE_SMU_FW)) |
Marshall Dawson | 737e56a | 2020-01-19 16:32:08 -0700 | [diff] [blame] | 152 | psp_load_named_blob(BLOB_SMU_FW2, "smu_fw2"); |
Marshall Dawson | f5e057c | 2017-10-12 16:10:14 -0600 | [diff] [blame] | 153 | |
Marshall Dawson | 8f2a7e0 | 2017-11-01 11:44:48 -0600 | [diff] [blame] | 154 | post_code(0x47); |
Kyösti Mälkki | 6e512c4 | 2018-06-14 06:57:05 +0300 | [diff] [blame] | 155 | do_agesawrapper(AMD_INIT_ENV, "amdinitenv"); |
Marshall Dawson | 8f2a7e0 | 2017-11-01 11:44:48 -0600 | [diff] [blame] | 156 | } else { |
| 157 | /* Complete the initial system restoration */ |
| 158 | post_code(0x46); |
Kyösti Mälkki | 6e512c4 | 2018-06-14 06:57:05 +0300 | [diff] [blame] | 159 | do_agesawrapper(AMD_S3LATE_RESTORE, "amds3laterestore"); |
Marshall Dawson | 8f2a7e0 | 2017-11-01 11:44:48 -0600 | [diff] [blame] | 160 | } |
Marshall Dawson | 9db8a44 | 2017-09-20 10:24:28 -0600 | [diff] [blame] | 161 | } |
| 162 | |
Marshall Dawson | f5e057c | 2017-10-12 16:10:14 -0600 | [diff] [blame] | 163 | BOOT_STATE_INIT_ENTRY(BS_PRE_DEVICE, BS_ON_ENTRY, earliest_ramstage, NULL); |