Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1 | /* |
Stefan Reinauer | 7e61e45 | 2008-01-18 10:35:56 +0000 | [diff] [blame] | 2 | * This file is part of the coreboot project. |
Uwe Hermann | b80dbf0 | 2007-04-22 19:08:13 +0000 | [diff] [blame] | 3 | * |
| 4 | * It was originally based on the Linux kernel (drivers/pci/pci.c). |
| 5 | * |
| 6 | * Modifications are: |
| 7 | * Copyright (C) 2003-2004 Linux Networx |
| 8 | * (Written by Eric Biederman <ebiederman@lnxi.com> for Linux Networx) |
| 9 | * Copyright (C) 2003-2006 Ronald G. Minnich <rminnich@gmail.com> |
| 10 | * Copyright (C) 2004-2005 Li-Ta Lo <ollie@lanl.gov> |
| 11 | * Copyright (C) 2005-2006 Tyan |
| 12 | * (Written by Yinghai Lu <yhlu@tyan.com> for Tyan) |
Patrick Georgi | 16cdbb2 | 2009-04-21 20:14:31 +0000 | [diff] [blame] | 13 | * Copyright (C) 2005-2009 coresystems GmbH |
| 14 | * (Written by Stefan Reinauer <stepan@coresystems.de> for coresystems GmbH) |
Mike Loptien | 0f5cf5e | 2014-05-12 21:46:31 -0600 | [diff] [blame] | 15 | * Copyright (C) 2014 Sage Electronic Engineering, LLC. |
Uwe Hermann | b80dbf0 | 2007-04-22 19:08:13 +0000 | [diff] [blame] | 16 | */ |
| 17 | |
| 18 | /* |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 19 | * PCI Bus Services, see include/linux/pci.h for further explanation. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 20 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 21 | * Copyright 1993 -- 1997 Drew Eckhardt, Frederic Potter, |
| 22 | * David Mosberger-Tang |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 23 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 24 | * Copyright 1997 -- 1999 Martin Mares <mj@atrey.karlin.mff.cuni.cz> |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 25 | */ |
| 26 | |
Edward O'Callaghan | 6c99250 | 2014-06-20 21:19:06 +1000 | [diff] [blame] | 27 | #include <arch/acpi.h> |
| 28 | #include <arch/io.h> |
| 29 | #include <bootmode.h> |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 30 | #include <console/console.h> |
| 31 | #include <stdlib.h> |
| 32 | #include <stdint.h> |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 33 | #include <string.h> |
Edward O'Callaghan | 6c99250 | 2014-06-20 21:19:06 +1000 | [diff] [blame] | 34 | #include <delay.h> |
Edward O'Callaghan | 6c99250 | 2014-06-20 21:19:06 +1000 | [diff] [blame] | 35 | #include <device/cardbus.h> |
Eric Biederman | 5899fd8 | 2003-04-24 06:25:08 +0000 | [diff] [blame] | 36 | #include <device/device.h> |
| 37 | #include <device/pci.h> |
| 38 | #include <device/pci_ids.h> |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 39 | #include <device/pcix.h> |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 40 | #include <device/pciexp.h> |
Edward O'Callaghan | 6c99250 | 2014-06-20 21:19:06 +1000 | [diff] [blame] | 41 | #include <device/hypertransport.h> |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 42 | #include <pc80/i8259.h> |
Edward O'Callaghan | 6c99250 | 2014-06-20 21:19:06 +1000 | [diff] [blame] | 43 | #include <kconfig.h> |
Stefan Reinauer | 74a0efe | 2012-03-30 17:10:49 -0700 | [diff] [blame] | 44 | #include <vendorcode/google/chromeos/chromeos.h> |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 45 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 46 | u8 pci_moving_config8(struct device *dev, unsigned int reg) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 47 | { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 48 | u8 value, ones, zeroes; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 49 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 50 | value = pci_read_config8(dev, reg); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 51 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 52 | pci_write_config8(dev, reg, 0xff); |
| 53 | ones = pci_read_config8(dev, reg); |
| 54 | |
| 55 | pci_write_config8(dev, reg, 0x00); |
| 56 | zeroes = pci_read_config8(dev, reg); |
| 57 | |
| 58 | pci_write_config8(dev, reg, value); |
| 59 | |
| 60 | return ones ^ zeroes; |
| 61 | } |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 62 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 63 | u16 pci_moving_config16(struct device *dev, unsigned int reg) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 64 | { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 65 | u16 value, ones, zeroes; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 66 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 67 | value = pci_read_config16(dev, reg); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 68 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 69 | pci_write_config16(dev, reg, 0xffff); |
| 70 | ones = pci_read_config16(dev, reg); |
| 71 | |
| 72 | pci_write_config16(dev, reg, 0x0000); |
| 73 | zeroes = pci_read_config16(dev, reg); |
| 74 | |
| 75 | pci_write_config16(dev, reg, value); |
| 76 | |
| 77 | return ones ^ zeroes; |
| 78 | } |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 79 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 80 | u32 pci_moving_config32(struct device *dev, unsigned int reg) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 81 | { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 82 | u32 value, ones, zeroes; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 83 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 84 | value = pci_read_config32(dev, reg); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 85 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 86 | pci_write_config32(dev, reg, 0xffffffff); |
| 87 | ones = pci_read_config32(dev, reg); |
| 88 | |
| 89 | pci_write_config32(dev, reg, 0x00000000); |
| 90 | zeroes = pci_read_config32(dev, reg); |
| 91 | |
| 92 | pci_write_config32(dev, reg, value); |
| 93 | |
| 94 | return ones ^ zeroes; |
| 95 | } |
| 96 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 97 | /** |
| 98 | * Given a device, a capability type, and a last position, return the next |
| 99 | * matching capability. Always start at the head of the list. |
| 100 | * |
| 101 | * @param dev Pointer to the device structure. |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 102 | * @param cap PCI_CAP_LIST_ID of the PCI capability we're looking for. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 103 | * @param last Location of the PCI capability register to start from. |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 104 | * @return The next matching capability. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 105 | */ |
| 106 | unsigned pci_find_next_capability(struct device *dev, unsigned cap, |
| 107 | unsigned last) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 108 | { |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 109 | unsigned pos = 0; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 110 | u16 status; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 111 | unsigned reps = 48; |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 112 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 113 | status = pci_read_config16(dev, PCI_STATUS); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 114 | if (!(status & PCI_STATUS_CAP_LIST)) |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 115 | return 0; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 116 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 117 | switch (dev->hdr_type & 0x7f) { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 118 | case PCI_HEADER_TYPE_NORMAL: |
| 119 | case PCI_HEADER_TYPE_BRIDGE: |
| 120 | pos = PCI_CAPABILITY_LIST; |
| 121 | break; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 122 | case PCI_HEADER_TYPE_CARDBUS: |
| 123 | pos = PCI_CB_CAPABILITY_LIST; |
| 124 | break; |
| 125 | default: |
| 126 | return 0; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 127 | } |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 128 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 129 | pos = pci_read_config8(dev, pos); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 130 | while (reps-- && (pos >= 0x40)) { /* Loop through the linked list. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 131 | int this_cap; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 132 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 133 | pos &= ~3; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 134 | this_cap = pci_read_config8(dev, pos + PCI_CAP_LIST_ID); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 135 | printk(BIOS_SPEW, "Capability: type 0x%02x @ 0x%02x\n", |
| 136 | this_cap, pos); |
| 137 | if (this_cap == 0xff) |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 138 | break; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 139 | |
| 140 | if (!last && (this_cap == cap)) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 141 | return pos; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 142 | |
| 143 | if (last == pos) |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 144 | last = 0; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 145 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 146 | pos = pci_read_config8(dev, pos + PCI_CAP_LIST_NEXT); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 147 | } |
| 148 | return 0; |
| 149 | } |
| 150 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 151 | /** |
| 152 | * Given a device, and a capability type, return the next matching |
| 153 | * capability. Always start at the head of the list. |
| 154 | * |
| 155 | * @param dev Pointer to the device structure. |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 156 | * @param cap PCI_CAP_LIST_ID of the PCI capability we're looking for. |
| 157 | * @return The next matching capability. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 158 | */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 159 | unsigned pci_find_capability(device_t dev, unsigned cap) |
| 160 | { |
| 161 | return pci_find_next_capability(dev, cap, 0); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 162 | } |
| 163 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 164 | /** |
| 165 | * Given a device and register, read the size of the BAR for that register. |
| 166 | * |
| 167 | * @param dev Pointer to the device structure. |
| 168 | * @param index Address of the PCI configuration register. |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 169 | * @return TODO |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 170 | */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 171 | struct resource *pci_get_resource(struct device *dev, unsigned long index) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 172 | { |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 173 | struct resource *resource; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 174 | unsigned long value, attr; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 175 | resource_t moving, limit; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 176 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 177 | /* Initialize the resources to nothing. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 178 | resource = new_resource(dev, index); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 179 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 180 | /* Get the initial value. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 181 | value = pci_read_config32(dev, index); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 182 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 183 | /* See which bits move. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 184 | moving = pci_moving_config32(dev, index); |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 185 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 186 | /* Initialize attr to the bits that do not move. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 187 | attr = value & ~moving; |
| 188 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 189 | /* If it is a 64bit resource look at the high half as well. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 190 | if (((attr & PCI_BASE_ADDRESS_SPACE_IO) == 0) && |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 191 | ((attr & PCI_BASE_ADDRESS_MEM_LIMIT_MASK) == |
| 192 | PCI_BASE_ADDRESS_MEM_LIMIT_64)) { |
| 193 | /* Find the high bits that move. */ |
| 194 | moving |= |
| 195 | ((resource_t) pci_moving_config32(dev, index + 4)) << 32; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 196 | } |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 197 | |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 198 | /* Find the resource constraints. |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 199 | * Start by finding the bits that move. From there: |
| 200 | * - Size is the least significant bit of the bits that move. |
| 201 | * - Limit is all of the bits that move plus all of the lower bits. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 202 | * See PCI Spec 6.2.5.1. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 203 | */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 204 | limit = 0; |
| 205 | if (moving) { |
| 206 | resource->size = 1; |
| 207 | resource->align = resource->gran = 0; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 208 | while (!(moving & resource->size)) { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 209 | resource->size <<= 1; |
| 210 | resource->align += 1; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 211 | resource->gran += 1; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 212 | } |
| 213 | resource->limit = limit = moving | (resource->size - 1); |
Nico Huber | 8193b06 | 2015-10-21 15:43:41 +0200 | [diff] [blame] | 214 | |
| 215 | if (pci_base_address_is_memory_space(attr)) { |
| 216 | /* Page-align to allow individual mapping of devices. */ |
| 217 | if (resource->align < 12) |
| 218 | resource->align = 12; |
| 219 | } |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 220 | } |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 221 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 222 | /* |
| 223 | * Some broken hardware has read-only registers that do not |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 224 | * really size correctly. |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 225 | * |
| 226 | * Example: the Acer M7229 has BARs 1-4 normally read-only, |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 227 | * so BAR1 at offset 0x10 reads 0x1f1. If you size that register |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 228 | * by writing 0xffffffff to it, it will read back as 0x1f1 -- which |
| 229 | * is a violation of the spec. |
| 230 | * |
| 231 | * We catch this case and ignore it by observing which bits move. |
| 232 | * |
| 233 | * This also catches the common case of unimplemented registers |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 234 | * that always read back as 0. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 235 | */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 236 | if (moving == 0) { |
| 237 | if (value != 0) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 238 | printk(BIOS_DEBUG, "%s register %02lx(%08lx), " |
| 239 | "read-only ignoring it\n", |
| 240 | dev_path(dev), index, value); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 241 | } |
| 242 | resource->flags = 0; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 243 | } else if (attr & PCI_BASE_ADDRESS_SPACE_IO) { |
| 244 | /* An I/O mapped base address. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 245 | attr &= PCI_BASE_ADDRESS_IO_ATTR_MASK; |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 246 | resource->flags |= IORESOURCE_IO; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 247 | /* I don't want to deal with 32bit I/O resources. */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 248 | resource->limit = 0xffff; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 249 | } else { |
| 250 | /* A Memory mapped base address. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 251 | attr &= PCI_BASE_ADDRESS_MEM_ATTR_MASK; |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 252 | resource->flags |= IORESOURCE_MEM; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 253 | if (attr & PCI_BASE_ADDRESS_MEM_PREFETCH) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 254 | resource->flags |= IORESOURCE_PREFETCH; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 255 | attr &= PCI_BASE_ADDRESS_MEM_LIMIT_MASK; |
| 256 | if (attr == PCI_BASE_ADDRESS_MEM_LIMIT_32) { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 257 | /* 32bit limit. */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 258 | resource->limit = 0xffffffffUL; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 259 | } else if (attr == PCI_BASE_ADDRESS_MEM_LIMIT_1M) { |
| 260 | /* 1MB limit. */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 261 | resource->limit = 0x000fffffUL; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 262 | } else if (attr == PCI_BASE_ADDRESS_MEM_LIMIT_64) { |
| 263 | /* 64bit limit. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 264 | resource->limit = 0xffffffffffffffffULL; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 265 | resource->flags |= IORESOURCE_PCI64; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 266 | } else { |
| 267 | /* Invalid value. */ |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 268 | printk(BIOS_ERR, "Broken BAR with value %lx\n", attr); |
| 269 | printk(BIOS_ERR, " on dev %s at index %02lx\n", |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 270 | dev_path(dev), index); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 271 | resource->flags = 0; |
| 272 | } |
| 273 | } |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 274 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 275 | /* Don't let the limit exceed which bits can move. */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 276 | if (resource->limit > limit) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 277 | resource->limit = limit; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 278 | |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 279 | return resource; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 280 | } |
| 281 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 282 | /** |
| 283 | * Given a device and an index, read the size of the BAR for that register. |
| 284 | * |
| 285 | * @param dev Pointer to the device structure. |
| 286 | * @param index Address of the PCI configuration register. |
| 287 | */ |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 288 | static void pci_get_rom_resource(struct device *dev, unsigned long index) |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 289 | { |
| 290 | struct resource *resource; |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 291 | unsigned long value; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 292 | resource_t moving; |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 293 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 294 | /* Initialize the resources to nothing. */ |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 295 | resource = new_resource(dev, index); |
| 296 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 297 | /* Get the initial value. */ |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 298 | value = pci_read_config32(dev, index); |
| 299 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 300 | /* See which bits move. */ |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 301 | moving = pci_moving_config32(dev, index); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 302 | |
| 303 | /* Clear the Enable bit. */ |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 304 | moving = moving & ~PCI_ROM_ADDRESS_ENABLE; |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 305 | |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 306 | /* Find the resource constraints. |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 307 | * Start by finding the bits that move. From there: |
| 308 | * - Size is the least significant bit of the bits that move. |
| 309 | * - Limit is all of the bits that move plus all of the lower bits. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 310 | * See PCI Spec 6.2.5.1. |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 311 | */ |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 312 | if (moving) { |
| 313 | resource->size = 1; |
| 314 | resource->align = resource->gran = 0; |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 315 | while (!(moving & resource->size)) { |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 316 | resource->size <<= 1; |
| 317 | resource->align += 1; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 318 | resource->gran += 1; |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 319 | } |
Patrick Georgi | 16cdbb2 | 2009-04-21 20:14:31 +0000 | [diff] [blame] | 320 | resource->limit = moving | (resource->size - 1); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 321 | resource->flags |= IORESOURCE_MEM | IORESOURCE_READONLY; |
| 322 | } else { |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 323 | if (value != 0) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 324 | printk(BIOS_DEBUG, "%s register %02lx(%08lx), " |
| 325 | "read-only ignoring it\n", |
| 326 | dev_path(dev), index, value); |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 327 | } |
| 328 | resource->flags = 0; |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 329 | } |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 330 | compact_resources(dev); |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 331 | } |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 332 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 333 | /** |
| 334 | * Read the base address registers for a given device. |
| 335 | * |
| 336 | * @param dev Pointer to the dev structure. |
| 337 | * @param howmany How many registers to read (6 for device, 2 for bridge). |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 338 | */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 339 | static void pci_read_bases(struct device *dev, unsigned int howmany) |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 340 | { |
| 341 | unsigned long index; |
| 342 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 343 | for (index = PCI_BASE_ADDRESS_0; |
| 344 | (index < PCI_BASE_ADDRESS_0 + (howmany << 2));) { |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 345 | struct resource *resource; |
| 346 | resource = pci_get_resource(dev, index); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 347 | index += (resource->flags & IORESOURCE_PCI64) ? 8 : 4; |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 348 | } |
Li-Ta Lo | e8b1c9d | 2004-12-27 04:25:41 +0000 | [diff] [blame] | 349 | |
| 350 | compact_resources(dev); |
Li-Ta Lo | 9a5b496 | 2004-12-23 21:48:01 +0000 | [diff] [blame] | 351 | } |
| 352 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 353 | static void pci_record_bridge_resource(struct device *dev, resource_t moving, |
| 354 | unsigned index, unsigned long type) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 355 | { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 356 | struct resource *resource; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 357 | unsigned long gran; |
| 358 | resource_t step; |
| 359 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 360 | resource = NULL; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 361 | |
| 362 | if (!moving) |
| 363 | return; |
| 364 | |
| 365 | /* Initialize the constraints on the current bus. */ |
| 366 | resource = new_resource(dev, index); |
| 367 | resource->size = 0; |
| 368 | gran = 0; |
| 369 | step = 1; |
| 370 | while ((moving & step) == 0) { |
| 371 | gran += 1; |
| 372 | step <<= 1; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 373 | } |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 374 | resource->gran = gran; |
| 375 | resource->align = gran; |
| 376 | resource->limit = moving | (step - 1); |
| 377 | resource->flags = type | IORESOURCE_PCI_BRIDGE | |
| 378 | IORESOURCE_BRIDGE; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 379 | } |
| 380 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 381 | static void pci_bridge_read_bases(struct device *dev) |
| 382 | { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 383 | resource_t moving_base, moving_limit, moving; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 384 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 385 | /* See if the bridge I/O resources are implemented. */ |
| 386 | moving_base = ((u32) pci_moving_config8(dev, PCI_IO_BASE)) << 8; |
| 387 | moving_base |= |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 388 | ((u32) pci_moving_config16(dev, PCI_IO_BASE_UPPER16)) << 16; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 389 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 390 | moving_limit = ((u32) pci_moving_config8(dev, PCI_IO_LIMIT)) << 8; |
| 391 | moving_limit |= |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 392 | ((u32) pci_moving_config16(dev, PCI_IO_LIMIT_UPPER16)) << 16; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 393 | |
| 394 | moving = moving_base & moving_limit; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 395 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 396 | /* Initialize the I/O space constraints on the current bus. */ |
| 397 | pci_record_bridge_resource(dev, moving, PCI_IO_BASE, IORESOURCE_IO); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 398 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 399 | /* See if the bridge prefmem resources are implemented. */ |
| 400 | moving_base = |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 401 | ((resource_t) pci_moving_config16(dev, PCI_PREF_MEMORY_BASE)) << 16; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 402 | moving_base |= |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 403 | ((resource_t) pci_moving_config32(dev, PCI_PREF_BASE_UPPER32)) << 32; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 404 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 405 | moving_limit = |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 406 | ((resource_t) pci_moving_config16(dev, PCI_PREF_MEMORY_LIMIT)) << 16; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 407 | moving_limit |= |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 408 | ((resource_t) pci_moving_config32(dev, PCI_PREF_LIMIT_UPPER32)) << 32; |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 409 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 410 | moving = moving_base & moving_limit; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 411 | /* Initialize the prefetchable memory constraints on the current bus. */ |
| 412 | pci_record_bridge_resource(dev, moving, PCI_PREF_MEMORY_BASE, |
| 413 | IORESOURCE_MEM | IORESOURCE_PREFETCH); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 414 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 415 | /* See if the bridge mem resources are implemented. */ |
| 416 | moving_base = ((u32) pci_moving_config16(dev, PCI_MEMORY_BASE)) << 16; |
| 417 | moving_limit = ((u32) pci_moving_config16(dev, PCI_MEMORY_LIMIT)) << 16; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 418 | |
| 419 | moving = moving_base & moving_limit; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 420 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 421 | /* Initialize the memory resources on the current bus. */ |
| 422 | pci_record_bridge_resource(dev, moving, PCI_MEMORY_BASE, |
| 423 | IORESOURCE_MEM); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 424 | |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 425 | compact_resources(dev); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 426 | } |
| 427 | |
Eric Biederman | 5899fd8 | 2003-04-24 06:25:08 +0000 | [diff] [blame] | 428 | void pci_dev_read_resources(struct device *dev) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 429 | { |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 430 | pci_read_bases(dev, 6); |
| 431 | pci_get_rom_resource(dev, PCI_ROM_ADDRESS); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 432 | } |
| 433 | |
Eric Biederman | 5899fd8 | 2003-04-24 06:25:08 +0000 | [diff] [blame] | 434 | void pci_bus_read_resources(struct device *dev) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 435 | { |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 436 | pci_bridge_read_bases(dev); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 437 | pci_read_bases(dev, 2); |
| 438 | pci_get_rom_resource(dev, PCI_ROM_ADDRESS1); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 439 | } |
| 440 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 441 | void pci_domain_read_resources(struct device *dev) |
| 442 | { |
| 443 | struct resource *res; |
| 444 | |
| 445 | /* Initialize the system-wide I/O space constraints. */ |
| 446 | res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0)); |
| 447 | res->limit = 0xffffUL; |
| 448 | res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | |
| 449 | IORESOURCE_ASSIGNED; |
| 450 | |
| 451 | /* Initialize the system-wide memory resources constraints. */ |
| 452 | res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0)); |
| 453 | res->limit = 0xffffffffULL; |
| 454 | res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | |
| 455 | IORESOURCE_ASSIGNED; |
| 456 | } |
| 457 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 458 | static void pci_set_resource(struct device *dev, struct resource *resource) |
| 459 | { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 460 | resource_t base, end; |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 461 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 462 | /* Make certain the resource has actually been assigned a value. */ |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 463 | if (!(resource->flags & IORESOURCE_ASSIGNED)) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 464 | printk(BIOS_ERR, "ERROR: %s %02lx %s size: 0x%010llx not " |
| 465 | "assigned\n", dev_path(dev), resource->index, |
| 466 | resource_type(resource), resource->size); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 467 | return; |
| 468 | } |
| 469 | |
Myles Watson | eb81a5b | 2009-11-05 20:06:19 +0000 | [diff] [blame] | 470 | /* If this resource is fixed don't worry about it. */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 471 | if (resource->flags & IORESOURCE_FIXED) |
Myles Watson | eb81a5b | 2009-11-05 20:06:19 +0000 | [diff] [blame] | 472 | return; |
Myles Watson | eb81a5b | 2009-11-05 20:06:19 +0000 | [diff] [blame] | 473 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 474 | /* If I have already stored this resource don't worry about it. */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 475 | if (resource->flags & IORESOURCE_STORED) |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 476 | return; |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 477 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 478 | /* If the resource is subtractive don't worry about it. */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 479 | if (resource->flags & IORESOURCE_SUBTRACTIVE) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 480 | return; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 481 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 482 | /* Only handle PCI memory and I/O resources for now. */ |
| 483 | if (!(resource->flags & (IORESOURCE_MEM | IORESOURCE_IO))) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 484 | return; |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 485 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 486 | /* Enable the resources in the command register. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 487 | if (resource->size) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 488 | if (resource->flags & IORESOURCE_MEM) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 489 | dev->command |= PCI_COMMAND_MEMORY; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 490 | if (resource->flags & IORESOURCE_IO) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 491 | dev->command |= PCI_COMMAND_IO; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 492 | if (resource->flags & IORESOURCE_PCI_BRIDGE) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 493 | dev->command |= PCI_COMMAND_MASTER; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 494 | } |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 495 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 496 | /* Get the base address. */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 497 | base = resource->base; |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 498 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 499 | /* Get the end. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 500 | end = resource_end(resource); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 501 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 502 | /* Now store the resource. */ |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 503 | resource->flags |= IORESOURCE_STORED; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 504 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 505 | /* |
| 506 | * PCI bridges have no enable bit. They are disabled if the base of |
| 507 | * the range is greater than the limit. If the size is zero, disable |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 508 | * by setting the base = limit and end = limit - 2^gran. |
| 509 | */ |
| 510 | if (resource->size == 0 && (resource->flags & IORESOURCE_PCI_BRIDGE)) { |
| 511 | base = resource->limit; |
| 512 | end = resource->limit - (1 << resource->gran); |
| 513 | resource->base = base; |
| 514 | } |
| 515 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 516 | if (!(resource->flags & IORESOURCE_PCI_BRIDGE)) { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 517 | unsigned long base_lo, base_hi; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 518 | |
| 519 | /* |
| 520 | * Some chipsets allow us to set/clear the I/O bit |
| 521 | * (e.g. VIA 82C686A). So set it to be safe. |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 522 | */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 523 | base_lo = base & 0xffffffff; |
| 524 | base_hi = (base >> 32) & 0xffffffff; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 525 | if (resource->flags & IORESOURCE_IO) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 526 | base_lo |= PCI_BASE_ADDRESS_SPACE_IO; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 527 | pci_write_config32(dev, resource->index, base_lo); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 528 | if (resource->flags & IORESOURCE_PCI64) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 529 | pci_write_config32(dev, resource->index + 4, base_hi); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 530 | } else if (resource->index == PCI_IO_BASE) { |
| 531 | /* Set the I/O ranges. */ |
| 532 | pci_write_config8(dev, PCI_IO_BASE, base >> 8); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 533 | pci_write_config16(dev, PCI_IO_BASE_UPPER16, base >> 16); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 534 | pci_write_config8(dev, PCI_IO_LIMIT, end >> 8); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 535 | pci_write_config16(dev, PCI_IO_LIMIT_UPPER16, end >> 16); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 536 | } else if (resource->index == PCI_MEMORY_BASE) { |
| 537 | /* Set the memory range. */ |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 538 | pci_write_config16(dev, PCI_MEMORY_BASE, base >> 16); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 539 | pci_write_config16(dev, PCI_MEMORY_LIMIT, end >> 16); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 540 | } else if (resource->index == PCI_PREF_MEMORY_BASE) { |
| 541 | /* Set the prefetchable memory range. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 542 | pci_write_config16(dev, PCI_PREF_MEMORY_BASE, base >> 16); |
| 543 | pci_write_config32(dev, PCI_PREF_BASE_UPPER32, base >> 32); |
| 544 | pci_write_config16(dev, PCI_PREF_MEMORY_LIMIT, end >> 16); |
| 545 | pci_write_config32(dev, PCI_PREF_LIMIT_UPPER32, end >> 32); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 546 | } else { |
| 547 | /* Don't let me think I stored the resource. */ |
Eric Biederman | 5cd8173 | 2004-03-11 15:01:31 +0000 | [diff] [blame] | 548 | resource->flags &= ~IORESOURCE_STORED; |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 549 | printk(BIOS_ERR, "ERROR: invalid resource->index %lx\n", |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 550 | resource->index); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 551 | } |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 552 | |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 553 | report_resource_stored(dev, resource, ""); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 554 | } |
| 555 | |
Eric Biederman | 5899fd8 | 2003-04-24 06:25:08 +0000 | [diff] [blame] | 556 | void pci_dev_set_resources(struct device *dev) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 557 | { |
Myles Watson | c25cc11 | 2010-05-21 14:33:48 +0000 | [diff] [blame] | 558 | struct resource *res; |
Myles Watson | 894a347 | 2010-06-09 22:41:35 +0000 | [diff] [blame] | 559 | struct bus *bus; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 560 | u8 line; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 561 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 562 | for (res = dev->resource_list; res; res = res->next) |
Myles Watson | c25cc11 | 2010-05-21 14:33:48 +0000 | [diff] [blame] | 563 | pci_set_resource(dev, res); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 564 | |
Myles Watson | 894a347 | 2010-06-09 22:41:35 +0000 | [diff] [blame] | 565 | for (bus = dev->link_list; bus; bus = bus->next) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 566 | if (bus->children) |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 567 | assign_resources(bus); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 568 | } |
| 569 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 570 | /* Set a default latency timer. */ |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 571 | pci_write_config8(dev, PCI_LATENCY_TIMER, 0x40); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 572 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 573 | /* Set a default secondary latency timer. */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 574 | if ((dev->hdr_type & 0x7f) == PCI_HEADER_TYPE_BRIDGE) |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 575 | pci_write_config8(dev, PCI_SEC_LATENCY_TIMER, 0x40); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 576 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 577 | /* Zero the IRQ settings. */ |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 578 | line = pci_read_config8(dev, PCI_INTERRUPT_PIN); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 579 | if (line) |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 580 | pci_write_config8(dev, PCI_INTERRUPT_LINE, 0); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 581 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 582 | /* Set the cache line size, so far 64 bytes is good for everyone. */ |
Eric Biederman | 7a5416a | 2003-06-12 19:23:51 +0000 | [diff] [blame] | 583 | pci_write_config8(dev, PCI_CACHE_LINE_SIZE, 64 >> 2); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 584 | } |
| 585 | |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 586 | void pci_dev_enable_resources(struct device *dev) |
| 587 | { |
Eric Biederman | a9e632c | 2004-11-18 22:38:08 +0000 | [diff] [blame] | 588 | const struct pci_operations *ops; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 589 | u16 command; |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 590 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 591 | /* Set the subsystem vendor and device ID for mainboard devices. */ |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 592 | ops = ops_pci(dev); |
Eric Biederman | dbec2d4 | 2004-10-21 10:44:08 +0000 | [diff] [blame] | 593 | if (dev->on_mainboard && ops && ops->set_subsystem) { |
Duncan Laurie | 7e1c83e | 2013-08-09 07:55:10 -0700 | [diff] [blame] | 594 | if (CONFIG_SUBSYSTEM_VENDOR_ID) |
| 595 | dev->subsystem_vendor = CONFIG_SUBSYSTEM_VENDOR_ID; |
| 596 | if (CONFIG_SUBSYSTEM_DEVICE_ID) |
| 597 | dev->subsystem_device = CONFIG_SUBSYSTEM_DEVICE_ID; |
Sven Schnelle | 9132102 | 2011-03-01 19:58:47 +0000 | [diff] [blame] | 598 | printk(BIOS_DEBUG, "%s subsystem <- %04x/%04x\n", |
| 599 | dev_path(dev), dev->subsystem_vendor, |
| 600 | dev->subsystem_device); |
| 601 | ops->set_subsystem(dev, dev->subsystem_vendor, |
| 602 | dev->subsystem_device); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 603 | } |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 604 | command = pci_read_config16(dev, PCI_COMMAND); |
| 605 | command |= dev->command; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 606 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 607 | /* v3 has |
| 608 | * command |= (PCI_COMMAND_PARITY + PCI_COMMAND_SERR); // Error check. |
| 609 | */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 610 | |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 611 | printk(BIOS_DEBUG, "%s cmd <- %02x\n", dev_path(dev), command); |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 612 | pci_write_config16(dev, PCI_COMMAND, command); |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 613 | } |
| 614 | |
| 615 | void pci_bus_enable_resources(struct device *dev) |
| 616 | { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 617 | u16 ctrl; |
| 618 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 619 | /* |
| 620 | * Enable I/O in command register if there is VGA card |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 621 | * connected with (even it does not claim I/O resource). |
| 622 | */ |
Myles Watson | 894a347 | 2010-06-09 22:41:35 +0000 | [diff] [blame] | 623 | if (dev->link_list->bridge_ctrl & PCI_BRIDGE_CTL_VGA) |
Li-Ta Lo | 515f6c7 | 2005-01-11 22:48:54 +0000 | [diff] [blame] | 624 | dev->command |= PCI_COMMAND_IO; |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 625 | ctrl = pci_read_config16(dev, PCI_BRIDGE_CONTROL); |
Myles Watson | 894a347 | 2010-06-09 22:41:35 +0000 | [diff] [blame] | 626 | ctrl |= dev->link_list->bridge_ctrl; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 627 | ctrl |= (PCI_BRIDGE_CTL_PARITY + PCI_BRIDGE_CTL_SERR); /* Error check. */ |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 628 | printk(BIOS_DEBUG, "%s bridge ctrl <- %04x\n", dev_path(dev), ctrl); |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 629 | pci_write_config16(dev, PCI_BRIDGE_CONTROL, ctrl); |
| 630 | |
| 631 | pci_dev_enable_resources(dev); |
| 632 | } |
| 633 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 634 | void pci_bus_reset(struct bus *bus) |
| 635 | { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 636 | u16 ctl; |
| 637 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 638 | ctl = pci_read_config16(bus->dev, PCI_BRIDGE_CONTROL); |
| 639 | ctl |= PCI_BRIDGE_CTL_BUS_RESET; |
| 640 | pci_write_config16(bus->dev, PCI_BRIDGE_CONTROL, ctl); |
| 641 | mdelay(10); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 642 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 643 | ctl &= ~PCI_BRIDGE_CTL_BUS_RESET; |
| 644 | pci_write_config16(bus->dev, PCI_BRIDGE_CONTROL, ctl); |
| 645 | delay(1); |
| 646 | } |
| 647 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 648 | void pci_dev_set_subsystem(struct device *dev, unsigned vendor, unsigned device) |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 649 | { |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 650 | pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 651 | ((device & 0xffff) << 16) | (vendor & 0xffff)); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 652 | } |
| 653 | |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 654 | #if CONFIG_VGA_ROM_RUN |
| 655 | static int should_run_oprom(struct device *dev) |
| 656 | { |
| 657 | static int should_run = -1; |
| 658 | |
| 659 | if (should_run >= 0) |
| 660 | return should_run; |
| 661 | |
Kyösti Mälkki | 9ab1c10 | 2013-12-22 00:22:49 +0200 | [diff] [blame] | 662 | /* Don't run VGA option ROMs, unless we have to print |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 663 | * something on the screen before the kernel is loaded. |
| 664 | */ |
Kyösti Mälkki | 9ab1c10 | 2013-12-22 00:22:49 +0200 | [diff] [blame] | 665 | should_run = !IS_ENABLED(CONFIG_BOOTMODE_STRAPS) || |
| 666 | developer_mode_enabled() || recovery_mode_enabled(); |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 667 | |
Kyösti Mälkki | 9ab1c10 | 2013-12-22 00:22:49 +0200 | [diff] [blame] | 668 | #if CONFIG_CHROMEOS |
| 669 | if (!should_run) |
| 670 | should_run = vboot_wants_oprom(); |
| 671 | #endif |
| 672 | if (!should_run) |
| 673 | printk(BIOS_DEBUG, "Not running VGA Option ROM\n"); |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 674 | return should_run; |
| 675 | } |
| 676 | |
| 677 | static int should_load_oprom(struct device *dev) |
| 678 | { |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 679 | /* If S3_VGA_ROM_RUN is disabled, skip running VGA option |
| 680 | * ROMs when coming out of an S3 resume. |
| 681 | */ |
Kyösti Mälkki | 58ceb00 | 2014-06-20 06:21:01 +0300 | [diff] [blame] | 682 | if (!IS_ENABLED(CONFIG_S3_VGA_ROM_RUN) && acpi_is_wakeup_s3() && |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 683 | ((dev->class >> 8) == PCI_CLASS_DISPLAY_VGA)) |
| 684 | return 0; |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 685 | if (IS_ENABLED(CONFIG_ALWAYS_LOAD_OPROM)) |
| 686 | return 1; |
| 687 | if (should_run_oprom(dev)) |
| 688 | return 1; |
| 689 | |
| 690 | return 0; |
| 691 | } |
| 692 | #endif /* CONFIG_VGA_ROM_RUN */ |
| 693 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 694 | /** Default handler: only runs the relevant PCI BIOS. */ |
Li-Ta Lo | 883b879 | 2005-01-10 23:16:22 +0000 | [diff] [blame] | 695 | void pci_dev_init(struct device *dev) |
| 696 | { |
Vladimir Serbinenko | b32816e | 2013-12-20 17:47:19 +0100 | [diff] [blame] | 697 | #if CONFIG_VGA_ROM_RUN |
Li-Ta Lo | 883b879 | 2005-01-10 23:16:22 +0000 | [diff] [blame] | 698 | struct rom_header *rom, *ram; |
| 699 | |
Vladimir Serbinenko | b32816e | 2013-12-20 17:47:19 +0100 | [diff] [blame] | 700 | /* Only execute VGA ROMs. */ |
| 701 | if (((dev->class >> 8) != PCI_CLASS_DISPLAY_VGA)) |
Myles Watson | 17aeeca | 2009-10-07 18:41:08 +0000 | [diff] [blame] | 702 | return; |
Roman Kononov | 778a42b | 2007-04-06 18:34:39 +0000 | [diff] [blame] | 703 | |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 704 | if (!should_load_oprom(dev)) |
Stefan Reinauer | 74a0efe | 2012-03-30 17:10:49 -0700 | [diff] [blame] | 705 | return; |
Aaron Durbin | ce872cb | 2013-03-28 15:59:19 -0500 | [diff] [blame] | 706 | |
| 707 | rom = pci_rom_probe(dev); |
| 708 | if (rom == NULL) |
| 709 | return; |
| 710 | |
| 711 | ram = pci_rom_load(dev, rom); |
| 712 | if (ram == NULL) |
| 713 | return; |
| 714 | |
Kyösti Mälkki | 580e564 | 2014-05-01 16:31:34 +0300 | [diff] [blame] | 715 | if (!should_run_oprom(dev)) |
| 716 | return; |
| 717 | |
Stefan Reinauer | d98cf5b | 2008-08-01 11:25:41 +0000 | [diff] [blame] | 718 | run_bios(dev, (unsigned long)ram); |
Kyösti Mälkki | ab56b3b | 2013-11-28 16:44:51 +0200 | [diff] [blame] | 719 | gfx_set_init_done(1); |
| 720 | printk(BIOS_DEBUG, "VGA Option ROM was run\n"); |
Vladimir Serbinenko | b32816e | 2013-12-20 17:47:19 +0100 | [diff] [blame] | 721 | #endif /* CONFIG_VGA_ROM_RUN */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 722 | } |
Li-Ta Lo | 883b879 | 2005-01-10 23:16:22 +0000 | [diff] [blame] | 723 | |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 724 | /** Default device operation for PCI devices */ |
Eric Biederman | a9e632c | 2004-11-18 22:38:08 +0000 | [diff] [blame] | 725 | static struct pci_operations pci_dev_ops_pci = { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 726 | .set_subsystem = pci_dev_set_subsystem, |
| 727 | }; |
| 728 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 729 | struct device_operations default_pci_ops_dev = { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 730 | .read_resources = pci_dev_read_resources, |
| 731 | .set_resources = pci_dev_set_resources, |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 732 | .enable_resources = pci_dev_enable_resources, |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 733 | .init = pci_dev_init, |
| 734 | .scan_bus = 0, |
| 735 | .enable = 0, |
| 736 | .ops_pci = &pci_dev_ops_pci, |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 737 | }; |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 738 | |
| 739 | /** Default device operations for PCI bridges */ |
Eric Biederman | a9e632c | 2004-11-18 22:38:08 +0000 | [diff] [blame] | 740 | static struct pci_operations pci_bus_ops_pci = { |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 741 | .set_subsystem = 0, |
| 742 | }; |
Li-Ta Lo | 883b879 | 2005-01-10 23:16:22 +0000 | [diff] [blame] | 743 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 744 | struct device_operations default_pci_ops_bus = { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 745 | .read_resources = pci_bus_read_resources, |
| 746 | .set_resources = pci_dev_set_resources, |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 747 | .enable_resources = pci_bus_enable_resources, |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 748 | .init = 0, |
| 749 | .scan_bus = pci_scan_bridge, |
| 750 | .enable = 0, |
| 751 | .reset_bus = pci_bus_reset, |
| 752 | .ops_pci = &pci_bus_ops_pci, |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 753 | }; |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 754 | |
| 755 | /** |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 756 | * Detect the type of downstream bridge. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 757 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 758 | * This function is a heuristic to detect which type of bus is downstream |
| 759 | * of a PCI-to-PCI bridge. This functions by looking for various capability |
| 760 | * blocks to figure out the type of downstream bridge. PCI-X, PCI-E, and |
| 761 | * Hypertransport all seem to have appropriate capabilities. |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 762 | * |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 763 | * When only a PCI-Express capability is found the type is examined to see |
| 764 | * which type of bridge we have. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 765 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 766 | * @param dev Pointer to the device structure of the bridge. |
| 767 | * @return Appropriate bridge operations. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 768 | */ |
| 769 | static struct device_operations *get_pci_bridge_ops(device_t dev) |
| 770 | { |
Patrick Georgi | e166782 | 2012-05-05 15:29:32 +0200 | [diff] [blame] | 771 | #if CONFIG_PCIX_PLUGIN_SUPPORT |
Ronald G. Minnich | 78a1667 | 2012-11-29 16:28:21 -0800 | [diff] [blame] | 772 | unsigned int pcixpos; |
| 773 | pcixpos = pci_find_capability(dev, PCI_CAP_ID_PCIX); |
| 774 | if (pcixpos) { |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 775 | printk(BIOS_DEBUG, "%s subordinate bus PCI-X\n", dev_path(dev)); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 776 | return &default_pcix_ops_bus; |
| 777 | } |
| 778 | #endif |
Patrick Georgi | e166782 | 2012-05-05 15:29:32 +0200 | [diff] [blame] | 779 | #if CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT |
Ronald G. Minnich | 78a1667 | 2012-11-29 16:28:21 -0800 | [diff] [blame] | 780 | unsigned int htpos = 0; |
| 781 | while ((htpos = pci_find_next_capability(dev, PCI_CAP_ID_HT, htpos))) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 782 | u16 flags; |
Ronald G. Minnich | 78a1667 | 2012-11-29 16:28:21 -0800 | [diff] [blame] | 783 | flags = pci_read_config16(dev, htpos + PCI_CAP_FLAGS); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 784 | if ((flags >> 13) == 1) { |
| 785 | /* Host or Secondary Interface */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 786 | printk(BIOS_DEBUG, "%s subordinate bus HT\n", |
| 787 | dev_path(dev)); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 788 | return &default_ht_ops_bus; |
| 789 | } |
| 790 | } |
| 791 | #endif |
Patrick Georgi | e166782 | 2012-05-05 15:29:32 +0200 | [diff] [blame] | 792 | #if CONFIG_PCIEXP_PLUGIN_SUPPORT |
Ronald G. Minnich | 78a1667 | 2012-11-29 16:28:21 -0800 | [diff] [blame] | 793 | unsigned int pciexpos; |
| 794 | pciexpos = pci_find_capability(dev, PCI_CAP_ID_PCIE); |
| 795 | if (pciexpos) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 796 | u16 flags; |
Ronald G. Minnich | 78a1667 | 2012-11-29 16:28:21 -0800 | [diff] [blame] | 797 | flags = pci_read_config16(dev, pciexpos + PCI_EXP_FLAGS); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 798 | switch ((flags & PCI_EXP_FLAGS_TYPE) >> 4) { |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 799 | case PCI_EXP_TYPE_ROOT_PORT: |
| 800 | case PCI_EXP_TYPE_UPSTREAM: |
| 801 | case PCI_EXP_TYPE_DOWNSTREAM: |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 802 | printk(BIOS_DEBUG, "%s subordinate bus PCI Express\n", |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 803 | dev_path(dev)); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 804 | return &default_pciexp_ops_bus; |
| 805 | case PCI_EXP_TYPE_PCI_BRIDGE: |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 806 | printk(BIOS_DEBUG, "%s subordinate PCI\n", |
| 807 | dev_path(dev)); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 808 | return &default_pci_ops_bus; |
| 809 | default: |
| 810 | break; |
| 811 | } |
| 812 | } |
| 813 | #endif |
| 814 | return &default_pci_ops_bus; |
| 815 | } |
| 816 | |
| 817 | /** |
Vadim Bendebury | 8049fc9 | 2012-04-24 12:53:19 -0700 | [diff] [blame] | 818 | * Check if a device id matches a PCI driver entry. |
| 819 | * |
| 820 | * The driver entry can either point at a zero terminated array of acceptable |
| 821 | * device IDs, or include a single device ID. |
| 822 | * |
Martin Roth | 98b698c | 2015-01-06 21:02:52 -0700 | [diff] [blame] | 823 | * @param driver pointer to the PCI driver entry being checked |
| 824 | * @param device_id PCI device ID of the device being matched |
Vadim Bendebury | 8049fc9 | 2012-04-24 12:53:19 -0700 | [diff] [blame] | 825 | */ |
| 826 | static int device_id_match(struct pci_driver *driver, unsigned short device_id) |
| 827 | { |
| 828 | if (driver->devices) { |
| 829 | unsigned short check_id; |
| 830 | const unsigned short *device_list = driver->devices; |
| 831 | while ((check_id = *device_list++) != 0) |
| 832 | if (check_id == device_id) |
| 833 | return 1; |
| 834 | } |
| 835 | |
| 836 | return (driver->device == device_id); |
| 837 | } |
| 838 | |
| 839 | /** |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 840 | * Set up PCI device operation. |
| 841 | * |
| 842 | * Check if it already has a driver. If not, use find_device_operations(), |
| 843 | * or set to a default based on type. |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 844 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 845 | * @param dev Pointer to the device whose pci_ops you want to set. |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 846 | * @see pci_drivers |
| 847 | */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 848 | static void set_pci_ops(struct device *dev) |
| 849 | { |
| 850 | struct pci_driver *driver; |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 851 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 852 | if (dev->ops) |
| 853 | return; |
| 854 | |
| 855 | /* |
| 856 | * Look through the list of setup drivers and find one for |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 857 | * this PCI device. |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 858 | */ |
Aaron Durbin | 0375815 | 2015-09-03 17:23:08 -0500 | [diff] [blame] | 859 | for (driver = &_pci_drivers[0]; driver != &_epci_drivers[0]; driver++) { |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 860 | if ((driver->vendor == dev->vendor) && |
Vadim Bendebury | 8049fc9 | 2012-04-24 12:53:19 -0700 | [diff] [blame] | 861 | device_id_match(driver, dev->device)) { |
Uwe Hermann | 312673c | 2009-10-27 21:49:33 +0000 | [diff] [blame] | 862 | dev->ops = (struct device_operations *)driver->ops; |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 863 | printk(BIOS_SPEW, "%s [%04x/%04x] %sops\n", |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 864 | dev_path(dev), driver->vendor, driver->device, |
| 865 | (driver->ops->scan_bus ? "bus " : "")); |
Eric Biederman | 5899fd8 | 2003-04-24 06:25:08 +0000 | [diff] [blame] | 866 | return; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 867 | } |
| 868 | } |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 869 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 870 | /* If I don't have a specific driver use the default operations. */ |
| 871 | switch (dev->hdr_type & 0x7f) { /* Header type */ |
| 872 | case PCI_HEADER_TYPE_NORMAL: |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 873 | if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) |
| 874 | goto bad; |
| 875 | dev->ops = &default_pci_ops_dev; |
| 876 | break; |
| 877 | case PCI_HEADER_TYPE_BRIDGE: |
| 878 | if ((dev->class >> 8) != PCI_CLASS_BRIDGE_PCI) |
| 879 | goto bad; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 880 | dev->ops = get_pci_bridge_ops(dev); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 881 | break; |
Patrick Georgi | e166782 | 2012-05-05 15:29:32 +0200 | [diff] [blame] | 882 | #if CONFIG_CARDBUS_PLUGIN_SUPPORT |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 883 | case PCI_HEADER_TYPE_CARDBUS: |
| 884 | dev->ops = &default_cardbus_ops_bus; |
| 885 | break; |
| 886 | #endif |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 887 | default: |
| 888 | bad: |
Li-Ta Lo | 69c5a90 | 2004-04-29 20:08:54 +0000 | [diff] [blame] | 889 | if (dev->enabled) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 890 | printk(BIOS_ERR, "%s [%04x/%04x/%06x] has unknown " |
| 891 | "header type %02x, ignoring.\n", dev_path(dev), |
| 892 | dev->vendor, dev->device, |
| 893 | dev->class >> 8, dev->hdr_type); |
Eric Biederman | 83b991a | 2003-10-11 06:20:25 +0000 | [diff] [blame] | 894 | } |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 895 | } |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 896 | } |
| 897 | |
| 898 | /** |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 899 | * See if we have already allocated a device structure for a given devfn. |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 900 | * |
| 901 | * Given a linked list of PCI device structures and a devfn number, find the |
Li-Ta Lo | 3a81285 | 2004-12-03 22:39:34 +0000 | [diff] [blame] | 902 | * device structure correspond to the devfn, if present. This function also |
| 903 | * removes the device structure from the linked list. |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 904 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 905 | * @param list The device structure list. |
| 906 | * @param devfn A device/function number. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 907 | * @return Pointer to the device structure found or NULL if we have not |
Li-Ta Lo | 3a81285 | 2004-12-03 22:39:34 +0000 | [diff] [blame] | 908 | * allocated a device for this devfn yet. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 909 | */ |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 910 | static struct device *pci_scan_get_dev(struct device **list, unsigned int devfn) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 911 | { |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 912 | struct device *dev; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 913 | |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 914 | dev = 0; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 915 | for (; *list; list = &(*list)->sibling) { |
Eric Biederman | ad1b35a | 2003-10-14 02:36:51 +0000 | [diff] [blame] | 916 | if ((*list)->path.type != DEVICE_PATH_PCI) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 917 | printk(BIOS_ERR, "child %s not a PCI device\n", |
| 918 | dev_path(*list)); |
Eric Biederman | ad1b35a | 2003-10-14 02:36:51 +0000 | [diff] [blame] | 919 | continue; |
| 920 | } |
Stefan Reinauer | 2b34db8 | 2009-02-28 20:10:20 +0000 | [diff] [blame] | 921 | if ((*list)->path.pci.devfn == devfn) { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 922 | /* Unlink from the list. */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 923 | dev = *list; |
| 924 | *list = (*list)->sibling; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 925 | dev->sibling = NULL; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 926 | break; |
| 927 | } |
| 928 | } |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 929 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 930 | /* |
| 931 | * Just like alloc_dev() add the device to the list of devices on the |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 932 | * bus. When the list of devices was formed we removed all of the |
| 933 | * parents children, and now we are interleaving static and dynamic |
| 934 | * devices in order on the bus. |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 935 | */ |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 936 | if (dev) { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 937 | struct device *child; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 938 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 939 | /* Find the last child of our parent. */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 940 | for (child = dev->bus->children; child && child->sibling;) |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 941 | child = child->sibling; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 942 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 943 | /* Place the device on the list of children of its parent. */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 944 | if (child) |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 945 | child->sibling = dev; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 946 | else |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 947 | dev->bus->children = dev; |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 948 | } |
| 949 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 950 | return dev; |
| 951 | } |
| 952 | |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 953 | /** |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 954 | * Scan a PCI bus. |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 955 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 956 | * Determine the existence of a given PCI device. Allocate a new struct device |
| 957 | * if dev==NULL was passed in and the device exists in hardware. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 958 | * |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 959 | * @param dev Pointer to the dev structure. |
| 960 | * @param bus Pointer to the bus structure. |
| 961 | * @param devfn A device/function number to look at. |
| 962 | * @return The device structure for the device (if found), NULL otherwise. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 963 | */ |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 964 | device_t pci_probe_dev(device_t dev, struct bus *bus, unsigned devfn) |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 965 | { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 966 | u32 id, class; |
| 967 | u8 hdr_type; |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 968 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 969 | /* Detect if a device is present. */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 970 | if (!dev) { |
| 971 | struct device dummy; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 972 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 973 | dummy.bus = bus; |
| 974 | dummy.path.type = DEVICE_PATH_PCI; |
Stefan Reinauer | 2b34db8 | 2009-02-28 20:10:20 +0000 | [diff] [blame] | 975 | dummy.path.pci.devfn = devfn; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 976 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 977 | id = pci_read_config32(&dummy, PCI_VENDOR_ID); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 978 | /* |
| 979 | * Have we found something? Some broken boards return 0 if a |
| 980 | * slot is empty, but the expected answer is 0xffffffff. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 981 | */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 982 | if (id == 0xffffffff) |
Stefan Reinauer | 7355c75 | 2010-04-02 16:30:25 +0000 | [diff] [blame] | 983 | return NULL; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 984 | |
Stefan Reinauer | 7355c75 | 2010-04-02 16:30:25 +0000 | [diff] [blame] | 985 | if ((id == 0x00000000) || (id == 0x0000ffff) || |
| 986 | (id == 0xffff0000)) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 987 | printk(BIOS_SPEW, "%s, bad id 0x%x\n", |
| 988 | dev_path(&dummy), id); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 989 | return NULL; |
| 990 | } |
| 991 | dev = alloc_dev(bus, &dummy.path); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 992 | } else { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 993 | /* |
| 994 | * Enable/disable the device. Once we have found the device- |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 995 | * specific operations this operations we will disable the |
| 996 | * device with those as well. |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 997 | * |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 998 | * This is geared toward devices that have subfunctions |
| 999 | * that do not show up by default. |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1000 | * |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1001 | * If a device is a stuff option on the motherboard |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1002 | * it may be absent and enable_dev() must cope. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1003 | */ |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1004 | /* Run the magic enable sequence for the device. */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1005 | if (dev->chip_ops && dev->chip_ops->enable_dev) |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1006 | dev->chip_ops->enable_dev(dev); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1007 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1008 | /* Now read the vendor and device ID. */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1009 | id = pci_read_config32(dev, PCI_VENDOR_ID); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1010 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1011 | /* |
| 1012 | * If the device does not have a PCI ID disable it. Possibly |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1013 | * this is because we have already disabled the device. But |
| 1014 | * this also handles optional devices that may not always |
| 1015 | * show up. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1016 | */ |
| 1017 | /* If the chain is fully enumerated quit */ |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1018 | if ((id == 0xffffffff) || (id == 0x00000000) || |
| 1019 | (id == 0x0000ffff) || (id == 0xffff0000)) { |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1020 | if (dev->enabled) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1021 | printk(BIOS_INFO, "PCI: Static device %s not " |
| 1022 | "found, disabling it.\n", dev_path(dev)); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1023 | dev->enabled = 0; |
| 1024 | } |
| 1025 | return dev; |
| 1026 | } |
| 1027 | } |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1028 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1029 | /* Read the rest of the PCI configuration information. */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1030 | hdr_type = pci_read_config8(dev, PCI_HEADER_TYPE); |
| 1031 | class = pci_read_config32(dev, PCI_CLASS_REVISION); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1032 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1033 | /* Store the interesting information in the device structure. */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1034 | dev->vendor = id & 0xffff; |
| 1035 | dev->device = (id >> 16) & 0xffff; |
| 1036 | dev->hdr_type = hdr_type; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1037 | |
| 1038 | /* Class code, the upper 3 bytes of PCI_CLASS_REVISION. */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1039 | dev->class = class >> 8; |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1040 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1041 | /* Architectural/System devices always need to be bus masters. */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1042 | if ((dev->class >> 16) == PCI_BASE_CLASS_SYSTEM) |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1043 | dev->command |= PCI_COMMAND_MASTER; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1044 | |
| 1045 | /* |
| 1046 | * Look at the vendor and device ID, or at least the header type and |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1047 | * class and figure out which set of configuration methods to use. |
| 1048 | * Unless we already have some PCI ops. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1049 | */ |
| 1050 | set_pci_ops(dev); |
| 1051 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1052 | /* Now run the magic enable/disable sequence for the device. */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1053 | if (dev->ops && dev->ops->enable) |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1054 | dev->ops->enable(dev); |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1055 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1056 | /* Display the device. */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1057 | printk(BIOS_DEBUG, "%s [%04x/%04x] %s%s\n", dev_path(dev), |
| 1058 | dev->vendor, dev->device, dev->enabled ? "enabled" : "disabled", |
| 1059 | dev->ops ? "" : " No operations"); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1060 | |
| 1061 | return dev; |
| 1062 | } |
| 1063 | |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1064 | /** |
Kyösti Mälkki | c73acdb | 2013-06-15 17:16:56 +0300 | [diff] [blame] | 1065 | * Test for match between romstage and ramstage device instance. |
| 1066 | * |
| 1067 | * @param dev Pointer to the device structure. |
| 1068 | * @param sdev Simple device model identifier, created with PCI_DEV(). |
| 1069 | * @return Non-zero if bus:dev.fn of device matches. |
| 1070 | */ |
| 1071 | unsigned int pci_match_simple_dev(device_t dev, pci_devfn_t sdev) |
| 1072 | { |
| 1073 | return dev->bus->secondary == PCI_DEV2SEGBUS(sdev) && |
| 1074 | dev->path.pci.devfn == PCI_DEV2DEVFN(sdev); |
| 1075 | } |
| 1076 | |
| 1077 | /** |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 1078 | * Scan a PCI bus. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1079 | * |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 1080 | * Determine the existence of devices and bridges on a PCI bus. If there are |
| 1081 | * bridges on the bus, recursively scan the buses behind the bridges. |
| 1082 | * |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 1083 | * @param bus Pointer to the bus structure. |
| 1084 | * @param min_devfn Minimum devfn to look at in the scan, usually 0x00. |
| 1085 | * @param max_devfn Maximum devfn to look at in the scan, usually 0xff. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1086 | */ |
Kyösti Mälkki | de271a8 | 2015-03-18 13:09:47 +0200 | [diff] [blame] | 1087 | void pci_scan_bus(struct bus *bus, unsigned min_devfn, |
| 1088 | unsigned max_devfn) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1089 | { |
| 1090 | unsigned int devfn; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1091 | struct device *old_devices; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1092 | |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 1093 | printk(BIOS_DEBUG, "PCI: pci_scan_bus for bus %02x\n", bus->secondary); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1094 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1095 | /* Maximum sane devfn is 0xFF. */ |
Juhana Helovuo | 50b78b6 | 2010-09-13 14:43:02 +0000 | [diff] [blame] | 1096 | if (max_devfn > 0xff) { |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1097 | printk(BIOS_ERR, "PCI: pci_scan_bus limits devfn %x - " |
| 1098 | "devfn %x\n", min_devfn, max_devfn); |
| 1099 | printk(BIOS_ERR, "PCI: pci_scan_bus upper limit too big. " |
| 1100 | "Using 0xff.\n"); |
Juhana Helovuo | 50b78b6 | 2010-09-13 14:43:02 +0000 | [diff] [blame] | 1101 | max_devfn=0xff; |
| 1102 | } |
| 1103 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1104 | old_devices = bus->children; |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1105 | bus->children = NULL; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1106 | |
| 1107 | post_code(0x24); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1108 | |
| 1109 | /* |
| 1110 | * Probe all devices/functions on this bus with some optimization for |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1111 | * non-existence and single function devices. |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 1112 | */ |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1113 | for (devfn = min_devfn; devfn <= max_devfn; devfn++) { |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1114 | struct device *dev; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1115 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1116 | /* First thing setup the device structure. */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1117 | dev = pci_scan_get_dev(&old_devices, devfn); |
Li-Ta Lo | 9782f75 | 2004-05-05 21:15:42 +0000 | [diff] [blame] | 1118 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1119 | /* See if a device is present and setup the device structure. */ |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1120 | dev = pci_probe_dev(dev, bus, devfn); |
Eric Biederman | 03acab6 | 2004-10-14 21:25:53 +0000 | [diff] [blame] | 1121 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1122 | /* |
| 1123 | * If this is not a multi function device, or the device is |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1124 | * not present don't waste time probing another function. |
Myles Watson | 032a965 | 2009-05-11 22:24:53 +0000 | [diff] [blame] | 1125 | * Skip to next device. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1126 | */ |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1127 | if ((PCI_FUNC(devfn) == 0x00) && (!dev |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1128 | || (dev->enabled && ((dev->hdr_type & 0x80) != 0x80)))) { |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1129 | devfn += 0x07; |
| 1130 | } |
| 1131 | } |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1132 | |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1133 | post_code(0x25); |
| 1134 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1135 | /* |
| 1136 | * Warn if any leftover static devices are are found. |
| 1137 | * There's probably a problem in devicetree.cb. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1138 | */ |
| 1139 | if (old_devices) { |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1140 | device_t left; |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 1141 | printk(BIOS_WARNING, "PCI: Left over static devices:\n"); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1142 | for (left = old_devices; left; left = left->sibling) |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 1143 | printk(BIOS_WARNING, "%s\n", dev_path(left)); |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1144 | |
| 1145 | printk(BIOS_WARNING, "PCI: Check your devicetree.cb.\n"); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1146 | } |
| 1147 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1148 | /* |
| 1149 | * For all children that implement scan_bus() (i.e. bridges) |
Eric Biederman | b78c197 | 2004-10-14 20:54:17 +0000 | [diff] [blame] | 1150 | * scan the bus behind that child. |
| 1151 | */ |
Kyösti Mälkki | de271a8 | 2015-03-18 13:09:47 +0200 | [diff] [blame] | 1152 | |
Kyösti Mälkki | 2d2367c | 2015-02-20 21:28:31 +0200 | [diff] [blame] | 1153 | scan_bridges(bus); |
Kyösti Mälkki | de271a8 | 2015-03-18 13:09:47 +0200 | [diff] [blame] | 1154 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1155 | /* |
| 1156 | * We've scanned the bus and so we know all about what's on the other |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1157 | * side of any bridges that may be on this bus plus any devices. |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1158 | * Return how far we've got finding sub-buses. |
| 1159 | */ |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1160 | post_code(0x55); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1161 | } |
| 1162 | |
Kyösti Mälkki | 3345240 | 2015-02-23 06:58:26 +0200 | [diff] [blame] | 1163 | typedef enum { |
| 1164 | PCI_ROUTE_CLOSE, |
| 1165 | PCI_ROUTE_SCAN, |
| 1166 | PCI_ROUTE_FINAL, |
| 1167 | } scan_state; |
| 1168 | |
| 1169 | static void pci_bridge_route(struct bus *link, scan_state state) |
| 1170 | { |
| 1171 | struct device *dev = link->dev; |
| 1172 | struct bus *parent = dev->bus; |
| 1173 | u32 reg, buses = 0; |
| 1174 | |
Kyösti Mälkki | 757c8b4 | 2015-02-23 06:58:26 +0200 | [diff] [blame] | 1175 | if (state == PCI_ROUTE_SCAN) { |
| 1176 | link->secondary = parent->subordinate + 1; |
| 1177 | link->subordinate = link->secondary; |
| 1178 | } |
| 1179 | |
Kyösti Mälkki | 3345240 | 2015-02-23 06:58:26 +0200 | [diff] [blame] | 1180 | if (state == PCI_ROUTE_CLOSE) { |
| 1181 | buses |= 0xfeff << 8; |
| 1182 | } else if (state == PCI_ROUTE_SCAN) { |
Timothy Pearson | 7d8a478 | 2015-10-24 20:34:57 -0500 | [diff] [blame] | 1183 | buses |= parent->secondary & 0xff; |
Kyösti Mälkki | 3345240 | 2015-02-23 06:58:26 +0200 | [diff] [blame] | 1184 | buses |= ((u32) link->secondary & 0xff) << 8; |
Kyösti Mälkki | 757c8b4 | 2015-02-23 06:58:26 +0200 | [diff] [blame] | 1185 | buses |= 0xff << 16; /* MAX PCI_BUS number here */ |
Kyösti Mälkki | 3345240 | 2015-02-23 06:58:26 +0200 | [diff] [blame] | 1186 | } else if (state == PCI_ROUTE_FINAL) { |
| 1187 | buses |= parent->secondary & 0xff; |
| 1188 | buses |= ((u32) link->secondary & 0xff) << 8; |
| 1189 | buses |= ((u32) link->subordinate & 0xff) << 16; |
| 1190 | } |
| 1191 | |
| 1192 | if (state == PCI_ROUTE_SCAN) { |
| 1193 | /* Clear all status bits and turn off memory, I/O and master enables. */ |
| 1194 | link->bridge_cmd = pci_read_config16(dev, PCI_COMMAND); |
| 1195 | pci_write_config16(dev, PCI_COMMAND, 0x0000); |
| 1196 | pci_write_config16(dev, PCI_STATUS, 0xffff); |
| 1197 | } |
| 1198 | |
| 1199 | /* |
| 1200 | * Configure the bus numbers for this bridge: the configuration |
| 1201 | * transactions will not be propagated by the bridge if it is not |
| 1202 | * correctly configured. |
| 1203 | */ |
| 1204 | |
| 1205 | reg = pci_read_config32(dev, PCI_PRIMARY_BUS); |
| 1206 | reg &= 0xff000000; |
| 1207 | reg |= buses; |
| 1208 | pci_write_config32(dev, PCI_PRIMARY_BUS, reg); |
| 1209 | |
| 1210 | if (state == PCI_ROUTE_FINAL) { |
| 1211 | pci_write_config16(dev, PCI_COMMAND, link->bridge_cmd); |
Kyösti Mälkki | 757c8b4 | 2015-02-23 06:58:26 +0200 | [diff] [blame] | 1212 | parent->subordinate = link->subordinate; |
Kyösti Mälkki | 3345240 | 2015-02-23 06:58:26 +0200 | [diff] [blame] | 1213 | } |
| 1214 | } |
| 1215 | |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 1216 | /** |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 1217 | * Scan a PCI bridge and the buses behind the bridge. |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 1218 | * |
| 1219 | * Determine the existence of buses behind the bridge. Set up the bridge |
| 1220 | * according to the result of the scan. |
| 1221 | * |
| 1222 | * This function is the default scan_bus() method for PCI bridge devices. |
| 1223 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1224 | * @param dev Pointer to the bridge device. |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 1225 | * @param do_scan_bus TODO |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1226 | */ |
Kyösti Mälkki | 580e722 | 2015-03-19 21:04:23 +0200 | [diff] [blame] | 1227 | void do_pci_scan_bridge(struct device *dev, |
Kyösti Mälkki | de271a8 | 2015-03-18 13:09:47 +0200 | [diff] [blame] | 1228 | void (*do_scan_bus) (struct bus * bus, |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1229 | unsigned min_devfn, |
Kyösti Mälkki | de271a8 | 2015-03-18 13:09:47 +0200 | [diff] [blame] | 1230 | unsigned max_devfn)) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1231 | { |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1232 | struct bus *bus; |
Eric Biederman | 83b991a | 2003-10-11 06:20:25 +0000 | [diff] [blame] | 1233 | |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 1234 | printk(BIOS_SPEW, "%s for %s\n", __func__, dev_path(dev)); |
Li-Ta Lo | 3a81285 | 2004-12-03 22:39:34 +0000 | [diff] [blame] | 1235 | |
Myles Watson | 894a347 | 2010-06-09 22:41:35 +0000 | [diff] [blame] | 1236 | if (dev->link_list == NULL) { |
| 1237 | struct bus *link; |
| 1238 | link = malloc(sizeof(*link)); |
| 1239 | if (link == NULL) |
| 1240 | die("Couldn't allocate a link!\n"); |
| 1241 | memset(link, 0, sizeof(*link)); |
| 1242 | link->dev = dev; |
| 1243 | dev->link_list = link; |
| 1244 | } |
| 1245 | |
| 1246 | bus = dev->link_list; |
Eric Biederman | e9a271e3 | 2003-09-02 03:36:25 +0000 | [diff] [blame] | 1247 | |
Kyösti Mälkki | 3345240 | 2015-02-23 06:58:26 +0200 | [diff] [blame] | 1248 | pci_bridge_route(bus, PCI_ROUTE_SCAN); |
Li-Ta Lo | 3a81285 | 2004-12-03 22:39:34 +0000 | [diff] [blame] | 1249 | |
Kyösti Mälkki | de271a8 | 2015-03-18 13:09:47 +0200 | [diff] [blame] | 1250 | do_scan_bus(bus, 0x00, 0xff); |
Kyösti Mälkki | 3345240 | 2015-02-23 06:58:26 +0200 | [diff] [blame] | 1251 | |
| 1252 | pci_bridge_route(bus, PCI_ROUTE_FINAL); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 1253 | } |
Li-Ta Lo | e526669 | 2004-03-23 21:28:05 +0000 | [diff] [blame] | 1254 | |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1255 | /** |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 1256 | * Scan a PCI bridge and the buses behind the bridge. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1257 | * |
| 1258 | * Determine the existence of buses behind the bridge. Set up the bridge |
| 1259 | * according to the result of the scan. |
| 1260 | * |
| 1261 | * This function is the default scan_bus() method for PCI bridge devices. |
| 1262 | * |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1263 | * @param dev Pointer to the bridge device. |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1264 | */ |
Kyösti Mälkki | 580e722 | 2015-03-19 21:04:23 +0200 | [diff] [blame] | 1265 | void pci_scan_bridge(struct device *dev) |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1266 | { |
Kyösti Mälkki | 580e722 | 2015-03-19 21:04:23 +0200 | [diff] [blame] | 1267 | do_pci_scan_bridge(dev, pci_scan_bus); |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1268 | } |
| 1269 | |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1270 | /** |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 1271 | * Scan a PCI domain. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1272 | * |
| 1273 | * This function is the default scan_bus() method for PCI domains. |
| 1274 | * |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 1275 | * @param dev Pointer to the domain. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1276 | */ |
Kyösti Mälkki | 580e722 | 2015-03-19 21:04:23 +0200 | [diff] [blame] | 1277 | void pci_domain_scan_bus(device_t dev) |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1278 | { |
Kyösti Mälkki | 6f37017 | 2015-03-19 15:26:52 +0200 | [diff] [blame] | 1279 | struct bus *link = dev->link_list; |
Kyösti Mälkki | de271a8 | 2015-03-18 13:09:47 +0200 | [diff] [blame] | 1280 | pci_scan_bus(link, PCI_DEVFN(0, 0), 0xff); |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1281 | } |
| 1282 | |
Mike Loptien | 0f5cf5e | 2014-05-12 21:46:31 -0600 | [diff] [blame] | 1283 | /** |
| 1284 | * Take an INT_PIN number (0, 1 - 4) and convert |
| 1285 | * it to a string ("NO PIN", "PIN A" - "PIN D") |
| 1286 | * |
| 1287 | * @param pin PCI Interrupt Pin number (0, 1 - 4) |
| 1288 | * @return A string corresponding to the pin number or "Invalid" |
| 1289 | */ |
| 1290 | const char *pin_to_str(int pin) |
| 1291 | { |
| 1292 | const char *str[5] = { |
| 1293 | "NO PIN", |
| 1294 | "PIN A", |
| 1295 | "PIN B", |
| 1296 | "PIN C", |
| 1297 | "PIN D", |
| 1298 | }; |
| 1299 | |
| 1300 | if (pin >= 0 && pin <= 4) |
| 1301 | return str[pin]; |
| 1302 | else |
| 1303 | return "Invalid PIN, not 0 - 4"; |
| 1304 | } |
| 1305 | |
| 1306 | /** |
| 1307 | * Get the PCI INT_PIN swizzle for a device defined as: |
| 1308 | * pin_parent = (pin_child + devn_child) % 4 + 1 |
| 1309 | * where PIN A = 1 ... PIN_D = 4 |
| 1310 | * |
| 1311 | * Given a PCI device structure 'dev', find the interrupt pin |
| 1312 | * that will be triggered on its parent bridge device when |
| 1313 | * generating an interrupt. For example: Device 1:3.2 may |
| 1314 | * use INT_PIN A but will trigger PIN D on its parent bridge |
| 1315 | * device. In this case, this function will return 4 (PIN D). |
| 1316 | * |
| 1317 | * @param dev A PCI device structure to swizzle interrupt pins for |
Martin Roth | 32bc6b6 | 2015-01-04 16:54:35 -0700 | [diff] [blame] | 1318 | * @param *parent_bridge The PCI device structure for the bridge |
Mike Loptien | 0f5cf5e | 2014-05-12 21:46:31 -0600 | [diff] [blame] | 1319 | * device 'dev' is attached to |
| 1320 | * @return The interrupt pin number (1 - 4) that 'dev' will |
| 1321 | * trigger when generating an interrupt |
| 1322 | */ |
| 1323 | static int swizzle_irq_pins(device_t dev, device_t *parent_bridge) |
| 1324 | { |
| 1325 | device_t parent; /* Our current device's parent device */ |
| 1326 | device_t child; /* The child device of the parent */ |
| 1327 | uint8_t parent_bus = 0; /* Parent Bus number */ |
| 1328 | uint16_t parent_devfn = 0; /* Parent Device and Function number */ |
| 1329 | uint16_t child_devfn = 0; /* Child Device and Function number */ |
| 1330 | uint8_t swizzled_pin = 0; /* Pin swizzled across a bridge */ |
| 1331 | |
| 1332 | /* Start with PIN A = 0 ... D = 3 */ |
| 1333 | swizzled_pin = pci_read_config8(dev, PCI_INTERRUPT_PIN) - 1; |
| 1334 | |
| 1335 | /* While our current device has parent devices */ |
| 1336 | child = dev; |
| 1337 | for (parent = child->bus->dev; parent; parent = parent->bus->dev) { |
| 1338 | parent_bus = parent->bus->secondary; |
| 1339 | parent_devfn = parent->path.pci.devfn; |
| 1340 | child_devfn = child->path.pci.devfn; |
| 1341 | |
| 1342 | /* Swizzle the INT_PIN for any bridges not on root bus */ |
| 1343 | swizzled_pin = (PCI_SLOT(child_devfn) + swizzled_pin) % 4; |
| 1344 | printk(BIOS_SPEW, "\tWith INT_PIN swizzled to %s\n" |
| 1345 | "\tAttached to bridge device %01X:%02Xh.%02Xh\n", |
| 1346 | pin_to_str(swizzled_pin + 1), parent_bus, |
| 1347 | PCI_SLOT(parent_devfn), PCI_FUNC(parent_devfn)); |
| 1348 | |
| 1349 | /* Continue until we find the root bus */ |
| 1350 | if (parent_bus > 0) { |
| 1351 | /* |
| 1352 | * We will go on to the next parent so this parent |
| 1353 | * becomes the child |
| 1354 | */ |
| 1355 | child = parent; |
| 1356 | continue; |
| 1357 | } else { |
| 1358 | /* |
| 1359 | * Found the root bridge device, |
| 1360 | * fill in the structure and exit |
| 1361 | */ |
| 1362 | *parent_bridge = parent; |
| 1363 | break; |
| 1364 | } |
| 1365 | } |
| 1366 | |
| 1367 | /* End with PIN A = 1 ... D = 4 */ |
| 1368 | return swizzled_pin + 1; |
| 1369 | } |
| 1370 | |
| 1371 | /** |
| 1372 | * Given a device structure 'dev', find its interrupt pin |
| 1373 | * and its parent bridge 'parent_bdg' device structure. |
| 1374 | * If it is behind a bridge, it will return the interrupt |
| 1375 | * pin number (1 - 4) of the parent bridge that the device |
| 1376 | * interrupt pin has been swizzled to, otherwise it will |
| 1377 | * return the interrupt pin that is programmed into the |
| 1378 | * PCI config space of the target device. If 'dev' is |
| 1379 | * behind a bridge, it will fill in 'parent_bdg' with the |
| 1380 | * device structure of the bridge it is behind, otherwise |
| 1381 | * it will copy 'dev' into 'parent_bdg'. |
| 1382 | * |
| 1383 | * @param dev A PCI device structure to get interrupt pins for. |
| 1384 | * @param *parent_bdg The PCI device structure for the bridge |
| 1385 | * device 'dev' is attached to. |
| 1386 | * @return The interrupt pin number (1 - 4) that 'dev' will |
| 1387 | * trigger when generating an interrupt. |
| 1388 | * Errors: -1 is returned if the device is not enabled |
| 1389 | * -2 is returned if a parent bridge could not be found. |
| 1390 | */ |
| 1391 | int get_pci_irq_pins(device_t dev, device_t *parent_bdg) |
| 1392 | { |
| 1393 | uint8_t bus = 0; /* The bus this device is on */ |
| 1394 | uint16_t devfn = 0; /* This device's device and function numbers */ |
| 1395 | uint8_t int_pin = 0; /* Interrupt pin used by the device */ |
| 1396 | uint8_t target_pin = 0; /* Interrupt pin we want to assign an IRQ to */ |
| 1397 | |
| 1398 | /* Make sure this device is enabled */ |
| 1399 | if (!(dev->enabled && (dev->path.type == DEVICE_PATH_PCI))) |
| 1400 | return -1; |
| 1401 | |
| 1402 | bus = dev->bus->secondary; |
| 1403 | devfn = dev->path.pci.devfn; |
| 1404 | |
| 1405 | /* Get and validate the interrupt pin used. Only 1-4 are allowed */ |
| 1406 | int_pin = pci_read_config8(dev, PCI_INTERRUPT_PIN); |
| 1407 | if (int_pin < 1 || int_pin > 4) |
| 1408 | return -1; |
| 1409 | |
| 1410 | printk(BIOS_SPEW, "PCI IRQ: Found device %01X:%02X.%02X using %s\n", |
| 1411 | bus, PCI_SLOT(devfn), PCI_FUNC(devfn), pin_to_str(int_pin)); |
| 1412 | |
| 1413 | /* If this device is on a bridge, swizzle its INT_PIN */ |
| 1414 | if (bus) { |
| 1415 | /* Swizzle its INT_PINs */ |
| 1416 | target_pin = swizzle_irq_pins(dev, parent_bdg); |
| 1417 | |
| 1418 | /* Make sure the swizzle returned valid structures */ |
| 1419 | if (parent_bdg == NULL) { |
| 1420 | printk(BIOS_WARNING, |
| 1421 | "Warning: Could not find parent bridge for this device!\n"); |
| 1422 | return -2; |
| 1423 | } |
| 1424 | } else { /* Device is not behind a bridge */ |
| 1425 | target_pin = int_pin; /* Return its own interrupt pin */ |
| 1426 | *parent_bdg = dev; /* Return its own structure */ |
| 1427 | } |
| 1428 | |
| 1429 | /* Target pin is the interrupt pin we want to assign an IRQ to */ |
| 1430 | return target_pin; |
| 1431 | } |
| 1432 | |
Patrick Georgi | e166782 | 2012-05-05 15:29:32 +0200 | [diff] [blame] | 1433 | #if CONFIG_PC80_SYSTEM |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1434 | /** |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 1435 | * Assign IRQ numbers. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1436 | * |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1437 | * This function assigns IRQs for all functions contained within the indicated |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1438 | * device address. If the device does not exist or does not require interrupts |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1439 | * then this function has no effect. |
Myles Watson | 29cc9ed | 2009-07-02 18:56:24 +0000 | [diff] [blame] | 1440 | * |
| 1441 | * This function should be called for each PCI slot in your system. |
| 1442 | * |
Uwe Hermann | c1ee429 | 2010-10-17 19:01:48 +0000 | [diff] [blame] | 1443 | * @param bus Pointer to the bus structure. |
| 1444 | * @param slot TODO |
| 1445 | * @param pIntAtoD An array of IRQ #s that are assigned to PINTA through PINTD |
| 1446 | * of this slot. The particular IRQ #s that are passed in depend on the |
| 1447 | * routing inside your southbridge and on your board. |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1448 | */ |
Yinghai Lu | 13f1c2a | 2005-07-08 02:49:49 +0000 | [diff] [blame] | 1449 | void pci_assign_irqs(unsigned bus, unsigned slot, |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1450 | const unsigned char pIntAtoD[4]) |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1451 | { |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1452 | unsigned int funct; |
| 1453 | device_t pdev; |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1454 | u8 line, irq; |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1455 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1456 | /* Each slot may contain up to eight functions. */ |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1457 | for (funct = 0; funct < 8; funct++) { |
| 1458 | pdev = dev_find_slot(bus, (slot << 3) + funct); |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1459 | |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1460 | if (!pdev) |
| 1461 | continue; |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1462 | |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1463 | line = pci_read_config8(pdev, PCI_INTERRUPT_PIN); |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1464 | |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1465 | /* PCI spec says all values except 1..4 are reserved. */ |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1466 | if ((line < 1) || (line > 4)) |
| 1467 | continue; |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1468 | |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1469 | irq = pIntAtoD[line - 1]; |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1470 | |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 1471 | printk(BIOS_DEBUG, "Assigning IRQ %d to %d:%x.%d\n", |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1472 | irq, bus, slot, funct); |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1473 | |
Stefan Reinauer | 14e2277 | 2010-04-27 06:56:47 +0000 | [diff] [blame] | 1474 | pci_write_config8(pdev, PCI_INTERRUPT_LINE, |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1475 | pIntAtoD[line - 1]); |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1476 | |
| 1477 | #ifdef PARANOID_IRQ_ASSIGNMENTS |
Myles Watson | 17aeeca | 2009-10-07 18:41:08 +0000 | [diff] [blame] | 1478 | irq = pci_read_config8(pdev, PCI_INTERRUPT_LINE); |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 1479 | printk(BIOS_DEBUG, " Readback = %d\n", irq); |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1480 | #endif |
| 1481 | |
Patrick Georgi | e166782 | 2012-05-05 15:29:32 +0200 | [diff] [blame] | 1482 | #if CONFIG_PC80_SYSTEM |
Uwe Hermann | e487047 | 2010-11-04 23:23:47 +0000 | [diff] [blame] | 1483 | /* Change to level triggered. */ |
| 1484 | i8259_configure_irq_trigger(pIntAtoD[line - 1], |
| 1485 | IRQ_LEVEL_TRIGGERED); |
Stefan Reinauer | 5fb6216 | 2010-12-16 23:52:04 +0000 | [diff] [blame] | 1486 | #endif |
Ronald G. Minnich | 6dd6c685 | 2003-10-02 00:08:42 +0000 | [diff] [blame] | 1487 | } |
| 1488 | } |
Stefan Reinauer | 4d933dd | 2009-07-21 21:36:41 +0000 | [diff] [blame] | 1489 | #endif |