blob: 93f36404f063db8bd07d47492b5d84505165ee5a [file] [log] [blame]
Bernhard M. Wiedemann6e554de2010-05-30 12:56:17 +00001chip northbridge/intel/i945
Vladimir Serbinenkodd2bc3f2014-10-31 09:16:31 +01002 # IGD Displays
Nico Huberb0b25c82020-03-21 20:35:12 +01003 register "gfx" = "GMA_STATIC_DISPLAYS(0)"
Vladimir Serbinenkodd2bc3f2014-10-31 09:16:31 +01004
Arthur Heymans31ba9352022-11-07 11:52:22 +01005 device cpu_cluster 0 on ops i945_cpu_bus_ops end # APIC cluster
Bernhard M. Wiedemann6e554de2010-05-30 12:56:17 +00006
Arthur Heymans885c2892016-10-03 17:16:48 +02007 register "pci_mmio_size" = "768"
8
Edward O'Callaghan61113de2014-05-18 10:33:31 +10009 device domain 0 on
Arthur Heymans22d6ee82022-11-07 10:03:40 +010010 ops i945_pci_domain_ops
Edward O'Callaghan61113de2014-05-18 10:33:31 +100011 device pci 00.0 on end # host bridge
Bernhard M. Wiedemann6e554de2010-05-30 12:56:17 +000012 device pci 01.0 off end # i945 PCIe root port
13 device pci 02.0 on end # vga controller
14 device pci 02.1 on end # display controller
15
Edward O'Callaghan61113de2014-05-18 10:33:31 +100016 chip southbridge/intel/i82801gx
Bernhard M. Wiedemann6e554de2010-05-30 12:56:17 +000017 register "pirqa_routing" = "0x05"
18 register "pirqb_routing" = "0x07"
19 register "pirqc_routing" = "0x05"
20 register "pirqd_routing" = "0x07"
21 register "pirqe_routing" = "0x80"
22 register "pirqf_routing" = "0x80"
23 register "pirqg_routing" = "0x80"
24 register "pirqh_routing" = "0x06"
25
26 # GPI routing
27 # 0 No effect (default)
28 # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
29 # 2 SCI (if corresponding GPIO_EN bit is also set)
30 register "gpi13_routing" = "1"
31
Elyes Haouasdc3beea2022-11-29 17:36:51 +010032 register "ide_enable_primary" = "true"
33 register "ide_enable_secondary" = "false"
Bernhard M. Wiedemann6e554de2010-05-30 12:56:17 +000034
Vladimir Serbinenkoab83ef02014-10-25 15:18:25 +020035 register "c3_latency" = "85"
Elyes Haouasc46242f2023-03-19 07:43:32 +010036 register "p_cnt_throttling_supported" = "false"
Vladimir Serbinenkoab83ef02014-10-25 15:18:25 +020037
Arthur Heymansfecf7772019-11-09 14:19:04 +010038 register "gen1_dec" = "0x00fc0291"
39 register "gen4_dec" = "0x00000301"
40
Edward O'Callaghan61113de2014-05-18 10:33:31 +100041 #device pci 1b.0 on end # High Definition Audio
42 device pci 1c.0 on end # PCIe
43 device pci 1c.1 on end # PCIe
44 device pci 1c.2 on end # PCIe
Arthur Heymansb9d25892018-06-15 22:02:28 +020045 device pci 1c.3 on end # PCIe port 4
46 device pci 1c.4 on end # PCIe port 5
47 device pci 1c.5 on end # PCIe port 6
Edward O'Callaghan61113de2014-05-18 10:33:31 +100048 device pci 1d.0 on end # USB UHCI
49 device pci 1d.1 on end # USB UHCI
50 device pci 1d.2 on end # USB UHCI
51 device pci 1d.3 on end # USB UHCI
52 device pci 1d.7 on end # USB2 EHCI
53 device pci 1e.0 on end # PCI bridge
Arthur Heymansb9d25892018-06-15 22:02:28 +020054 device pci 1e.2 on end # AC'97 Audio
55 device pci 1e.3 on end # AC'97 Modem
Edward O'Callaghan61113de2014-05-18 10:33:31 +100056 device pci 1f.0 on # LPC bridge
57 chip superio/winbond/w83627ehg
58 device pnp 4e.0 off end # Floppy
59 device pnp 4e.1 off end # Parport
60 device pnp 4e.2 on # COM1
61 io 0x60 = 0x3f8
62 irq 0x70 = 4
Bernhard M. Wiedemann6e554de2010-05-30 12:56:17 +000063 end
Edward O'Callaghan61113de2014-05-18 10:33:31 +100064 device pnp 4e.3 on # COM2
65 io 0x60 = 0x2f8
66 irq 0x70 = 3
Bernhard M. Wiedemann6e554de2010-05-30 12:56:17 +000067 irq 0xf1 = 4 # set IRMODE 0 # XXX not an irq
Edward O'Callaghan61113de2014-05-18 10:33:31 +100068 end
Uwe Hermann3a4ed152010-12-05 22:36:14 +000069 device pnp 4e.5 on # PS/2 keyboard & mouse
Edward O'Callaghan61113de2014-05-18 10:33:31 +100070 io 0x60 = 0x60
71 io 0x62 = 0x64
Bernhard M. Wiedemann6e554de2010-05-30 12:56:17 +000072 irq 0x70 = 1
73 irq 0x72 = 12
74 irq 0xf0 = 0x82 # HW accel A20.
75 end
Uwe Hermann3a4ed152010-12-05 22:36:14 +000076 device pnp 4e.106 off end # Serial flash interface (SFI)
77 device pnp 4e.007 off end # GPIO 1
78 device pnp 4e.107 off end # Game port
79 device pnp 4e.207 on # MIDI
80 io 0x62 = 0x330
Bernhard M. Wiedemann6e554de2010-05-30 12:56:17 +000081 irq 0x70 = 9
82 end
Uwe Hermann3a4ed152010-12-05 22:36:14 +000083 device pnp 4e.307 off end # GPIO 6
84 device pnp 4e.8 off end # WDTO#, PLED
85 device pnp 4e.009 on # GPIO 2
86 # All default
Bernhard M. Wiedemann6e554de2010-05-30 12:56:17 +000087 end
Uwe Hermann3a4ed152010-12-05 22:36:14 +000088 device pnp 4e.109 on # GPIO 3
Bernhard M. Wiedemann6e554de2010-05-30 12:56:17 +000089 irq 0xf0 = 0xfb # set inputs/outputs
90 irq 0xf1 = 0x66
91 end
Uwe Hermann3a4ed152010-12-05 22:36:14 +000092 device pnp 4e.209 on # GPIO 4
93 end
94 device pnp 4e.309 off # GPIO 5
95 end
Bernhard M. Wiedemann6e554de2010-05-30 12:56:17 +000096 device pnp 4e.a on # ACPI
Uwe Hermann3a4ed152010-12-05 22:36:14 +000097 # TODO: IRQ
Bernhard M. Wiedemann6e554de2010-05-30 12:56:17 +000098 end
99 device pnp 4e.b on # HWM
Uwe Hermann3a4ed152010-12-05 22:36:14 +0000100 io 0x60 = 0x290
Bernhard M. Wiedemann6e554de2010-05-30 12:56:17 +0000101 irq 0x70 = 0
102 end
Edward O'Callaghan61113de2014-05-18 10:33:31 +1000103 end # chip superio/winbond/w83627ehg
104 end # LPC bridge
Bernhard M. Wiedemann6e554de2010-05-30 12:56:17 +0000105 device pci 1f.1 on end # IDE
Edward O'Callaghan61113de2014-05-18 10:33:31 +1000106 device pci 1f.2 on end # SATA
107 device pci 1f.3 on end # SMBus
Edward O'Callaghan61113de2014-05-18 10:33:31 +1000108 end # chip southbridge/intel/i82801gx
109
110 end # device domain0
111end # chip northbridge/intel/i945