blob: 77ceaddc5225d9cb70b278253ad8801b9ee993fe [file] [log] [blame]
Bernhard M. Wiedemann6e554de2010-05-30 12:56:17 +00001chip northbridge/intel/i945
Vladimir Serbinenkodd2bc3f2014-10-31 09:16:31 +01002 # IGD Displays
3 register "gfx.ndid" = "3"
4 register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
5
Edward O'Callaghan61113de2014-05-18 10:33:31 +10006 device cpu_cluster 0 on
7 chip cpu/intel/socket_mFCPGA478
8 device lapic 0 on end
9 end
10 end
Bernhard M. Wiedemann6e554de2010-05-30 12:56:17 +000011
Edward O'Callaghan61113de2014-05-18 10:33:31 +100012 device domain 0 on
13 device pci 00.0 on end # host bridge
Bernhard M. Wiedemann6e554de2010-05-30 12:56:17 +000014 device pci 01.0 off end # i945 PCIe root port
15 device pci 02.0 on end # vga controller
16 device pci 02.1 on end # display controller
17
Edward O'Callaghan61113de2014-05-18 10:33:31 +100018 chip southbridge/intel/i82801gx
Bernhard M. Wiedemann6e554de2010-05-30 12:56:17 +000019 register "pirqa_routing" = "0x05"
20 register "pirqb_routing" = "0x07"
21 register "pirqc_routing" = "0x05"
22 register "pirqd_routing" = "0x07"
23 register "pirqe_routing" = "0x80"
24 register "pirqf_routing" = "0x80"
25 register "pirqg_routing" = "0x80"
26 register "pirqh_routing" = "0x06"
27
28 # GPI routing
29 # 0 No effect (default)
30 # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
31 # 2 SCI (if corresponding GPIO_EN bit is also set)
32 register "gpi13_routing" = "1"
33
Edward O'Callaghan61113de2014-05-18 10:33:31 +100034 register "ide_legacy_combined" = "0x0"
35 register "ide_enable_primary" = "0x1"
36 register "ide_enable_secondary" = "0x0"
37 register "sata_ahci" = "0x1"
Bernhard M. Wiedemann6e554de2010-05-30 12:56:17 +000038
Vladimir Serbinenkoab83ef02014-10-25 15:18:25 +020039 register "c3_latency" = "85"
40 register "p_cnt_throttling_supported" = "0"
41
Edward O'Callaghan61113de2014-05-18 10:33:31 +100042 #device pci 1b.0 on end # High Definition Audio
43 device pci 1c.0 on end # PCIe
44 device pci 1c.1 on end # PCIe
45 device pci 1c.2 on end # PCIe
Bernhard M. Wiedemann6e554de2010-05-30 12:56:17 +000046 #device pci 1c.3 off end # PCIe port 4
47 #device pci 1c.4 off end # PCIe port 5
48 #device pci 1c.5 off end # PCIe port 6
Edward O'Callaghan61113de2014-05-18 10:33:31 +100049 device pci 1d.0 on end # USB UHCI
50 device pci 1d.1 on end # USB UHCI
51 device pci 1d.2 on end # USB UHCI
52 device pci 1d.3 on end # USB UHCI
53 device pci 1d.7 on end # USB2 EHCI
54 device pci 1e.0 on end # PCI bridge
Bernhard M. Wiedemann6e554de2010-05-30 12:56:17 +000055 #device pci 1e.2 off end # AC'97 Audio
56 #device pci 1e.3 off end # AC'97 Modem
Edward O'Callaghan61113de2014-05-18 10:33:31 +100057 device pci 1f.0 on # LPC bridge
58 chip superio/winbond/w83627ehg
59 device pnp 4e.0 off end # Floppy
60 device pnp 4e.1 off end # Parport
61 device pnp 4e.2 on # COM1
62 io 0x60 = 0x3f8
63 irq 0x70 = 4
Bernhard M. Wiedemann6e554de2010-05-30 12:56:17 +000064 end
Edward O'Callaghan61113de2014-05-18 10:33:31 +100065 device pnp 4e.3 on # COM2
66 io 0x60 = 0x2f8
67 irq 0x70 = 3
Bernhard M. Wiedemann6e554de2010-05-30 12:56:17 +000068 irq 0xf1 = 4 # set IRMODE 0 # XXX not an irq
Edward O'Callaghan61113de2014-05-18 10:33:31 +100069 end
Uwe Hermann3a4ed152010-12-05 22:36:14 +000070 device pnp 4e.5 on # PS/2 keyboard & mouse
Edward O'Callaghan61113de2014-05-18 10:33:31 +100071 io 0x60 = 0x60
72 io 0x62 = 0x64
Bernhard M. Wiedemann6e554de2010-05-30 12:56:17 +000073 irq 0x70 = 1
74 irq 0x72 = 12
75 irq 0xf0 = 0x82 # HW accel A20.
76 end
Uwe Hermann3a4ed152010-12-05 22:36:14 +000077 device pnp 4e.106 off end # Serial flash interface (SFI)
78 device pnp 4e.007 off end # GPIO 1
79 device pnp 4e.107 off end # Game port
80 device pnp 4e.207 on # MIDI
81 io 0x62 = 0x330
Bernhard M. Wiedemann6e554de2010-05-30 12:56:17 +000082 irq 0x70 = 9
83 end
Uwe Hermann3a4ed152010-12-05 22:36:14 +000084 device pnp 4e.307 off end # GPIO 6
85 device pnp 4e.8 off end # WDTO#, PLED
86 device pnp 4e.009 on # GPIO 2
87 # All default
Bernhard M. Wiedemann6e554de2010-05-30 12:56:17 +000088 end
Uwe Hermann3a4ed152010-12-05 22:36:14 +000089 device pnp 4e.109 on # GPIO 3
Bernhard M. Wiedemann6e554de2010-05-30 12:56:17 +000090 irq 0xf0 = 0xfb # set inputs/outputs
91 irq 0xf1 = 0x66
92 end
Uwe Hermann3a4ed152010-12-05 22:36:14 +000093 device pnp 4e.209 on # GPIO 4
94 end
95 device pnp 4e.309 off # GPIO 5
96 end
Bernhard M. Wiedemann6e554de2010-05-30 12:56:17 +000097 device pnp 4e.a on # ACPI
Uwe Hermann3a4ed152010-12-05 22:36:14 +000098 # TODO: IRQ
Bernhard M. Wiedemann6e554de2010-05-30 12:56:17 +000099 end
100 device pnp 4e.b on # HWM
Uwe Hermann3a4ed152010-12-05 22:36:14 +0000101 io 0x60 = 0x290
Bernhard M. Wiedemann6e554de2010-05-30 12:56:17 +0000102 irq 0x70 = 0
103 end
Edward O'Callaghan61113de2014-05-18 10:33:31 +1000104 end # chip superio/winbond/w83627ehg
105 end # LPC bridge
Bernhard M. Wiedemann6e554de2010-05-30 12:56:17 +0000106 device pci 1f.1 on end # IDE
Edward O'Callaghan61113de2014-05-18 10:33:31 +1000107 device pci 1f.2 on end # SATA
108 device pci 1f.3 on end # SMBus
109 # device pci 1f.4 off end # Realtek ID Codec
110 end # chip southbridge/intel/i82801gx
111
112 end # device domain0
113end # chip northbridge/intel/i945