Bernhard M. Wiedemann | 6e554de | 2010-05-30 12:56:17 +0000 | [diff] [blame] | 1 | chip northbridge/intel/i945 |
Edward O'Callaghan | 61113de | 2014-05-18 10:33:31 +1000 | [diff] [blame] | 2 | device cpu_cluster 0 on |
| 3 | chip cpu/intel/socket_mFCPGA478 |
| 4 | device lapic 0 on end |
| 5 | end |
| 6 | end |
Bernhard M. Wiedemann | 6e554de | 2010-05-30 12:56:17 +0000 | [diff] [blame] | 7 | |
Edward O'Callaghan | 61113de | 2014-05-18 10:33:31 +1000 | [diff] [blame] | 8 | device domain 0 on |
| 9 | device pci 00.0 on end # host bridge |
Bernhard M. Wiedemann | 6e554de | 2010-05-30 12:56:17 +0000 | [diff] [blame] | 10 | device pci 01.0 off end # i945 PCIe root port |
| 11 | device pci 02.0 on end # vga controller |
| 12 | device pci 02.1 on end # display controller |
| 13 | |
Edward O'Callaghan | 61113de | 2014-05-18 10:33:31 +1000 | [diff] [blame] | 14 | chip southbridge/intel/i82801gx |
Bernhard M. Wiedemann | 6e554de | 2010-05-30 12:56:17 +0000 | [diff] [blame] | 15 | register "pirqa_routing" = "0x05" |
| 16 | register "pirqb_routing" = "0x07" |
| 17 | register "pirqc_routing" = "0x05" |
| 18 | register "pirqd_routing" = "0x07" |
| 19 | register "pirqe_routing" = "0x80" |
| 20 | register "pirqf_routing" = "0x80" |
| 21 | register "pirqg_routing" = "0x80" |
| 22 | register "pirqh_routing" = "0x06" |
| 23 | |
| 24 | # GPI routing |
| 25 | # 0 No effect (default) |
| 26 | # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set) |
| 27 | # 2 SCI (if corresponding GPIO_EN bit is also set) |
| 28 | register "gpi13_routing" = "1" |
| 29 | |
Edward O'Callaghan | 61113de | 2014-05-18 10:33:31 +1000 | [diff] [blame] | 30 | register "ide_legacy_combined" = "0x0" |
| 31 | register "ide_enable_primary" = "0x1" |
| 32 | register "ide_enable_secondary" = "0x0" |
| 33 | register "sata_ahci" = "0x1" |
Bernhard M. Wiedemann | 6e554de | 2010-05-30 12:56:17 +0000 | [diff] [blame] | 34 | |
Vladimir Serbinenko | ab83ef0 | 2014-10-25 15:18:25 +0200 | [diff] [blame^] | 35 | register "c3_latency" = "85" |
| 36 | register "p_cnt_throttling_supported" = "0" |
| 37 | |
Edward O'Callaghan | 61113de | 2014-05-18 10:33:31 +1000 | [diff] [blame] | 38 | #device pci 1b.0 on end # High Definition Audio |
| 39 | device pci 1c.0 on end # PCIe |
| 40 | device pci 1c.1 on end # PCIe |
| 41 | device pci 1c.2 on end # PCIe |
Bernhard M. Wiedemann | 6e554de | 2010-05-30 12:56:17 +0000 | [diff] [blame] | 42 | #device pci 1c.3 off end # PCIe port 4 |
| 43 | #device pci 1c.4 off end # PCIe port 5 |
| 44 | #device pci 1c.5 off end # PCIe port 6 |
Edward O'Callaghan | 61113de | 2014-05-18 10:33:31 +1000 | [diff] [blame] | 45 | device pci 1d.0 on end # USB UHCI |
| 46 | device pci 1d.1 on end # USB UHCI |
| 47 | device pci 1d.2 on end # USB UHCI |
| 48 | device pci 1d.3 on end # USB UHCI |
| 49 | device pci 1d.7 on end # USB2 EHCI |
| 50 | device pci 1e.0 on end # PCI bridge |
Bernhard M. Wiedemann | 6e554de | 2010-05-30 12:56:17 +0000 | [diff] [blame] | 51 | #device pci 1e.2 off end # AC'97 Audio |
| 52 | #device pci 1e.3 off end # AC'97 Modem |
Edward O'Callaghan | 61113de | 2014-05-18 10:33:31 +1000 | [diff] [blame] | 53 | device pci 1f.0 on # LPC bridge |
| 54 | chip superio/winbond/w83627ehg |
| 55 | device pnp 4e.0 off end # Floppy |
| 56 | device pnp 4e.1 off end # Parport |
| 57 | device pnp 4e.2 on # COM1 |
| 58 | io 0x60 = 0x3f8 |
| 59 | irq 0x70 = 4 |
Bernhard M. Wiedemann | 6e554de | 2010-05-30 12:56:17 +0000 | [diff] [blame] | 60 | end |
Edward O'Callaghan | 61113de | 2014-05-18 10:33:31 +1000 | [diff] [blame] | 61 | device pnp 4e.3 on # COM2 |
| 62 | io 0x60 = 0x2f8 |
| 63 | irq 0x70 = 3 |
Bernhard M. Wiedemann | 6e554de | 2010-05-30 12:56:17 +0000 | [diff] [blame] | 64 | irq 0xf1 = 4 # set IRMODE 0 # XXX not an irq |
Edward O'Callaghan | 61113de | 2014-05-18 10:33:31 +1000 | [diff] [blame] | 65 | end |
Uwe Hermann | 3a4ed15 | 2010-12-05 22:36:14 +0000 | [diff] [blame] | 66 | device pnp 4e.5 on # PS/2 keyboard & mouse |
Edward O'Callaghan | 61113de | 2014-05-18 10:33:31 +1000 | [diff] [blame] | 67 | io 0x60 = 0x60 |
| 68 | io 0x62 = 0x64 |
Bernhard M. Wiedemann | 6e554de | 2010-05-30 12:56:17 +0000 | [diff] [blame] | 69 | irq 0x70 = 1 |
| 70 | irq 0x72 = 12 |
| 71 | irq 0xf0 = 0x82 # HW accel A20. |
| 72 | end |
Uwe Hermann | 3a4ed15 | 2010-12-05 22:36:14 +0000 | [diff] [blame] | 73 | device pnp 4e.106 off end # Serial flash interface (SFI) |
| 74 | device pnp 4e.007 off end # GPIO 1 |
| 75 | device pnp 4e.107 off end # Game port |
| 76 | device pnp 4e.207 on # MIDI |
| 77 | io 0x62 = 0x330 |
Bernhard M. Wiedemann | 6e554de | 2010-05-30 12:56:17 +0000 | [diff] [blame] | 78 | irq 0x70 = 9 |
| 79 | end |
Uwe Hermann | 3a4ed15 | 2010-12-05 22:36:14 +0000 | [diff] [blame] | 80 | device pnp 4e.307 off end # GPIO 6 |
| 81 | device pnp 4e.8 off end # WDTO#, PLED |
| 82 | device pnp 4e.009 on # GPIO 2 |
| 83 | # All default |
Bernhard M. Wiedemann | 6e554de | 2010-05-30 12:56:17 +0000 | [diff] [blame] | 84 | end |
Uwe Hermann | 3a4ed15 | 2010-12-05 22:36:14 +0000 | [diff] [blame] | 85 | device pnp 4e.109 on # GPIO 3 |
Bernhard M. Wiedemann | 6e554de | 2010-05-30 12:56:17 +0000 | [diff] [blame] | 86 | irq 0xf0 = 0xfb # set inputs/outputs |
| 87 | irq 0xf1 = 0x66 |
| 88 | end |
Uwe Hermann | 3a4ed15 | 2010-12-05 22:36:14 +0000 | [diff] [blame] | 89 | device pnp 4e.209 on # GPIO 4 |
| 90 | end |
| 91 | device pnp 4e.309 off # GPIO 5 |
| 92 | end |
Bernhard M. Wiedemann | 6e554de | 2010-05-30 12:56:17 +0000 | [diff] [blame] | 93 | device pnp 4e.a on # ACPI |
Uwe Hermann | 3a4ed15 | 2010-12-05 22:36:14 +0000 | [diff] [blame] | 94 | # TODO: IRQ |
Bernhard M. Wiedemann | 6e554de | 2010-05-30 12:56:17 +0000 | [diff] [blame] | 95 | end |
| 96 | device pnp 4e.b on # HWM |
Uwe Hermann | 3a4ed15 | 2010-12-05 22:36:14 +0000 | [diff] [blame] | 97 | io 0x60 = 0x290 |
Bernhard M. Wiedemann | 6e554de | 2010-05-30 12:56:17 +0000 | [diff] [blame] | 98 | irq 0x70 = 0 |
| 99 | end |
Edward O'Callaghan | 61113de | 2014-05-18 10:33:31 +1000 | [diff] [blame] | 100 | end # chip superio/winbond/w83627ehg |
| 101 | end # LPC bridge |
Bernhard M. Wiedemann | 6e554de | 2010-05-30 12:56:17 +0000 | [diff] [blame] | 102 | device pci 1f.1 on end # IDE |
Edward O'Callaghan | 61113de | 2014-05-18 10:33:31 +1000 | [diff] [blame] | 103 | device pci 1f.2 on end # SATA |
| 104 | device pci 1f.3 on end # SMBus |
| 105 | # device pci 1f.4 off end # Realtek ID Codec |
| 106 | end # chip southbridge/intel/i82801gx |
| 107 | |
| 108 | end # device domain0 |
| 109 | end # chip northbridge/intel/i945 |