nb/intel/i945: Hook up PCI domain and CPU bus ops to devicetree
Change-Id: I4f30f5275d38c3eecf54d008b3edbf68071ab10d
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69294
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/mainboard/ibase/mb899/devicetree.cb b/src/mainboard/ibase/mb899/devicetree.cb
index 12104e4..1b59fcc 100644
--- a/src/mainboard/ibase/mb899/devicetree.cb
+++ b/src/mainboard/ibase/mb899/devicetree.cb
@@ -3,6 +3,7 @@
register "gfx" = "GMA_STATIC_DISPLAYS(0)"
device cpu_cluster 0 on
+ ops i945_cpu_bus_ops
chip cpu/intel/socket_m
device lapic 0 on end
end
@@ -11,6 +12,7 @@
register "pci_mmio_size" = "768"
device domain 0 on
+ ops i945_pci_domain_ops
device pci 00.0 on end # host bridge
device pci 01.0 off end # i945 PCIe root port
device pci 02.0 on end # vga controller