blob: 12104e4bb069b7288fb9b0219b581a2b2edea553 [file] [log] [blame]
Bernhard M. Wiedemann6e554de2010-05-30 12:56:17 +00001chip northbridge/intel/i945
Vladimir Serbinenkodd2bc3f2014-10-31 09:16:31 +01002 # IGD Displays
Nico Huberb0b25c82020-03-21 20:35:12 +01003 register "gfx" = "GMA_STATIC_DISPLAYS(0)"
Vladimir Serbinenkodd2bc3f2014-10-31 09:16:31 +01004
Edward O'Callaghan61113de2014-05-18 10:33:31 +10005 device cpu_cluster 0 on
Nico Huber4829af12019-02-27 14:23:18 +01006 chip cpu/intel/socket_m
Edward O'Callaghan61113de2014-05-18 10:33:31 +10007 device lapic 0 on end
8 end
9 end
Bernhard M. Wiedemann6e554de2010-05-30 12:56:17 +000010
Arthur Heymans885c2892016-10-03 17:16:48 +020011 register "pci_mmio_size" = "768"
12
Edward O'Callaghan61113de2014-05-18 10:33:31 +100013 device domain 0 on
14 device pci 00.0 on end # host bridge
Bernhard M. Wiedemann6e554de2010-05-30 12:56:17 +000015 device pci 01.0 off end # i945 PCIe root port
16 device pci 02.0 on end # vga controller
17 device pci 02.1 on end # display controller
18
Edward O'Callaghan61113de2014-05-18 10:33:31 +100019 chip southbridge/intel/i82801gx
Bernhard M. Wiedemann6e554de2010-05-30 12:56:17 +000020 register "pirqa_routing" = "0x05"
21 register "pirqb_routing" = "0x07"
22 register "pirqc_routing" = "0x05"
23 register "pirqd_routing" = "0x07"
24 register "pirqe_routing" = "0x80"
25 register "pirqf_routing" = "0x80"
26 register "pirqg_routing" = "0x80"
27 register "pirqh_routing" = "0x06"
28
29 # GPI routing
30 # 0 No effect (default)
31 # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
32 # 2 SCI (if corresponding GPIO_EN bit is also set)
33 register "gpi13_routing" = "1"
34
Edward O'Callaghan61113de2014-05-18 10:33:31 +100035 register "ide_enable_primary" = "0x1"
36 register "ide_enable_secondary" = "0x0"
Bernhard M. Wiedemann6e554de2010-05-30 12:56:17 +000037
Vladimir Serbinenkoab83ef02014-10-25 15:18:25 +020038 register "c3_latency" = "85"
39 register "p_cnt_throttling_supported" = "0"
40
Arthur Heymansfecf7772019-11-09 14:19:04 +010041 register "gen1_dec" = "0x00fc0291"
42 register "gen4_dec" = "0x00000301"
43
Edward O'Callaghan61113de2014-05-18 10:33:31 +100044 #device pci 1b.0 on end # High Definition Audio
45 device pci 1c.0 on end # PCIe
46 device pci 1c.1 on end # PCIe
47 device pci 1c.2 on end # PCIe
Arthur Heymansb9d25892018-06-15 22:02:28 +020048 device pci 1c.3 on end # PCIe port 4
49 device pci 1c.4 on end # PCIe port 5
50 device pci 1c.5 on end # PCIe port 6
Edward O'Callaghan61113de2014-05-18 10:33:31 +100051 device pci 1d.0 on end # USB UHCI
52 device pci 1d.1 on end # USB UHCI
53 device pci 1d.2 on end # USB UHCI
54 device pci 1d.3 on end # USB UHCI
55 device pci 1d.7 on end # USB2 EHCI
56 device pci 1e.0 on end # PCI bridge
Arthur Heymansb9d25892018-06-15 22:02:28 +020057 device pci 1e.2 on end # AC'97 Audio
58 device pci 1e.3 on end # AC'97 Modem
Edward O'Callaghan61113de2014-05-18 10:33:31 +100059 device pci 1f.0 on # LPC bridge
60 chip superio/winbond/w83627ehg
61 device pnp 4e.0 off end # Floppy
62 device pnp 4e.1 off end # Parport
63 device pnp 4e.2 on # COM1
64 io 0x60 = 0x3f8
65 irq 0x70 = 4
Bernhard M. Wiedemann6e554de2010-05-30 12:56:17 +000066 end
Edward O'Callaghan61113de2014-05-18 10:33:31 +100067 device pnp 4e.3 on # COM2
68 io 0x60 = 0x2f8
69 irq 0x70 = 3
Bernhard M. Wiedemann6e554de2010-05-30 12:56:17 +000070 irq 0xf1 = 4 # set IRMODE 0 # XXX not an irq
Edward O'Callaghan61113de2014-05-18 10:33:31 +100071 end
Uwe Hermann3a4ed152010-12-05 22:36:14 +000072 device pnp 4e.5 on # PS/2 keyboard & mouse
Edward O'Callaghan61113de2014-05-18 10:33:31 +100073 io 0x60 = 0x60
74 io 0x62 = 0x64
Bernhard M. Wiedemann6e554de2010-05-30 12:56:17 +000075 irq 0x70 = 1
76 irq 0x72 = 12
77 irq 0xf0 = 0x82 # HW accel A20.
78 end
Uwe Hermann3a4ed152010-12-05 22:36:14 +000079 device pnp 4e.106 off end # Serial flash interface (SFI)
80 device pnp 4e.007 off end # GPIO 1
81 device pnp 4e.107 off end # Game port
82 device pnp 4e.207 on # MIDI
83 io 0x62 = 0x330
Bernhard M. Wiedemann6e554de2010-05-30 12:56:17 +000084 irq 0x70 = 9
85 end
Uwe Hermann3a4ed152010-12-05 22:36:14 +000086 device pnp 4e.307 off end # GPIO 6
87 device pnp 4e.8 off end # WDTO#, PLED
88 device pnp 4e.009 on # GPIO 2
89 # All default
Bernhard M. Wiedemann6e554de2010-05-30 12:56:17 +000090 end
Uwe Hermann3a4ed152010-12-05 22:36:14 +000091 device pnp 4e.109 on # GPIO 3
Bernhard M. Wiedemann6e554de2010-05-30 12:56:17 +000092 irq 0xf0 = 0xfb # set inputs/outputs
93 irq 0xf1 = 0x66
94 end
Uwe Hermann3a4ed152010-12-05 22:36:14 +000095 device pnp 4e.209 on # GPIO 4
96 end
97 device pnp 4e.309 off # GPIO 5
98 end
Bernhard M. Wiedemann6e554de2010-05-30 12:56:17 +000099 device pnp 4e.a on # ACPI
Uwe Hermann3a4ed152010-12-05 22:36:14 +0000100 # TODO: IRQ
Bernhard M. Wiedemann6e554de2010-05-30 12:56:17 +0000101 end
102 device pnp 4e.b on # HWM
Uwe Hermann3a4ed152010-12-05 22:36:14 +0000103 io 0x60 = 0x290
Bernhard M. Wiedemann6e554de2010-05-30 12:56:17 +0000104 irq 0x70 = 0
105 end
Edward O'Callaghan61113de2014-05-18 10:33:31 +1000106 end # chip superio/winbond/w83627ehg
107 end # LPC bridge
Bernhard M. Wiedemann6e554de2010-05-30 12:56:17 +0000108 device pci 1f.1 on end # IDE
Edward O'Callaghan61113de2014-05-18 10:33:31 +1000109 device pci 1f.2 on end # SATA
110 device pci 1f.3 on end # SMBus
Edward O'Callaghan61113de2014-05-18 10:33:31 +1000111 end # chip southbridge/intel/i82801gx
112
113 end # device domain0
114end # chip northbridge/intel/i945