Bernhard M. Wiedemann | 6e554de | 2010-05-30 12:56:17 +0000 | [diff] [blame] | 1 | chip northbridge/intel/i945 |
Vladimir Serbinenko | dd2bc3f | 2014-10-31 09:16:31 +0100 | [diff] [blame] | 2 | # IGD Displays |
| 3 | register "gfx.ndid" = "3" |
| 4 | register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }" |
| 5 | |
Edward O'Callaghan | 61113de | 2014-05-18 10:33:31 +1000 | [diff] [blame] | 6 | device cpu_cluster 0 on |
| 7 | chip cpu/intel/socket_mFCPGA478 |
| 8 | device lapic 0 on end |
| 9 | end |
| 10 | end |
Bernhard M. Wiedemann | 6e554de | 2010-05-30 12:56:17 +0000 | [diff] [blame] | 11 | |
Arthur Heymans | 885c289 | 2016-10-03 17:16:48 +0200 | [diff] [blame] | 12 | register "pci_mmio_size" = "768" |
| 13 | |
Edward O'Callaghan | 61113de | 2014-05-18 10:33:31 +1000 | [diff] [blame] | 14 | device domain 0 on |
| 15 | device pci 00.0 on end # host bridge |
Bernhard M. Wiedemann | 6e554de | 2010-05-30 12:56:17 +0000 | [diff] [blame] | 16 | device pci 01.0 off end # i945 PCIe root port |
| 17 | device pci 02.0 on end # vga controller |
| 18 | device pci 02.1 on end # display controller |
| 19 | |
Edward O'Callaghan | 61113de | 2014-05-18 10:33:31 +1000 | [diff] [blame] | 20 | chip southbridge/intel/i82801gx |
Bernhard M. Wiedemann | 6e554de | 2010-05-30 12:56:17 +0000 | [diff] [blame] | 21 | register "pirqa_routing" = "0x05" |
| 22 | register "pirqb_routing" = "0x07" |
| 23 | register "pirqc_routing" = "0x05" |
| 24 | register "pirqd_routing" = "0x07" |
| 25 | register "pirqe_routing" = "0x80" |
| 26 | register "pirqf_routing" = "0x80" |
| 27 | register "pirqg_routing" = "0x80" |
| 28 | register "pirqh_routing" = "0x06" |
| 29 | |
| 30 | # GPI routing |
| 31 | # 0 No effect (default) |
| 32 | # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set) |
| 33 | # 2 SCI (if corresponding GPIO_EN bit is also set) |
| 34 | register "gpi13_routing" = "1" |
| 35 | |
Edward O'Callaghan | 61113de | 2014-05-18 10:33:31 +1000 | [diff] [blame] | 36 | register "ide_legacy_combined" = "0x0" |
| 37 | register "ide_enable_primary" = "0x1" |
| 38 | register "ide_enable_secondary" = "0x0" |
| 39 | register "sata_ahci" = "0x1" |
Bernhard M. Wiedemann | 6e554de | 2010-05-30 12:56:17 +0000 | [diff] [blame] | 40 | |
Vladimir Serbinenko | ab83ef0 | 2014-10-25 15:18:25 +0200 | [diff] [blame] | 41 | register "c3_latency" = "85" |
| 42 | register "p_cnt_throttling_supported" = "0" |
| 43 | |
Edward O'Callaghan | 61113de | 2014-05-18 10:33:31 +1000 | [diff] [blame] | 44 | #device pci 1b.0 on end # High Definition Audio |
| 45 | device pci 1c.0 on end # PCIe |
| 46 | device pci 1c.1 on end # PCIe |
| 47 | device pci 1c.2 on end # PCIe |
Arthur Heymans | b9d2589 | 2018-06-15 22:02:28 +0200 | [diff] [blame^] | 48 | device pci 1c.3 on end # PCIe port 4 |
| 49 | device pci 1c.4 on end # PCIe port 5 |
| 50 | device pci 1c.5 on end # PCIe port 6 |
Edward O'Callaghan | 61113de | 2014-05-18 10:33:31 +1000 | [diff] [blame] | 51 | device pci 1d.0 on end # USB UHCI |
| 52 | device pci 1d.1 on end # USB UHCI |
| 53 | device pci 1d.2 on end # USB UHCI |
| 54 | device pci 1d.3 on end # USB UHCI |
| 55 | device pci 1d.7 on end # USB2 EHCI |
| 56 | device pci 1e.0 on end # PCI bridge |
Arthur Heymans | b9d2589 | 2018-06-15 22:02:28 +0200 | [diff] [blame^] | 57 | device pci 1e.2 on end # AC'97 Audio |
| 58 | device pci 1e.3 on end # AC'97 Modem |
Edward O'Callaghan | 61113de | 2014-05-18 10:33:31 +1000 | [diff] [blame] | 59 | device pci 1f.0 on # LPC bridge |
| 60 | chip superio/winbond/w83627ehg |
| 61 | device pnp 4e.0 off end # Floppy |
| 62 | device pnp 4e.1 off end # Parport |
| 63 | device pnp 4e.2 on # COM1 |
| 64 | io 0x60 = 0x3f8 |
| 65 | irq 0x70 = 4 |
Bernhard M. Wiedemann | 6e554de | 2010-05-30 12:56:17 +0000 | [diff] [blame] | 66 | end |
Edward O'Callaghan | 61113de | 2014-05-18 10:33:31 +1000 | [diff] [blame] | 67 | device pnp 4e.3 on # COM2 |
| 68 | io 0x60 = 0x2f8 |
| 69 | irq 0x70 = 3 |
Bernhard M. Wiedemann | 6e554de | 2010-05-30 12:56:17 +0000 | [diff] [blame] | 70 | irq 0xf1 = 4 # set IRMODE 0 # XXX not an irq |
Edward O'Callaghan | 61113de | 2014-05-18 10:33:31 +1000 | [diff] [blame] | 71 | end |
Uwe Hermann | 3a4ed15 | 2010-12-05 22:36:14 +0000 | [diff] [blame] | 72 | device pnp 4e.5 on # PS/2 keyboard & mouse |
Edward O'Callaghan | 61113de | 2014-05-18 10:33:31 +1000 | [diff] [blame] | 73 | io 0x60 = 0x60 |
| 74 | io 0x62 = 0x64 |
Bernhard M. Wiedemann | 6e554de | 2010-05-30 12:56:17 +0000 | [diff] [blame] | 75 | irq 0x70 = 1 |
| 76 | irq 0x72 = 12 |
| 77 | irq 0xf0 = 0x82 # HW accel A20. |
| 78 | end |
Uwe Hermann | 3a4ed15 | 2010-12-05 22:36:14 +0000 | [diff] [blame] | 79 | device pnp 4e.106 off end # Serial flash interface (SFI) |
| 80 | device pnp 4e.007 off end # GPIO 1 |
| 81 | device pnp 4e.107 off end # Game port |
| 82 | device pnp 4e.207 on # MIDI |
| 83 | io 0x62 = 0x330 |
Bernhard M. Wiedemann | 6e554de | 2010-05-30 12:56:17 +0000 | [diff] [blame] | 84 | irq 0x70 = 9 |
| 85 | end |
Uwe Hermann | 3a4ed15 | 2010-12-05 22:36:14 +0000 | [diff] [blame] | 86 | device pnp 4e.307 off end # GPIO 6 |
| 87 | device pnp 4e.8 off end # WDTO#, PLED |
| 88 | device pnp 4e.009 on # GPIO 2 |
| 89 | # All default |
Bernhard M. Wiedemann | 6e554de | 2010-05-30 12:56:17 +0000 | [diff] [blame] | 90 | end |
Uwe Hermann | 3a4ed15 | 2010-12-05 22:36:14 +0000 | [diff] [blame] | 91 | device pnp 4e.109 on # GPIO 3 |
Bernhard M. Wiedemann | 6e554de | 2010-05-30 12:56:17 +0000 | [diff] [blame] | 92 | irq 0xf0 = 0xfb # set inputs/outputs |
| 93 | irq 0xf1 = 0x66 |
| 94 | end |
Uwe Hermann | 3a4ed15 | 2010-12-05 22:36:14 +0000 | [diff] [blame] | 95 | device pnp 4e.209 on # GPIO 4 |
| 96 | end |
| 97 | device pnp 4e.309 off # GPIO 5 |
| 98 | end |
Bernhard M. Wiedemann | 6e554de | 2010-05-30 12:56:17 +0000 | [diff] [blame] | 99 | device pnp 4e.a on # ACPI |
Uwe Hermann | 3a4ed15 | 2010-12-05 22:36:14 +0000 | [diff] [blame] | 100 | # TODO: IRQ |
Bernhard M. Wiedemann | 6e554de | 2010-05-30 12:56:17 +0000 | [diff] [blame] | 101 | end |
| 102 | device pnp 4e.b on # HWM |
Uwe Hermann | 3a4ed15 | 2010-12-05 22:36:14 +0000 | [diff] [blame] | 103 | io 0x60 = 0x290 |
Bernhard M. Wiedemann | 6e554de | 2010-05-30 12:56:17 +0000 | [diff] [blame] | 104 | irq 0x70 = 0 |
| 105 | end |
Edward O'Callaghan | 61113de | 2014-05-18 10:33:31 +1000 | [diff] [blame] | 106 | end # chip superio/winbond/w83627ehg |
| 107 | end # LPC bridge |
Bernhard M. Wiedemann | 6e554de | 2010-05-30 12:56:17 +0000 | [diff] [blame] | 108 | device pci 1f.1 on end # IDE |
Edward O'Callaghan | 61113de | 2014-05-18 10:33:31 +1000 | [diff] [blame] | 109 | device pci 1f.2 on end # SATA |
| 110 | device pci 1f.3 on end # SMBus |
Edward O'Callaghan | 61113de | 2014-05-18 10:33:31 +1000 | [diff] [blame] | 111 | end # chip southbridge/intel/i82801gx |
| 112 | |
| 113 | end # device domain0 |
| 114 | end # chip northbridge/intel/i945 |