Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | |
| 3 | #include "psp_verstage.h" |
| 4 | |
Felix Held | 26935d1 | 2020-12-08 00:40:04 +0100 | [diff] [blame] | 5 | #include <amdblocks/acpimmio.h> |
Karthikeyan Ramasubramanian | 0822ce8 | 2022-12-05 14:54:53 -0700 | [diff] [blame] | 6 | #include <bl_uapp/bl_errorcodes_public.h> |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 7 | #include <bl_uapp/bl_syscall_public.h> |
| 8 | #include <boot_device.h> |
Martin Roth | e21698b | 2020-06-26 08:55:15 -0600 | [diff] [blame] | 9 | #include <cbfs.h> |
Karthikeyan Ramasubramanian | c2f6f35 | 2021-09-10 12:03:30 -0600 | [diff] [blame] | 10 | #include <commonlib/region.h> |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 11 | #include <console/console.h> |
Martin Roth | e21698b | 2020-06-26 08:55:15 -0600 | [diff] [blame] | 12 | #include <fmap.h> |
Karthikeyan Ramasubramanian | 6f1b03b | 2023-04-21 14:26:51 -0600 | [diff] [blame] | 13 | #include <fmap_config.h> |
Martin Roth | 50cca76 | 2020-08-13 11:06:18 -0600 | [diff] [blame] | 14 | #include <pc80/mc146818rtc.h> |
Martin Roth | 8fc6881 | 2023-08-18 16:28:29 -0600 | [diff] [blame] | 15 | #include <psp_verstage/psp_transfer.h> |
Kangheui Won | fab6e44 | 2021-10-18 15:35:28 +1100 | [diff] [blame] | 16 | #include <soc/iomap.h> |
Rob Barnes | b35acf9 | 2021-11-02 17:47:47 -0600 | [diff] [blame] | 17 | #include <security/tpm/tspi.h> |
| 18 | #include <security/tpm/tss.h> |
Martin Roth | 50cca76 | 2020-08-13 11:06:18 -0600 | [diff] [blame] | 19 | #include <security/vboot/vbnv.h> |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 20 | #include <security/vboot/misc.h> |
| 21 | #include <security/vboot/symbols.h> |
| 22 | #include <security/vboot/vboot_common.h> |
| 23 | #include <arch/stages.h> |
| 24 | #include <stdarg.h> |
Kangheui Won | 4e2f5fd | 2020-09-17 16:37:13 +1000 | [diff] [blame] | 25 | #include <timestamp.h> |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 26 | |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 27 | extern char _bss_start, _bss_end; |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 28 | |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 29 | void __weak verstage_mainboard_init(void) {} |
Rob Barnes | 188be6b | 2021-11-09 13:21:28 -0700 | [diff] [blame] | 30 | |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 31 | static void reboot_into_recovery(struct vb2_context *ctx, uint32_t subcode) |
| 32 | { |
| 33 | subcode += PSP_VBOOT_ERROR_SUBCODE; |
| 34 | svc_write_postcode(subcode); |
| 35 | |
Martin Roth | c9689e0 | 2020-08-20 17:25:37 -0600 | [diff] [blame] | 36 | /* |
| 37 | * If there's an error but the PSP_verstage is already booting to RO, |
| 38 | * don't reset the system. It may be that the error is fatal, but if |
| 39 | * the system is stuck, don't intentionally force it into a reboot loop. |
| 40 | */ |
| 41 | if (ctx->flags & VB2_CONTEXT_RECOVERY_MODE) { |
| 42 | printk(BIOS_ERR, "Already in recovery mode. Staying in RO.\n"); |
| 43 | return; |
| 44 | } |
| 45 | |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 46 | svc_debug_print("Rebooting into recovery\n"); |
Jakub Czapiga | 605f793 | 2022-11-04 12:18:04 +0000 | [diff] [blame] | 47 | vboot_fail_and_reboot(ctx, VB2_RECOVERY_RO_UNSPECIFIED, (int)subcode); |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 48 | } |
| 49 | |
Martin Roth | 50cca76 | 2020-08-13 11:06:18 -0600 | [diff] [blame] | 50 | static uint32_t check_cmos_recovery(void) |
| 51 | { |
| 52 | /* Only reset if cmos is valid */ |
| 53 | if (vbnv_cmos_failed()) |
| 54 | return 0; |
| 55 | |
| 56 | /* If the byte is set, clear it, then return error to reboot */ |
| 57 | if (cmos_read(CMOS_RECOVERY_BYTE) == CMOS_RECOVERY_MAGIC_VAL) { |
| 58 | cmos_write(0x00, CMOS_RECOVERY_BYTE); |
| 59 | printk(BIOS_DEBUG, "Reboot into recovery requested by coreboot\n"); |
| 60 | return POSTCODE_CMOS_RECOVERY; |
| 61 | } |
| 62 | |
| 63 | return 0; |
| 64 | } |
| 65 | |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 66 | /* |
| 67 | * Tell the PSP where to load the rest of the firmware from |
| 68 | */ |
| 69 | static uint32_t update_boot_region(struct vb2_context *ctx) |
| 70 | { |
Kangheui Won | 26bb4aa | 2021-10-18 15:31:45 +1100 | [diff] [blame] | 71 | struct embedded_firmware *ef_table; |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 72 | uint32_t psp_dir_addr, bios_dir_addr; |
| 73 | uint32_t *psp_dir_in_spi, *bios_dir_in_spi; |
Kangheui Won | ac7ec27 | 2021-01-15 15:04:25 +1100 | [diff] [blame] | 74 | const char *fname; |
| 75 | void *amdfw_location; |
Karthikeyan Ramasubramanian | 1da0340 | 2023-05-25 15:49:29 -0600 | [diff] [blame] | 76 | struct region fw_slot; |
Karthikeyan Ramasubramanian | 6f1b03b | 2023-04-21 14:26:51 -0600 | [diff] [blame] | 77 | void *map_base = NULL; |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 78 | |
| 79 | /* Continue booting from RO */ |
| 80 | if (ctx->flags & VB2_CONTEXT_RECOVERY_MODE) { |
| 81 | printk(BIOS_ERR, "In recovery mode. Staying in RO.\n"); |
| 82 | return 0; |
| 83 | } |
| 84 | |
| 85 | if (vboot_is_firmware_slot_a(ctx)) { |
Martin Roth | e21698b | 2020-06-26 08:55:15 -0600 | [diff] [blame] | 86 | fname = "apu/amdfw_a"; |
Nico Huber | f55b711 | 2024-01-11 18:50:50 +0100 | [diff] [blame] | 87 | if (!fmap_locate_area("FW_MAIN_A", &fw_slot)) { |
| 88 | map_base = rdev_mmap(boot_device_ro(), |
| 89 | region_offset(&fw_slot), region_sz(&fw_slot)); |
| 90 | } |
Karthikeyan Ramasubramanian | 1da0340 | 2023-05-25 15:49:29 -0600 | [diff] [blame] | 91 | |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 92 | } else { |
Martin Roth | e21698b | 2020-06-26 08:55:15 -0600 | [diff] [blame] | 93 | fname = "apu/amdfw_b"; |
Nico Huber | f55b711 | 2024-01-11 18:50:50 +0100 | [diff] [blame] | 94 | if (!fmap_locate_area("FW_MAIN_B", &fw_slot)) { |
| 95 | map_base = rdev_mmap(boot_device_ro(), |
| 96 | region_offset(&fw_slot), region_sz(&fw_slot)); |
| 97 | } |
Karthikeyan Ramasubramanian | 6f1b03b | 2023-04-21 14:26:51 -0600 | [diff] [blame] | 98 | } |
| 99 | |
| 100 | if (!map_base) { |
| 101 | printk(BIOS_ERR, "Failed to map RW FW_MAIN section.\n"); |
| 102 | return POSTCODE_MAP_SPI_ROM_FAILED; |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 103 | } |
| 104 | |
Kangheui Won | ac7ec27 | 2021-01-15 15:04:25 +1100 | [diff] [blame] | 105 | amdfw_location = cbfs_map(fname, NULL); |
Martin Roth | e21698b | 2020-06-26 08:55:15 -0600 | [diff] [blame] | 106 | if (!amdfw_location) { |
Julius Werner | e966595 | 2022-01-21 17:06:20 -0800 | [diff] [blame] | 107 | printk(BIOS_ERR, "AMD Firmware table not found.\n"); |
Karthikeyan Ramasubramanian | 6f1b03b | 2023-04-21 14:26:51 -0600 | [diff] [blame] | 108 | rdev_munmap(boot_device_ro(), map_base); |
Martin Roth | e21698b | 2020-06-26 08:55:15 -0600 | [diff] [blame] | 109 | return POSTCODE_AMD_FW_MISSING; |
| 110 | } |
Karthikeyan Ramasubramanian | 6f1b03b | 2023-04-21 14:26:51 -0600 | [diff] [blame] | 111 | |
Kangheui Won | 26bb4aa | 2021-10-18 15:31:45 +1100 | [diff] [blame] | 112 | ef_table = (struct embedded_firmware *)amdfw_location; |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 113 | if (ef_table->signature != EMBEDDED_FW_SIGNATURE) { |
Julius Werner | e966595 | 2022-01-21 17:06:20 -0800 | [diff] [blame] | 114 | printk(BIOS_ERR, "ROMSIG address is not correct.\n"); |
Karthikeyan Ramasubramanian | 6f1b03b | 2023-04-21 14:26:51 -0600 | [diff] [blame] | 115 | cbfs_unmap(amdfw_location); |
Karthikeyan Ramasubramanian | 01c9dfb | 2023-05-25 15:54:33 -0600 | [diff] [blame] | 116 | rdev_munmap(boot_device_ro(), amdfw_location); |
Karthikeyan Ramasubramanian | 6f1b03b | 2023-04-21 14:26:51 -0600 | [diff] [blame] | 117 | rdev_munmap(boot_device_ro(), map_base); |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 118 | return POSTCODE_ROMSIG_MISMATCH_ERROR; |
| 119 | } |
| 120 | |
Felix Held | 4bdea41 | 2023-02-17 00:31:43 +0100 | [diff] [blame] | 121 | psp_dir_addr = ef_table->new_psp_directory; |
Kangheui Won | 5858fb4 | 2021-05-06 13:30:51 +1000 | [diff] [blame] | 122 | bios_dir_addr = get_bios_dir_addr(ef_table); |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 123 | psp_dir_in_spi = (uint32_t *)((psp_dir_addr & SPI_ADDR_MASK) + |
Nico Huber | f55b711 | 2024-01-11 18:50:50 +0100 | [diff] [blame] | 124 | (uint32_t)map_base - region_offset(&fw_slot)); |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 125 | if (*psp_dir_in_spi != PSP_COOKIE) { |
Julius Werner | e966595 | 2022-01-21 17:06:20 -0800 | [diff] [blame] | 126 | printk(BIOS_ERR, "PSP Directory address is not correct.\n"); |
Karthikeyan Ramasubramanian | 6f1b03b | 2023-04-21 14:26:51 -0600 | [diff] [blame] | 127 | cbfs_unmap(amdfw_location); |
Karthikeyan Ramasubramanian | 01c9dfb | 2023-05-25 15:54:33 -0600 | [diff] [blame] | 128 | rdev_munmap(boot_device_ro(), amdfw_location); |
Karthikeyan Ramasubramanian | 6f1b03b | 2023-04-21 14:26:51 -0600 | [diff] [blame] | 129 | rdev_munmap(boot_device_ro(), map_base); |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 130 | return POSTCODE_PSP_COOKIE_MISMATCH_ERROR; |
| 131 | } |
Karthikeyan Ramasubramanian | e3eedf7 | 2022-07-14 15:37:07 -0600 | [diff] [blame] | 132 | |
| 133 | if (bios_dir_addr) { |
| 134 | bios_dir_in_spi = (uint32_t *)((bios_dir_addr & SPI_ADDR_MASK) + |
Nico Huber | f55b711 | 2024-01-11 18:50:50 +0100 | [diff] [blame] | 135 | (uint32_t)map_base - region_offset(&fw_slot)); |
Karthikeyan Ramasubramanian | e3eedf7 | 2022-07-14 15:37:07 -0600 | [diff] [blame] | 136 | if (*bios_dir_in_spi != BHD_COOKIE) { |
| 137 | printk(BIOS_ERR, "BIOS Directory address is not correct.\n"); |
Karthikeyan Ramasubramanian | 6f1b03b | 2023-04-21 14:26:51 -0600 | [diff] [blame] | 138 | cbfs_unmap(amdfw_location); |
Karthikeyan Ramasubramanian | 01c9dfb | 2023-05-25 15:54:33 -0600 | [diff] [blame] | 139 | rdev_munmap(boot_device_ro(), amdfw_location); |
Karthikeyan Ramasubramanian | 6f1b03b | 2023-04-21 14:26:51 -0600 | [diff] [blame] | 140 | rdev_munmap(boot_device_ro(), map_base); |
Karthikeyan Ramasubramanian | e3eedf7 | 2022-07-14 15:37:07 -0600 | [diff] [blame] | 141 | return POSTCODE_BHD_COOKIE_MISMATCH_ERROR; |
| 142 | } |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 143 | } |
| 144 | |
Kangheui Won | fab6e44 | 2021-10-18 15:35:28 +1100 | [diff] [blame] | 145 | /* EFS2 uses relative address and PSP isn't happy with that */ |
Karthikeyan Ramasubramanian | e3eedf7 | 2022-07-14 15:37:07 -0600 | [diff] [blame] | 146 | if (ef_table->efs_gen.gen == EFS_SECOND_GEN && |
| 147 | !CONFIG(PSP_SUPPORTS_EFS2_RELATIVE_ADDR)) { |
Kangheui Won | fab6e44 | 2021-10-18 15:35:28 +1100 | [diff] [blame] | 148 | psp_dir_addr = FLASH_BASE_ADDR + (psp_dir_addr & SPI_ADDR_MASK); |
| 149 | bios_dir_addr = FLASH_BASE_ADDR + (bios_dir_addr & SPI_ADDR_MASK); |
| 150 | } |
| 151 | |
Kangheui Won | 26bb4aa | 2021-10-18 15:31:45 +1100 | [diff] [blame] | 152 | if (update_psp_bios_dir(&psp_dir_addr, &bios_dir_addr)) { |
Julius Werner | e966595 | 2022-01-21 17:06:20 -0800 | [diff] [blame] | 153 | printk(BIOS_ERR, "Updated BIOS Directory could not be set.\n"); |
Karthikeyan Ramasubramanian | 6f1b03b | 2023-04-21 14:26:51 -0600 | [diff] [blame] | 154 | cbfs_unmap(amdfw_location); |
Karthikeyan Ramasubramanian | 01c9dfb | 2023-05-25 15:54:33 -0600 | [diff] [blame] | 155 | rdev_munmap(boot_device_ro(), amdfw_location); |
Karthikeyan Ramasubramanian | 6f1b03b | 2023-04-21 14:26:51 -0600 | [diff] [blame] | 156 | rdev_munmap(boot_device_ro(), map_base); |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 157 | return POSTCODE_UPDATE_PSP_BIOS_DIR_ERROR; |
| 158 | } |
| 159 | |
Kangheui Won | 5fb435a | 2021-12-22 12:24:17 +1100 | [diff] [blame] | 160 | if (CONFIG(SEPARATE_SIGNED_PSPFW)) |
Karthikeyan Ramasubramanian | 97e57cf | 2023-07-17 12:43:14 -0600 | [diff] [blame] | 161 | update_psp_fw_hash_tables(); |
Kangheui Won | 5fb435a | 2021-12-22 12:24:17 +1100 | [diff] [blame] | 162 | |
Karthikeyan Ramasubramanian | 6f1b03b | 2023-04-21 14:26:51 -0600 | [diff] [blame] | 163 | cbfs_unmap(amdfw_location); |
Karthikeyan Ramasubramanian | 01c9dfb | 2023-05-25 15:54:33 -0600 | [diff] [blame] | 164 | rdev_munmap(boot_device_ro(), amdfw_location); |
Karthikeyan Ramasubramanian | 6f1b03b | 2023-04-21 14:26:51 -0600 | [diff] [blame] | 165 | rdev_munmap(boot_device_ro(), map_base); |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 166 | return 0; |
| 167 | } |
| 168 | |
| 169 | /* |
| 170 | * Save workbuf (and soon memory console and timestamps) to the bootloader to pass |
| 171 | * back to coreboot. |
| 172 | */ |
Raul E Rangel | 5e0ed50 | 2022-02-24 10:58:29 -0700 | [diff] [blame] | 173 | static uint32_t save_buffers(void) |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 174 | { |
| 175 | uint32_t retval; |
Raul E Rangel | 5e0ed50 | 2022-02-24 10:58:29 -0700 | [diff] [blame] | 176 | uint32_t buffer_size; |
Martin Roth | 0c12abe | 2020-06-26 08:40:56 -0600 | [diff] [blame] | 177 | struct transfer_info_struct buffer_info = {0}; |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 178 | |
Raul E Rangel | 5e0ed50 | 2022-02-24 10:58:29 -0700 | [diff] [blame] | 179 | buffer_size = |
| 180 | (uint32_t)((uintptr_t)_etransfer_buffer - (uintptr_t)_transfer_buffer); |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 181 | |
Raul E Rangel | 5e0ed50 | 2022-02-24 10:58:29 -0700 | [diff] [blame] | 182 | buffer_info.console_offset = (uint32_t)((uintptr_t)_preram_cbmem_console - |
| 183 | (uintptr_t)_transfer_buffer); |
| 184 | buffer_info.timestamp_offset = (uint32_t)((uintptr_t)_timestamp - |
| 185 | (uintptr_t)_transfer_buffer); |
| 186 | buffer_info.fmap_offset = (uint32_t)((uintptr_t)_fmap_cache - |
| 187 | (uintptr_t)_transfer_buffer); |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 188 | |
Martin Roth | 0c12abe | 2020-06-26 08:40:56 -0600 | [diff] [blame] | 189 | buffer_info.magic_val = TRANSFER_MAGIC_VAL; |
| 190 | buffer_info.struct_bytes = sizeof(buffer_info); |
| 191 | buffer_info.buffer_size = buffer_size; |
| 192 | buffer_info.workbuf_offset = (uint32_t)((uintptr_t)_fmap_cache - |
| 193 | (uintptr_t)_vboot2_work); |
| 194 | |
Kangheui Won | 5f027fa | 2020-08-25 18:12:19 +1000 | [diff] [blame] | 195 | memcpy(_transfer_buffer, &buffer_info, sizeof(buffer_info)); |
| 196 | |
Kangheui Won | a767eb4 | 2021-04-14 09:35:28 +1000 | [diff] [blame] | 197 | retval = save_uapp_data((void *)_transfer_buffer, buffer_size); |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 198 | if (retval) { |
Julius Werner | e966595 | 2022-01-21 17:06:20 -0800 | [diff] [blame] | 199 | printk(BIOS_ERR, "Could not save workbuf. Error code 0x%08x\n", retval); |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 200 | return POSTCODE_WORKBUF_SAVE_ERROR; |
| 201 | } |
| 202 | |
| 203 | return 0; |
| 204 | } |
| 205 | |
Rob Barnes | b35acf9 | 2021-11-02 17:47:47 -0600 | [diff] [blame] | 206 | /* |
| 207 | * S0i3 resume in PSP verstage is a special case. The FSDL is restoring mostly |
| 208 | * everything, so do the minimum necessary here. Unlike normal boot, subsequent |
| 209 | * coreboot stages are not run after s0i3 verstage. |
| 210 | * If the TPM is reset in S0i3, it must be re-initialized here. |
| 211 | */ |
| 212 | static void psp_verstage_s0i3_resume(void) |
| 213 | { |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 214 | tpm_result_t rc; |
Rob Barnes | b35acf9 | 2021-11-02 17:47:47 -0600 | [diff] [blame] | 215 | |
| 216 | post_code(POSTCODE_VERSTAGE_S0I3_RESUME); |
| 217 | |
| 218 | printk(BIOS_DEBUG, "Entering PSP verstage S0i3 resume\n"); |
| 219 | |
| 220 | if (!CONFIG(PSP_INIT_TPM_ON_S0I3_RESUME)) |
| 221 | return; |
| 222 | |
Jon Murphy | 2460481 | 2023-09-05 10:37:05 -0600 | [diff] [blame] | 223 | rc = tpm_setup(true); |
| 224 | if (rc != TPM_SUCCESS) { |
| 225 | printk(BIOS_ERR, "tpm_setup failed rc:%d\n", rc); |
Rob Barnes | b35acf9 | 2021-11-02 17:47:47 -0600 | [diff] [blame] | 226 | reboot_into_recovery(vboot_get_context(), POSTCODE_INIT_TPM_FAILED); |
| 227 | } |
| 228 | |
Sergii Dmytruk | 094a051 | 2022-10-31 18:41:52 +0200 | [diff] [blame] | 229 | rc = tlcl2_disable_platform_hierarchy(); |
Jon Murphy | 2460481 | 2023-09-05 10:37:05 -0600 | [diff] [blame] | 230 | if (rc != TPM_SUCCESS) { |
Sergii Dmytruk | 094a051 | 2022-10-31 18:41:52 +0200 | [diff] [blame] | 231 | printk(BIOS_ERR, "tlcl2_disable_platform_hierarchy failed rc:%d\n", rc); |
Rob Barnes | b35acf9 | 2021-11-02 17:47:47 -0600 | [diff] [blame] | 232 | reboot_into_recovery(vboot_get_context(), POSTCODE_INIT_TPM_FAILED); |
| 233 | } |
| 234 | } |
| 235 | |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 236 | void Main(void) |
| 237 | { |
| 238 | uint32_t retval; |
| 239 | struct vb2_context *ctx = NULL; |
Rob Barnes | b35acf9 | 2021-11-02 17:47:47 -0600 | [diff] [blame] | 240 | uint32_t bootmode; |
Karthikeyan Ramasubramanian | b6ab7ba | 2023-11-20 23:34:22 +0000 | [diff] [blame] | 241 | void *boot_dev_base; |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 242 | |
| 243 | /* |
| 244 | * Do not use printk() before console_init() |
| 245 | * Do not use post_code() before verstage_mainboard_init() |
Karthikeyan Ramasubramanian | 1a24d84 | 2022-03-16 16:27:49 -0600 | [diff] [blame] | 246 | * Do not use svc_write_postcode before verstage_soc_espi_init() if PSP uses ESPI |
| 247 | * to write postcodes. |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 248 | */ |
Kangheui Won | 4e2f5fd | 2020-09-17 16:37:13 +1000 | [diff] [blame] | 249 | timestamp_init(timestamp_get()); |
Karthikeyan Ramasubramanian | 1a24d84 | 2022-03-16 16:27:49 -0600 | [diff] [blame] | 250 | if (!CONFIG(PSP_POSTCODES_ON_ESPI)) |
| 251 | svc_write_postcode(POSTCODE_ENTERED_PSP_VERSTAGE); |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 252 | svc_debug_print("Entering verstage on PSP\n"); |
| 253 | memset(&_bss_start, '\0', &_bss_end - &_bss_start); |
| 254 | |
Karthikeyan Ramasubramanian | 1a24d84 | 2022-03-16 16:27:49 -0600 | [diff] [blame] | 255 | if (!CONFIG(PSP_POSTCODES_ON_ESPI)) |
| 256 | svc_write_postcode(POSTCODE_CONSOLE_INIT); |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 257 | console_init(); |
| 258 | |
Karthikeyan Ramasubramanian | e5f627a | 2022-12-22 13:05:12 -0700 | [diff] [blame] | 259 | if (CONFIG(PSP_INCLUDES_HSP)) |
| 260 | report_hsp_secure_state(); |
| 261 | |
Karthikeyan Ramasubramanian | 1a24d84 | 2022-03-16 16:27:49 -0600 | [diff] [blame] | 262 | if (!CONFIG(PSP_POSTCODES_ON_ESPI)) |
| 263 | svc_write_postcode(POSTCODE_EARLY_INIT); |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 264 | retval = verstage_soc_early_init(); |
| 265 | if (retval) { |
Rob Barnes | c30a1fa | 2021-11-08 06:43:07 -0700 | [diff] [blame] | 266 | /* |
| 267 | * If verstage_soc_early_init fails, cmos is probably not |
| 268 | * accessible, so rebooting into recovery is not an option. |
| 269 | * Just reboot and hope for the best. |
| 270 | */ |
| 271 | svc_write_postcode(POSTCODE_EARLY_INIT_ERROR); |
| 272 | svc_debug_print("verstage_soc_early_init failed! -- rebooting\n"); |
| 273 | vboot_reboot(); |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 274 | } |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 275 | |
Rob Barnes | f6e421f | 2021-11-08 13:04:18 -0700 | [diff] [blame] | 276 | printk(BIOS_DEBUG, "calling verstage_mainboard_espi_init\n"); |
| 277 | verstage_mainboard_espi_init(); |
| 278 | |
Rob Barnes | 188be6b | 2021-11-09 13:21:28 -0700 | [diff] [blame] | 279 | printk(BIOS_DEBUG, "calling verstage_soc_espi_init\n"); |
| 280 | verstage_soc_espi_init(); |
| 281 | |
| 282 | printk(BIOS_DEBUG, "calling verstage_mainboard_tpm_init\n"); |
| 283 | /* mainboard_tpm_init may check board_id, so make sure espi is ready first */ |
| 284 | verstage_mainboard_tpm_init(); |
| 285 | |
Rob Barnes | 847a39f | 2021-11-15 12:56:34 -0700 | [diff] [blame] | 286 | printk(BIOS_DEBUG, "calling verstage_soc_aoac_init\n"); |
| 287 | verstage_soc_aoac_init(); |
| 288 | |
| 289 | printk(BIOS_DEBUG, "calling verstage_soc_i2c_init\n"); |
| 290 | verstage_soc_i2c_init(); |
| 291 | |
Rob Barnes | b35acf9 | 2021-11-02 17:47:47 -0600 | [diff] [blame] | 292 | /* |
| 293 | * S0i3 resume in PSP verstage is a special case, handle it separately. |
| 294 | * Make sure TPM i2c is ready first. |
| 295 | */ |
| 296 | svc_get_boot_mode(&bootmode); |
| 297 | if (bootmode == PSP_BOOT_MODE_S0i3_RESUME) { |
| 298 | psp_verstage_s0i3_resume(); |
Raul E Rangel | 737ad67 | 2022-02-24 11:49:52 -0700 | [diff] [blame] | 299 | |
Raul E Rangel | 409e5cb | 2022-02-24 11:54:32 -0700 | [diff] [blame] | 300 | post_code(POSTCODE_SAVE_BUFFERS); |
| 301 | retval = save_buffers(); |
| 302 | if (retval) |
| 303 | post_code(retval); |
| 304 | |
Raul E Rangel | 737ad67 | 2022-02-24 11:49:52 -0700 | [diff] [blame] | 305 | post_code(POSTCODE_UNMAP_FCH_DEVICES); |
Rob Barnes | b35acf9 | 2021-11-02 17:47:47 -0600 | [diff] [blame] | 306 | unmap_fch_devices(); |
Raul E Rangel | 737ad67 | 2022-02-24 11:49:52 -0700 | [diff] [blame] | 307 | |
| 308 | post_code(POSTCODE_LEAVING_VERSTAGE); |
Rob Barnes | b35acf9 | 2021-11-02 17:47:47 -0600 | [diff] [blame] | 309 | svc_exit(0); |
| 310 | } |
| 311 | |
| 312 | printk(BIOS_DEBUG, "calling verstage_mainboard_early_init\n"); |
| 313 | verstage_mainboard_early_init(); |
| 314 | |
| 315 | svc_write_postcode(POSTCODE_LATE_INIT); |
Karthikeyan Ramasubramanian | 5eb7792 | 2023-07-21 18:05:25 -0600 | [diff] [blame] | 316 | if (CONFIG(SOC_AMD_COMMON_BLOCK_ACPIMMIO_PM_IO_ACCESS)) |
| 317 | fch_io_enable_legacy_io(); |
Rob Barnes | b35acf9 | 2021-11-02 17:47:47 -0600 | [diff] [blame] | 318 | |
Rob Barnes | 847a39f | 2021-11-15 12:56:34 -0700 | [diff] [blame] | 319 | printk(BIOS_DEBUG, "calling verstage_soc_spi_init\n"); |
| 320 | verstage_soc_spi_init(); |
| 321 | |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 322 | verstage_mainboard_init(); |
| 323 | |
| 324 | post_code(POSTCODE_VERSTAGE_MAIN); |
Karthikeyan Ramasubramanian | 0822ce8 | 2022-12-05 14:54:53 -0700 | [diff] [blame] | 325 | if (CONFIG(SEPARATE_SIGNED_PSPFW)) |
| 326 | report_prev_boot_status_to_vboot(); |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 327 | |
Kangheui Won | ac7ec27 | 2021-01-15 15:04:25 +1100 | [diff] [blame] | 328 | vboot_run_logic(); |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 329 | |
Martin Roth | c9689e0 | 2020-08-20 17:25:37 -0600 | [diff] [blame] | 330 | ctx = vboot_get_context(); |
Martin Roth | 50cca76 | 2020-08-13 11:06:18 -0600 | [diff] [blame] | 331 | retval = check_cmos_recovery(); |
| 332 | if (retval) |
Martin Roth | c9689e0 | 2020-08-20 17:25:37 -0600 | [diff] [blame] | 333 | reboot_into_recovery(ctx, retval); |
Martin Roth | 0c12abe | 2020-06-26 08:40:56 -0600 | [diff] [blame] | 334 | |
Kangheui Won | 7e91db7 | 2022-01-25 18:55:04 +1100 | [diff] [blame] | 335 | platform_report_mode(vboot_developer_mode_enabled()); |
| 336 | |
Kangheui Won | ac7ec27 | 2021-01-15 15:04:25 +1100 | [diff] [blame] | 337 | post_code(POSTCODE_UPDATE_BOOT_REGION); |
Kangheui Won | 9752725 | 2021-05-20 10:02:00 +1000 | [diff] [blame] | 338 | |
| 339 | /* |
| 340 | * Since psp_verstage doesn't load next stage we never call |
| 341 | * any cbfs API on RO path. However we still need to initialize |
| 342 | * RO CBFS MCACHE manually to pass it in transfer_buffer. |
| 343 | * In RW path, MCACHE build will be skipped for RO region since |
| 344 | * we already built here. |
| 345 | */ |
| 346 | cbfs_get_boot_device(true); |
| 347 | |
Kangheui Won | ac7ec27 | 2021-01-15 15:04:25 +1100 | [diff] [blame] | 348 | retval = update_boot_region(ctx); |
| 349 | if (retval) |
| 350 | reboot_into_recovery(ctx, retval); |
| 351 | |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 352 | post_code(POSTCODE_SAVE_BUFFERS); |
Raul E Rangel | 5e0ed50 | 2022-02-24 10:58:29 -0700 | [diff] [blame] | 353 | retval = save_buffers(); |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 354 | if (retval) |
Martin Roth | c9689e0 | 2020-08-20 17:25:37 -0600 | [diff] [blame] | 355 | reboot_into_recovery(ctx, retval); |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 356 | |
Karthikeyan Ramasubramanian | b6ab7ba | 2023-11-20 23:34:22 +0000 | [diff] [blame] | 357 | if (CONFIG(PSP_VERSTAGE_MAP_ENTIRE_SPIROM)) { |
| 358 | post_code(POSTCODE_UNMAP_SPI_ROM); |
| 359 | boot_dev_base = rdev_mmap_full(boot_device_ro()); |
| 360 | if (boot_dev_base) { |
| 361 | if (svc_unmap_spi_rom((void *)boot_dev_base)) |
| 362 | printk(BIOS_ERR, "Error unmapping SPI rom\n"); |
| 363 | } |
| 364 | } |
Karthikeyan Ramasubramanian | 6f1b03b | 2023-04-21 14:26:51 -0600 | [diff] [blame] | 365 | assert(!boot_dev_get_active_map_count()); |
Karthikeyan Ramasubramanian | b6ab7ba | 2023-11-20 23:34:22 +0000 | [diff] [blame] | 366 | |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 367 | post_code(POSTCODE_UNMAP_FCH_DEVICES); |
| 368 | unmap_fch_devices(); |
| 369 | |
| 370 | post_code(POSTCODE_LEAVING_VERSTAGE); |
| 371 | |
| 372 | printk(BIOS_DEBUG, "Leaving verstage on PSP\n"); |
| 373 | svc_exit(retval); |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 374 | } |
| 375 | |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 376 | /* |
| 377 | * The stage_entry function is not used directly, but stage_entry() is marked as an entry |
| 378 | * point in arm/arch/header.h, so if stage_entry() isn't present and calling Main(), all |
| 379 | * the verstage code gets dropped by the linker. Slightly hacky, but mostly harmless. |
| 380 | */ |
| 381 | void stage_entry(uintptr_t stage_arg) |
| 382 | { |
| 383 | Main(); |
| 384 | } |