soc/amd/picasso: fix CBFS MCACHE on Zork
Zork platform was not booting with MCACHE enabled since psp_verstage
had following issues with MCACHE.
Fix all the issues and re-enable MCACHE for Zork.
* psp_verstage should call vboot_run_logic, not verstage_main.
vboot_run_logic calls after_verstage which handles RW MCACHE build.
* It should avoid low-level apis for cbfs access.
cbfs_map will build RO MCACHE if it's the first stage, while other
low-level apis won't.
* It should call update_boot_region before save_buffers
MCACHE should be transferred to x86 so we should build it before
calling save_buffers
BUG=b:177323348
BRANCH=none
TEST=boot Ezkinil
Signed-off-by: Kangheui Won <khwon@chromium.org>
Change-Id: I08c5f8474600a06e3a08358733a38f70787e944a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49468
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/soc/amd/picasso/psp_verstage/psp_verstage.c b/src/soc/amd/picasso/psp_verstage/psp_verstage.c
index 8ef2dcd..d4c5d15 100644
--- a/src/soc/amd/picasso/psp_verstage/psp_verstage.c
+++ b/src/soc/amd/picasso/psp_verstage/psp_verstage.c
@@ -64,19 +64,6 @@
return 0;
}
-static uintptr_t locate_amdfw(const char *name, struct region_device *rdev)
-{
- struct cbfsf fh;
- uint32_t type = CBFS_TYPE_RAW;
-
- if (cbfs_locate(&fh, rdev, name, &type))
- return 0;
-
- cbfs_file_data(rdev, &fh);
-
- return (uintptr_t)rdev_mmap_full(rdev);
-}
-
/*
* Tell the PSP where to load the rest of the firmware from
*/
@@ -85,9 +72,8 @@
struct psp_ef_table *ef_table;
uint32_t psp_dir_addr, bios_dir_addr;
uint32_t *psp_dir_in_spi, *bios_dir_in_spi;
- const char *rname, *fname;
- struct region_device rdev;
- uintptr_t amdfw_location;
+ const char *fname;
+ void *amdfw_location;
/* Continue booting from RO */
if (ctx->flags & VB2_CONTEXT_RECOVERY_MODE) {
@@ -96,19 +82,12 @@
}
if (vboot_is_firmware_slot_a(ctx)) {
- rname = "FW_MAIN_A";
fname = "apu/amdfw_a";
} else {
- rname = "FW_MAIN_B";
fname = "apu/amdfw_b";
}
- if (fmap_locate_area_as_rdev(rname, &rdev)) {
- printk(BIOS_ERR, "Error: Could not locate fmap region %s.\n", rname);
- return POSTCODE_FMAP_REGION_MISSING;
- }
-
- amdfw_location = locate_amdfw(fname, &rdev);
+ amdfw_location = cbfs_map(fname, NULL);
if (!amdfw_location) {
printk(BIOS_ERR, "Error: AMD Firmware table not found.\n");
return POSTCODE_AMD_FW_MISSING;
@@ -244,22 +223,23 @@
post_code(POSTCODE_VERSTAGE_MAIN);
- verstage_main();
+ vboot_run_logic();
ctx = vboot_get_context();
retval = check_cmos_recovery();
if (retval)
reboot_into_recovery(ctx, retval);
+ post_code(POSTCODE_UPDATE_BOOT_REGION);
+ retval = update_boot_region(ctx);
+ if (retval)
+ reboot_into_recovery(ctx, retval);
+
post_code(POSTCODE_SAVE_BUFFERS);
retval = save_buffers(&ctx);
if (retval)
reboot_into_recovery(ctx, retval);
- post_code(POSTCODE_UPDATE_BOOT_REGION);
- retval = update_boot_region(ctx);
- if (retval)
- reboot_into_recovery(ctx, retval);
post_code(POSTCODE_UNMAP_SPI_ROM);
if (boot_dev.base) {